Abstract: The present invention is directed to an epitaxial wafer comprising a single crystal silicon substrate having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerated defects, and an epitaxial layer which is deposited upon a surface of the substrate and which is substantially free of grown-in defects caused by the presence of agglomerated silicon self-interstitial defects on the substrate surface upon which the epitaxial layer is deposited.

Abstract: A process for growing single crystal silicon ingots of which portions are substantially free of agglomerated intrinsic point defects. An ingot is grown generally in accordance with the Czochralski method. A first portion of the ingot cools to a temperature which is less than a temperature TA at which agglomeration of intrinsic point defects in the ingot occurs during the time the ingot is being grown, while a second portion remains at a temperature above TA. The second portion of the ingot is subsequently maintained at a temperature above TA to produce a portion which is substantially free of agglomerated intrinsic point defects.

Abstract: The present invention provides for a process for preparing a single crystal silicon ingot by the Czochralski method. The process comprises selecting a seed crystal for Czochralski growth wherein the seed crystal comprises vacancy dominated single crystal silicon.

Abstract: A crystal puller for growing monocrystalline silicon ingots includes first and second electrical resistance heaters in the crystal puller in longitudinal, closely spaced relationship with each other to radiate heat toward the ingot as the ingot is pulled upward within the housing. An adapter mounting the heaters may also be provided for adapting existing crystal pullers to incorporate the heaters.

Abstract: The present invention is directed to a process for producing a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects. The process including growing a single crystal silicon ingot from molten silicon, and as part of the growth process, controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, during the growth of a constant diameter portion of the crystal over a temperature range from solidification to a temperature of no less than about 1325° C., and (iii) a cooling rate of the crystal from a solidification temperature to about 1,050° C., in order to cause the formation of an axially symmetrical segment which is substantially free of agglomerated intrinsic point defects.

Abstract: A granular semiconductor material transport system capable of continuous, non-contaminating transfer of granular semiconductor material from a large source vessel to a smaller and more manageable target vessel. Movement of the granular material is induced by flowing transfer fluid. The system includes a source vessel, a feed tube, a process vessel, a target vessel and a vacuum source, or mover. The source vessel contains a bulk supply of granular material to be transported. A feed tube received within the source vessel transfers the granular material entrained in a transfer fluid from the source vessel to the process vessel. The process vessel separates the granular material from any dust particles and deposits the granular material in the more manageable target vessel. The vacuum source sealably connects to the process vessel to evacuate the process vessel to set the granular polysilicon in motion within the system.

Abstract: A process for forming a semiconductor wafer which is single side polished improves nanotopography and flatness of the polished wafer. The process reduces the effect of back side surface features, such as edge ring phenomena and back side laser marks, on nanotopography and local site flatness, thereby improving oxide layer uniformity for chemical/mechanical planarization (CMP) processing, and flatness on the polished front side of the wafer after polishing. The wafer is mounted on a polishing block by wax so as to minimize transfer of imperfections in the wax to the front side of the wafer. In particular, the wafer is retained in a centered position on the polishing block. Moreover, the wafer is mounted at atmospheric pressure while still removing air bubbles from the wax.

Abstract: A single crystal silicon ingot having a constant diameter portion that contains arsenic dopant atoms at a concentration which results in the silicon having a resistivity that is less than about 0.0025 &OHgr;·cm, and wafers sliced therefrom. The present invention is also directed to a method of doping a silicon melt so that the foregoing ingot may be produced. Specifically, the method entails introducing arsenic dopant below the surface of a silicon melt, rather than on the surface, using a dopant feeder that is at least partially submersed in the silicon melt.

Abstract: A process for preparing a silicon epitaxial wafer. The wafer has a front surface having an epitaxial layer deposited thereon, a back surface, and a bulk region between the front and back surfaces, wherein the bulk region contains a concentration of oxygen precipitates. In the process, the wafer is first subjected to an ideal oxygen precipitating heat treatment to causes the formation of a non-uniform distribution of crystal lattice vacancies with the concentration of vacancies in the bulk region being greater than the distribution of vacancies in the front surface. The ideal precipitating wafer is then subjected to an oxygen precipitation heat treatment to cause the nucleation and growth of oxygen precipitates to a size sufficient to stabilize the oxygen precipitates, with the oxygen precipitates being formed primarily according to the vacancy profile. An epitaxial layer is then deposited on the surface of the oxygen precipitate stabilized wafer.

Abstract: This invention is directed to a novel a single crystal silicon wafer. In one embodiment, this wafer comprises: (a) two major generally parallel surfaces (i.e., the front and back surfaces); (b) a central plane between and parallel to the front and back surfaces; (c) a front surface layer which comprises the region of the wafer extending a distance of at least about 10 &mgr;m from the front surface toward the central plane; and (d) a bulk layer which comprises the region of the wafer extending from the central plane to the front surface layer.

Abstract: The present invention relates to single crystal silicon, in ingot or wafer form, which contains an axially symmetric region in which vacancies are the predominant intrinsic point defect and which is substantially free of agglomerated vacancy intrinsic point defects, wherein the first axially symmetric region has a width which is at least about 50% of the length of the radius of the ingot, and a process for the preparation thereof.

Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has at least a surface layer of high resistivity, the layer having an interstitial oxygen content which renders it incapable of forming thermal donors in an amount sufficient to affect resistivity upon being subjected to a conventional semiconductor device manufacturing process. The present invention further directed to a silicon on insulator structure derived from such a wafer.

Abstract: A process for eliminating dislocations in a neck of a large-diameter single crystal silicon ingot is provided. The process comprises controlling heat transfer at the melt/solid interface to eliminate dislocations over a reduced axial length in the neck portion of a large-diameter single crystal silicon ingot grown in accordance with the Czochralski method, thereby increasing overall process throughput and yield.

Abstract: A modified susceptor for use in an epitaxial deposition apparatus and process is disclosed. The modified susceptor has an inner annular ledge capable of supporting a semiconductor wafer and has a plurality of holes in the surface to allow cleaning gas utilized during an epitaxial deposition process to pass through the susceptor and contact substantially the entire back surface of the semiconductor wafer and remove a native oxide layer. Also, the plurality of holes on the susceptor allows dopant atoms out-diffused from the back surface during the epitaxial deposition process to be carried away from the front surface in an inert gas stream and into the exhaust such that autodoping of the front surface is minimized.

Abstract: A method and apparatus for the high throughput epitaxial growth of a layer on the surface of a substrate by chemical vapor deposition is provided. In one embodiment, the method of the present invention comprises placing the substrate within a reactor vessel and passing a horizontal flow of reactant gas comprising a precursor chemical through the reactor vessel. The flow of the reactant gas is defined as having a Reynolds number of at least about 5000. The substrate is heated to a temperature sufficient to thermally decompose the precursor chemical and deposit an epitaxial layer on the substrate. In accordance with a preferred embodiment of the present invention, the substrate is placed within the reactor vessel at a position such that the flow of the reactant gas is characterized as a fully developed turbulent flow.

Abstract: The present invention relates to a process for preparing a single crystal silicon ingot wherein controlled growth of the crown or taper is used to establish a desired vacancy-interstitial boundary position in the main body of the ingot early in the growth process, such that the overall yield of the desired type of silicon is increased. Controlled growth is achieved in a first embodiment by actually increasing the pull rate during growth of the crown or taper, prior to the roll or growth of the shoulder of the ingot.

Abstract: A carrier for receiving and holding a plurality of semiconductor wafers and permitting surfaces of the wafers to receive maximum exposure to ultrasonic waves during a wafer cleaning process in which the carrier and the wafers are immersed in a liquid medium and ultrasonic waves are generated in the liquid medium. The carrier includes two vertical sidewalls and at least three horizontal supporting rods that interconnect the sidewalls and that are collectively positioned for supporting wafers in generally upright, face to face position generally parallel to each other. At least one stabilizing rod extends horizontally between the sidewalls for limiting wafer motion relative to the carrier to steady the wafers. A series of spaced apart teeth on the stabilizing rod define troughs for receiving wafers loosely therein to prevent substantial vibratory deflections of the wafers.

Abstract: A crystal puller for growing monocrystalline silicon ingots includes first and second electrical resistance heaters in the crystal puller in longitudinal, closely spaced relationship with each other to radiate heat toward the ingot as the ingot is pulled upward within the housing. An adapter mounting the heaters may also be provided for adapting existing crystal pullers to incorporate the heaters.

Abstract: A method for reducing the concentration of near-surface bubbles in a quartz crucible suitable for growing monocrystalline silicon ingots by the Czochralski method is provided. The method comprises etching the inner surface of the crucible, preferably with an acidic solution, to substantially eliminate or reduce the concentration of near-surface bubbles from the inner surface of the crucible.

Abstract: A method for processing a semiconductor wafer to reduce surface roughness. The wafer has two flat, opposite faces with a peripheral edge extending around a circumference of the wafer between the faces. The method includes, in the following order, the steps of burnishing the edge, and etching the edge. The step of burnishing is defined by a relative rubbing motion between the edge and an abrasive appliance to remove damage from the edge, the rubbing motion occurring free from any polishing solution or chemical slurry. The step of etching includes exposing the wafer to a liquid chemical etchant for a period of time to remove additional damage from the edge. The method may also include, before the other steps, a step of lapping at least one face of the wafer to remove semiconductor matter through a relative rubbing motion between the face and an abrasive lapping plate in the presence of an abrasive liquid slurry.