Abstract: Protective self aligned buffer (PSAB) layers are layers of material that are selectively formed at the surface of metal layers in a partially fabricated semiconductor device. In a Damascene interconnect, PSAB layer typically resides at an interface between the metal layer and a dielectric diffusion barrier layer. PSAB layers promote improved adhesion between a metal layer and an adjacent dielectric diffusion barrier layer. Further, PSAB layers can protect metal surfaces from inadvertent oxidation during fabrication process. A PSAB layer may be formed entirely within the top portion of a metal layer, by, for example, chemically converting metal surface to a thin layer of metal silicide. Thickness of PSAB layers, and, consequently resistance of interconnects can be controlled by partially passivating metal surface prior to formation of PSAB layer. Such passivation can be accomplished by controllably treating metal surface with a nitrogen-containing compound to convert metal to metal nitride.

Abstract: Acetylene is treated to remove some residual storage solvent that may be present with the acetylene in a source of acetylene such as a container. Such treatment may be performed prior to supplying the acetylene to a deposition chamber or other reactor where acetylene is a reactant. After treatment, the acetylene gas stream has a relatively constant concentration of storage solvent, regardless of how much acetylene has been released from the acetylene source. The treatment may involve condensing the storage solvent from the gas stream at a certain temperature and separating the storage solvent from the gas stream.

Abstract: An apparatus for electroplating a layer of metal on the surface of a wafer includes an ionically resistive ionically permeable element located in close proximity of the wafer (preferably within 5 mm of the wafer surface) which serves to modulate ionic current at the wafer surface, and a second cathode configured to divert a portion of current from the wafer surface. The ionically resistive ionically permeable element in a preferred embodiment is a disk made of a resistive material having a plurality of perforations formed therein, such that perforations do not form communicating channels within the body of the disk. The provided configuration effectively redistributes ionic current in the plating system allowing plating of uniform metal layers and mitigating the terminal effect.

Abstract: A cross-flow injector is used to introduce fluids into a chemical vapor deposition process chamber separately and simultaneously for efficiently atomizing and vaporizing the fluids. The cross-flow injector consists of a three port cavity having an inlet nozzle, a throat region, and an exit nozzle. The injector cavity is defined by the tapering of the inlet and exit nozzles to the smaller diameter of the throat region. The tapering allows for pressure differentials at the inlet, throat, and exit regions, and assures the inlet pressure being much greater than the exit region. The throat region consists of additional apertures for injecting dopants and precursors within the fluid flow. The pressure differential at the throat region atomizes and vaporizes the injected dopant and precursor fluids. In a second embodiment, the injector cavity consists of two ports, having an inlet nozzle and a throat region.

Abstract: A layer of diffusion barrier or seed material is deposited on a semiconductor substrate having a recessed feature. The method may include a series of new deposition cycles, for example, a first net deposition cycle and a second net deposition cycle. The first net deposition cycle includes depositing a first deposited amount of the diffusion barrier or seed material and etching a first etched amount of the diffusion barrier or seed material. The second net deposition cycle including depositing a second deposited amount of the diffusion barrier or seed material and etching a second etched amount of the diffusion barrier or seed material. At least one of the process parameters of the first cycle differs from that of the second allows providing a graded deposition effects to reduce a risk of damaging any under layers and dielectric. A deposited layer of diffusion barrier or seed material is generally more conformal.

Abstract: Metal seed layers are deposited on a semiconductor substrate having recessed features by a method that involves at least three operations. In this method, a first layer of metal is deposited onto the substrate to cover at least the bottom portions of the recessed features. The first layer of metal is subsequently redistributed to improve sidewall coverage of the recessed features. Next, a second layer of metal is deposited on at least the field region of the substrate and on the bottom portions of the recessed features. The method can be implemented using a PVD apparatus that allows deposition and resputtering operations. This sequence of operations can afford seed layers with improved step coverage. It also leads to decreased formation of voids in interconnects, and to improved resistance characteristics of formed IC devices.

Abstract: Each of plurality of gas sources flows to a different one of a plurality of separate source gas flow paths. Then, a source gas is distributed directly from each of plurality of separate source gas flow paths to a plurality of separate gas mixture flow paths, thereby distributing a plurality of source gases to each of different flow paths. A plurality of separate gas mixture streams is generated by flowing a plurality of source gases in each of a plurality of separate gas mixture flow paths. In some embodiments, each of a plurality of separate source gas flow paths comprises a gas distribution duct, and each of a plurality of gas mixture flow paths comprises a gas mixing conduit. In some embodiments, a gas distribution duct includes a plurality of gas distribution ports and a gas source port connectable to a gas source. In some embodiments, a gas mixing conduit comprises a plurality of gas inlet holes, a gas mixing region, and a gas outlet hole.

Abstract: Methods that increase the overall rate of heat transfer between a substrate and a heat sink or source, e.g., in a loadlock are provided. According to various embodiments, the methods involve varying the heat transfer coefficient of a heat transfer gas in the loadlock or other chamber. The heat transfer coefficient is varied to reduce the time-dependent variation of the rate of heat transfer. As a result, the overall rate of heat transfer is improved. In certain embodiments, the methods involve varying the gas pressure of a chamber in order to affect the rate of heat transfer to a wafer within a system. By manipulating the gas pressure accordingly, the rate of heat transfer is controlled throughout the heating or cooling cycle.

Abstract: A method of forming a boron nitride or boron carbon nitride dielectric produces a conformal layer without loading effect. The dielectric layer is formed by chemical vapor deposition (CVD) of a boron-containing film on a substrate, at least a portion of the deposition being conducted without plasma, and then exposing the deposited boron-containing film to a plasma. The CVD component dominates the deposition process, producing a conformal film without loading effect. The dielectric is ashable, and can be removed with a hydrogen plasma without impacting surrounding materials. The dielectric has a much lower wet etch rate compared to other front end spacer or hard mask materials such as silicon oxide or silicon nitride, and has a relatively low dielectric constant, much lower than silicon nitride.

Abstract: A method for depositing a film includes arranging a substrate in a plasma enhanced chemical vapor deposition chamber. A first ashable hardmask (AHM) layer that is carbon-based is deposited on the substrate. During the depositing of the first AHM layer, doping is performed with at least one dopant selected from a group consisting of silicon, silane, boron, nitrogen, germanium, carbon, ammonia, and carbon dioxide. An atomic percentage of the at least one dopant is greater than or equal to 5% of the first AHM layer.

Abstract: Provided are improved apparatus and methods for radiative treatment. In some embodiments, a semiconductor processing apparatus for radiative cure includes a process chamber and a radiation assembly external to the process chamber. The radiation assembly transmits radiation into the chamber on a substrate holder through a chamber window. A radiation detector measures radiation intensity from time to time. The assembly includes a gas inlet and exhaust operable to flow a radiation-activatable cooling gas through the radiation assembly.

Abstract: An apparatus for purging a space in a processing chamber comprises a source of a purge gas; an inlet portion of a purge ring; an inlet baffle located in the inlet portion and fluidically connected to the source of purge gas; and an exhaust portion of the purge ring. The inlet portion and the exhaust portion define a ring hole space having a 360° periphery. The inlet baffle preferably surrounds not less than 180° of said periphery. The inlet baffle is operable to convey purge gas into the ring hole space. The exhaust portion is operable to convey purge gas and other matter out of the ring hole space. Cleaning of the purge ring and other structures in a processing chamber is conducted by flowing a cleaning gas through the inlet baffle. Methods and systems using a purge ring are particularly useful for purging and cleaning porogens from a UV curing chamber. Some embodiments include a gas inlet plenum and an exhaust channel but not a purge ring.

Abstract: Apparatus and methods to minimize wafer-to-wafer process variation in RF-based semiconductor processing reactors with shared RF source for multiple processing areas. RF sensors associated with each processing area sends signal to the RF balance controller. The controller modifies station impedance using power adjustment mechanisms. As a result, station to station distribution of a selected RF parameter (e.g., load power) may match the station set points. Closed loop control maintains balance despite changing conditions.

Abstract: A substrate handling robot includes an arm section and a wrist portion connected to the arm section. An end effector is connected to the wrist portion and is configured to support a substrate. A housing is arranged adjacent to the end effector and includes a gas outlet that directs gas onto an exposed surface of the substrate during transport.

Abstract: Methods and apparatus for filling gaps on partially manufactured semiconductor substrates with dielectric material are provided. In certain embodiments, the methods include introducing a first process gas into the processing chamber and accumulating a second process gas in an accumulator maintained at a pressure level substantially highest than that of the processing chamber pressure level. The second process gas is then rapidly introduced from the accumulator into the processing chamber. An excess amount of the second process gas may be provided in the processing chamber during the introduction of the second process gas. Flowable silicon-containing films forms on a surface of the substrate to at least partially fill the gaps.

Abstract: The present invention provides methods of selectively depositing refractory metal and metal nitride cap layers onto copper lines inlaid in a dielectric layer. The methods result in formation of a cap layer on the copper lines without significant formation on the surrounding dielectric material. The methods typically involve exposing the copper lines to a nitrogen-containing organo-metallic precursor and a reducing agent under conditions that the metal or metal nitride layer is selectively deposited. In a particular embodiment, an amino-containing tungsten precursor is used to deposit a tungsten nitride layer. Deposition methods such as CVD or ALD may be used.

Abstract: A semiconductor processing tool heats wafers using radiant heat and resistive heat in chamber or in a load lock where pressure changes. The wafers are heated in greater part with a resistive heat source until a transition temperature or pressure is reached, then they are heated in greater part with a radiant heat source. Throughput improves for the tool because of the wafers can reach a high temperature uniformly in seconds.

Abstract: Ashing of organic material is conducted initially at a low temperature and then at a high temperature. A low flow rate of ashing gas maximizes ashing rate at the low temperature, and a high flow rate of ashing gas maximizes ashing rate at a high temperature. Preferably, a crossover temperature of a particular organic material in a given ashing system is determined, the crossover temperature characterized in that below the crossover temperature, a decrease in ashing gas flow rate results in an increase of ashing rate, and above the crossover temperature, an increase in ashing gas flow rate results in an increase of ashing rate.

Abstract: Methods, electroplating solution, and apparatuses for electroplating copper into a surface of a partially fabricated semiconductor substrate are provided. Electroplating solutions include copper ions, suppressor additives, chloride ions, and alternative halide ions, which include bromide ions and/or iodide ions. The concentration of the alternative halide ions in the solution may be between about 0.25 ppm and 20 ppm. Addition of the alternative halide ions at certain concentrations improves suppression properties of the solution over a range of feature sizes without a need to change suppressors.