Patents Assigned to NXP
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Patent number: 10708892Abstract: A client station generates a media access control (MAC) data unit (MPDU) that includes a MAC header. The MAC header is generated to include a control field that indicates an amount of data queued at the client station for transmission to an access point. The control field is generated to include i) a first subfield that specifies a scale factor, and ii) a second subfield that specifies a base value, and multiplying the specified base value by the specified scale factor indicates the amount of data queued at the client station. The client station transmits the MPDU to the access point to inform the access point of the amount of data queued at the client station for transmission to the access point.Type: GrantFiled: May 24, 2019Date of Patent: July 7, 2020Assignee: NXP USA, INC.Inventors: Liwen Chu, Hongyuan Zhang, Lei Wang, Yakun Sun, Jinjing Jiang, Hui-Ling Lou
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Patent number: 10707928Abstract: A first communication device receives plurality of uplink data units simultaneously transmitted by multiple second communication devices, and generates an acknowledgement data unit to acknowledge receipt of the plurality of uplink data units. Each of at least some of a plurality of acknowledgment fields includes: a first field that includes an indicator of a corresponding one of the second communication devices, a second field that indicates whether the acknowledgment field corresponds to i) an acknowledgment corresponding to a single data unit, or ii) a block acknowledgment corresponding to multiple data units, wherein when the second field that indicates a block acknowledgment, the acknowledgment field further includes a third field having a bitmap that indicates which data units in the group are being acknowledged, and wherein when the second field that indicates acknowledgment of a single data unit, the acknowledgment field does not include the third field.Type: GrantFiled: August 7, 2017Date of Patent: July 7, 2020Assignee: NXP USA, INC.Inventors: Liwen Chu, Lei Wang, Jinjing Jiang, Hongyuan Zhang, Hui-Ling Lou
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Patent number: 10707180Abstract: A bond pad structure and method are provided. The structure includes a first conductive layer formed over a substrate. A second conductive layer is formed over a first portion of the first conductive layer, and a first portion of the second conductive layer forms a first capacitor electrode. A third conductive layer is formed over the first conductive layer and second conductive layer, and a first portion of the third conductive layer forms a second capacitor electrode. A second portion of the third conductive layer forms a wire bond region. A dielectric material is disposed between the first capacitor electrode and the second capacitor electrode to form a first capacitor.Type: GrantFiled: April 23, 2018Date of Patent: July 7, 2020Assignee: NXP USA, INC.Inventors: Ricardo Uscola, Michele Lynn Miera, Sai Sunil Mangaonkar, Jitesh Vaswani
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Patent number: 10708109Abstract: A system for use with an OFDM-receiver. The system comprising a frequency-offset-correction-block; and a sub-band-demapping-block. The sub-band-demapping-block is configured to receive an input-signal and determine within the input signal: one or more allocated-frequency-sub-bands allocated to convey an information-signal; and one or more unallocated-frequency-sub-bands. The sub-band-demapping-block can then provide the allocated-frequency-sub-bands and the unallocated-frequency-sub-bands to the frequency-offset-correction-block.Type: GrantFiled: May 2, 2019Date of Patent: July 7, 2020Assignee: NXP B.V.Inventor: Vincent Martinez
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Patent number: 10708114Abstract: Certain aspects of the disclosure are directed to in-phase/quadrature (IQ) mismatch detection and correction in radio frequency receivers. According to a specific example, a method of manufacture or use comprises, in a quadrature radio-frequency receiver configured to process signals using I and Q components, providing parameters indicative of IQ mismatches associated with circuitry of the quadrature radio-frequency receiver due to changes in signal gain. The method further includes, while using the quadrature radio-frequency receiver to receive and process a received radio signal, correcting for the IQ mismatches by using the parameters in response to actual signal gain change.Type: GrantFiled: September 5, 2018Date of Patent: July 7, 2020Assignee: NXP B.V.Inventors: Juergen Richard Marschner, Robert Rutten, Niels Gabriel, Tjeu van Ansem, Francoise Jeannette Harmsze, Peter Blinzer, Frits Anthonie Steenhof
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Patent number: 10705125Abstract: An integrated circuit includes a load circuit having multiple functional modules, a first voltage regulator configured to provide a supply voltage to the multiple functional modules, and a supply current monitoring circuit including a second voltage regulator and a current monitor, the second voltage regulator being configured to provide a test supply voltage. A switch matrix is interconnected between the first voltage regulator, the supply current monitoring circuit, and the functional modules. Each of the functional modules in successive order is a module under test, and the switch matrix is configured to disconnect the first voltage regulator from the module under test and connect the supply current monitoring circuit to the module under test such that the second voltage regulator provides the test supply voltage to the module under test and the current monitor measures a supply current of the module under test in response to the test supply voltage.Type: GrantFiled: September 27, 2019Date of Patent: July 7, 2020Assignee: NXP B.V.Inventors: Edwin Schapendonk, Marijn Nicolaas van Dongen, Maciej Skrobacki, Wouter van der Heijden, Petrus Antonius Thomas Marinus Vermeeren
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Publication number: 20200211932Abstract: Internally-shielded microelectronic packages having increased resistances to electromagnetic cross-coupling are disclosed, as are methods for fabricating such microelectronic packages. In embodiments, the internally-shielded microelectronic package includes a substrate having a frontside and a longitudinal axis. A first microelectronic device is mounted to the frontside of the substrate, while a second microelectronic device is further mounted to the frontside of the substrate and spaced from the first microelectronic device along the longitudinal axis. An internal shield structure includes or consists of a shield wall, which is positioned between the first and second microelectronic devices as taken along the longitudinal axis. The internal shield structure is at least partially composed of a magnetically-permeable material, which decreases electromagnetic cross-coupling between the first and second microelectronic devices during operation of the internally-shielded microelectronic package.Type: ApplicationFiled: March 12, 2020Publication date: July 2, 2020Applicant: NXP USA, INC.Inventors: AUDEL SANCHEZ, LAKSHMINARAYAN VISWANATHAN, VIKAS SHILIMKAR, RAMANUJAM SRINIDHI EMBAR
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Patent number: 10698080Abstract: An apparatus comprising a communication element for an automotive radar system, the communication element configured to communicate with a remote device remote from the automotive radar system by one or more of: a) providing signalling to the automotive radar system to send information to the remote device; b) receiving signalling representative of information from the remote device via the automotive radar system.Type: GrantFiled: September 5, 2017Date of Patent: June 30, 2020Assignee: NXP B.V.Inventors: Ernst Julien-Nathanael Seler, Ralf Reuter
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Patent number: 10701534Abstract: In a vehicle-to-vehicle communication system, an intersection-located road side unit (RSU) having two omni-antennas applies spatial filtering to the antennas' RX signals to recover first and second overlapping basic safety messages (BSMs) concurrently transmitted by two intersection-approaching vehicles that have no direct line of sight (NLOS) between them. The RSU retransmits each BSM for receipt by the other vehicle using either an omnidirectional retransmission technique in which the two messages are sequentially transmitted using an omnidirectional beam-pattern, a directional retransmission technique in which the two messages are sequentially transmitted using directional beam-patterns, or an XOR retransmission technique in which the RSU applies an XOR operation to the two BSMs and transmits the resulting XOR message using an omnidirectional beam-pattern. A receiving vehicle can apply an XOR operation to the XOR message and a local copy of the first BSM message to recover the second BSM message.Type: GrantFiled: July 30, 2018Date of Patent: June 30, 2020Assignee: NXP B.V.Inventors: Thanh Hieu Nguyen, Md Noor-A-Rahim, Yong Liang Guan, Hong Li
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Patent number: 10700860Abstract: According to an example, a method and a secure element legitimacy verification of a node in a distributed network is provided. The distributed network comprises a plurality of nodes and a secure element, which are connected to a shared medium of the distributed network. Each of the plurality of nodes is provisioned with an identity certificate comprising a serial number. Each serial number is specific to the respective node. The secure element receives from one of the plurality of nodes a request for legitimacy verification including the serial number. The secure element compares the serial number included in the received request with a plurality of serial numbers comprises in a whitelist maintained at the secure element. The secure element transmits back to the requesting node a request response comprising an indication whether or not the serial number is comprised in the whitelist.Type: GrantFiled: December 13, 2017Date of Patent: June 30, 2020Assignee: NXP B.V.Inventor: Thierry G. C. Walrant
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Patent number: 10698007Abstract: A method and apparatus of load detection for an audio amplifier system is described. A load detector includes a first load terminal and a second load terminal; a controller coupled to the first and second load terminals and configured to in a first control loop, vary a first current supplied to a first load terminal dependent on the difference between a first reference signal and the detected first load terminal voltage; and in a second control loop, vary a second current supplied to the second load terminal dependent on the difference between a second reference signal and the detected second load terminal voltage; and to determine a current through a load connected between the first load terminal and the second load terminal from the second current value, and a voltage across the load from the detected voltage difference between the first load terminal voltage and the second load terminal voltage.Type: GrantFiled: June 2, 2017Date of Patent: June 30, 2020Assignee: NXP B.V.Inventors: Fred Mostert, Gertjan van Holland, Paul Wielage
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Patent number: 10700672Abstract: An electronic system includes a clock generation circuit to generate a clock signal; and a duty cycle monitoring circuit, DTC, to monitor a duty cycle of the generated clock signal. The DTC includes a differential signal generator circuit to generate an inverted and a non-inverted representation of the generated clock signal. An averaging circuit averages the non-inverted representation and the inverted representation of the generated clock signal. A comparison circuit includes at least a first comparator to compare the averaged non-inverted representation of the generated clock signal with a second respective reference voltage threshold and a second comparator configured to compare the averaged inverted representation with a first respective reference voltage threshold.Type: GrantFiled: October 3, 2019Date of Patent: June 30, 2020Assignee: NXP USA, Inc.Inventors: Pierre Savary, Cristian Pavao Moreira, Matthis Bouchayer, Jean-Stephane Vigier
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Patent number: 10700691Abstract: A circuit includes a first external terminal, a first lower resolution analog-to-digital converter (LRADC) coupled to the external terminal and configured to perform a first conversion of an analog signal received at the external terminal to a digital value, and a higher resolution analog-to-digital converter (HRADC). The HRADC is configured to selectively receive the analog signal from the first external terminal based on the digital value. When the digital value outputted by the first LRADC indicates a change in value of the received analog signal, the HRADC is provided with the analog signal and performs a second conversion of the analog signal to a second digital value. The first LRADC has a lower conversion resolution as compared to the HRADC.Type: GrantFiled: May 30, 2019Date of Patent: June 30, 2020Assignee: NXP USA, INC.Inventors: Srikanth Jagannathan, Christopher James Micielli, George Rogers Kunnen, Carl Culshaw
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Patent number: 10700810Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for performing physical layer operations in a communications network is disclosed. The method involves determining a desired error management mode for a receiver at a first network node, at the first network node, embedding an indication of the desired error management mode into a forward error correction (FEC) frame, and transmitting the FEC frame from the first network node. In an embodiment, embedding an indication of the desired error management mode into an FEC frame includes embedding an operations, administration, and management (OAM) word into the FEC frame to communicate the indication of the desired error management mode.Type: GrantFiled: September 5, 2018Date of Patent: June 30, 2020Assignee: NXP B.V.Inventor: Sujan Pandey
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Patent number: 10699764Abstract: A magnetoresistive random access memory (MRAM) includes an MRAM array having MRAM cells, each including a Magnetic Tunnel Junction (MTJ). The MRAM includes data write circuitry configured to write in one-time-programmable (OTP) write mode or in a non-OTP write mode. In the OTP write mode, the data write circuitry is configured to provide a high write voltage magnitude across selected MRAM cells of a first plurality of MRAM cells so as to permanently blow the corresponding tunnel dielectric layers of the selected MRAM cells. In the non-OTP write mode, the data write circuitry is configured to provide a lower write voltage magnitude across selected MRAM cells so as to set a magnetization of the corresponding free layer of each MRAM cell to modulate a resistance of each MRAM cell, without blowing the corresponding tunnel dielectric layer of each MRAM cell.Type: GrantFiled: December 14, 2018Date of Patent: June 30, 2020Assignee: NXP USA, INC.Inventors: Anirban Roy, Nihaar N. Mahatme
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Patent number: 10700797Abstract: Aspects of the disclosure are directed to providing signals utilizing two or more sources. As may be implemented in accordance with one or more embodiments, a method and/or apparatus involves processing respective signals carrying broadcast data provided by different receiver circuits that respectively receive the same broadcast data. The signals received from the respective receiver circuits are equalized, and corresponding sets of the broadcast data from each of the equalized signals are selectively combined to provide a combined signal carrying the broadcast data. This approach may be used, for example, to generate broadcast data utilizing source data from two or more receivers, such as may be received on different signal mediums (e.g., over-the-air digital radio and Wi-Fi digital radio), and therein providing enhanced reception.Type: GrantFiled: July 7, 2017Date of Patent: June 30, 2020Assignee: NXP B.V.Inventor: Naveen Jacob
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Patent number: 10700720Abstract: A wireless transmitter is disclosed. The wireless transmitter includes a digital signal generator arranged to generate a digital signal for transmission, a digital-to-analog converter arranged to convert the digital signal for transmission into analog form and a non-ideal amplifier arranged to amplify the analog signal for transmission. At least one harmonic reduction signal generator is arranged to generate at least one digital harmonic reduction signal and a summing junction is arranged to add the digital signal for transmission with the at least one harmonic reduction signal to form a combined signal. The non-ideal amplifier amplifies the combined signal to form an analog output signal. A controller is coupled to the digital signal generator and the at least one harmonic reduction signal generator.Type: GrantFiled: December 20, 2017Date of Patent: June 30, 2020Assignee: NXP B.V.Inventor: Siegfried Arnold
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Patent number: 10700719Abstract: A system that incorporates teachings of the present disclosure may include, for example, determining an operational criteria associated with a modulation type of a signal modulation. A single write command is generated for applying a group of tuning steps to a matching network of a mobile communication device. The group of tuning steps are determined according to the operational criteria associated with the modulation type of the signal modulation. The single write command is transmitted to a switch controller coupled to the matching network for adjusting settings of the group of switches according to the group of tuning steps to generate a desired tuning value without multiple write commands. Additional embodiments are disclosed.Type: GrantFiled: July 16, 2019Date of Patent: June 30, 2020Assignee: NXP USA, Inc.Inventors: Matthew Greene, Carsten Hoirup, Keith Manssen
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Patent number: 10700849Abstract: A method of implementing a keyed cryptographic operation using a plurality of basic blocks, includes: generating a balanced encoding function; applying the balanced encoding function to the output of a first basic block; and applying an inverse of the encoding function to the input of a second basic block, wherein the second basic block receives the encoded output of first basic block as an input.Type: GrantFiled: July 30, 2015Date of Patent: June 30, 2020Assignee: NXP B.V.Inventors: Wil Michiels, Philippe Teuwen
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Publication number: 20200204121Abstract: The embodiments described herein provide radio frequency (RF) amplifiers, and in some embodiments provide amplifiers that can be used in high power RF applications. Specifically, the amplifiers described herein may be implemented with multiple resonant circuits to provide class F and inverse class F amplifiers and methods of operation. In general, the resonant circuits are implemented inside a device package with a transistor die to provide high efficiency amplification for a variety of applications.Type: ApplicationFiled: December 19, 2018Publication date: June 25, 2020Applicant: NXP USA, INC.Inventors: NING ZHU, JEFFREY SPENCER ROBERTS, DAMON G. HOLMES