Abstract: A memory circuit includes a plurality of memory tiles. Each memory tile in the plurality of memory tiles includes a plurality of bit cells and a control circuit coupled to the plurality of bit cells. The control circuit is configured to provide latched data to the plurality of bit cells during write operations. A first write control line is coupled to the control circuit in a first memory tile, and the first write control line is configured to initiate a first write operation in the first memory tile. And a second write control line is coupled to the control circuit in a second memory tile, and the second write control line configured to initiate a second write operation in the second memory tile. The second write operation may be initiated before the first write operation is completed.

Abstract: An apparatus for performing a method for loading a matrix into an accelerator includes an augmented direct memory access controller reading a matrix, in a data stream, from a first memory associated with a system processor and sending the matrix, in the data stream, to a second memory associated with the accelerator. The method further includes the augmented direct memory access controller extracting individual matrix elements from the data stream as the data stream is being sent to the second memory and analyzing the extracted individual matrix elements to determine if the matrix is any of a plurality of tested matrix class types as the data stream is being sent to the second memory.

Abstract: A duty cycle correction circuit is disclosed. The duty cycle correction circuit includes an input stage, an output stage and a feedback component including a feedback amplifier and a low pass filter. The feedback component compares and adjusts the duty cycle of a signal from an input stage to a target value via a control voltage. The input stage reduces the rise and fall times of received signal to increase the duty cycle sensitivity to a control voltage from the feedback component. The output of the output stage is coupled to the input of the feedback component and the output stage amplifiers the duty cycle adjusted signal processed by both input stage and feedback component.

Abstract: Certain aspects of the disclosure are directed to methods and apparatuses for health monitoring of wireless connections among vehicles. An example method can include receiving as input to processing circuitry configured and arranged to monitor a health status of wireless communications links between a plurality of vehicles in a vehicle platoon, object information including coordinates of stationary and moving objects, and determining, using the received object information, a relative location of a vehicle among the plurality of vehicles in the vehicle platoon. The method further includes determining, based on the received object information and the relative location of the vehicle, physical parameters for line-of-sight wireless communications between the vehicle and other vehicles in the vehicle platoon. The health status of the wireless communications links can be determined between the plurality of vehicles in the vehicle platoon using the physical parameters for the line-of-sight wireless communications.

Abstract: Methods and systems are disclosed for performing contention based uplink (UL) orthogonal frequency division multiple access (OFDMA). The method may include receiving, from an access point using a channel, a first signal including an indication of a first time and a plurality of sub-channels of the channel. The method may include modifying a counter value in response to determining that the first time has been reached. The method may include selecting a sub-channel of the plurality of sub-channels in response to determining the counter value is equal to a threshold value. The method may include transmitting a second signal to the access point using the sub-channel. The methods and systems disclosed herein may be used by stations to associate with the access point.

Abstract: According to a first aspect of the present disclosure, a method for facilitating secure communication in a network is conceived, comprising: encrypting, by a source node in the network, a cryptographic key using a device key as an encryption key, wherein said device key is based on a device identifier that identifies a destination node in the network; transmitting, by said source node, the encrypted cryptographic key to the destination node. According to a second aspect of the present disclosure, a corresponding non-transitory, tangible computer program product is provided. According to a third aspect of the present disclosure, a corresponding system for facilitating secure communication in a network is provided.

Abstract: Embodiments are disclosed for semiconductor manufacturing using disposable test circuitry formed within scribe lanes. The manufacturing steps can include forming device circuitry within a semiconductor die and forming test circuitry within a scribe lane. One or more electrical connection route lines are also formed that connect the device circuitry and test circuitry blocks. Further, each die can be connected to a single test circuitry block, or multiple dice can share common test circuitry blocks. After testing, the electrical connection route line(s) are sealed, and the test circuitry is discarded when the device dice are singulated. For certain embodiments, the edge of the devices dice are encapsulated with a protective metal layer, and certain other embodiments include protective sealrings through which the connection route lines pass to enter the dice from the test circuitry blocks within the scribe lanes.

Abstract: A power converter including: a dual output resonant converter including a first output, a second output, a common mode control input, and a differential mode control input, wherein a voltage/current at the first output and a voltage/current at the second output are controlled in response to a common mode control signal received at the common mode control input and a differential mode control signal received at the differential mode control input; and a dual output controller including a first error signal input, a second error signal input, a common mode control output, and a differential mode control output, wherein the dual output controller is configured to generate the common mode control signal and the differential mode control signal in response to a first error signal received at the first error signal input and a second error signal received at the second error signal input, wherein the first error signal is a function of the voltage/current at the first output and the second error signal is a functio

Abstract: Systems and methods are provided that allow a secure processing system (SPS) to be implemented as a hard macro, thereby isolating the SPS from a peripheral processing system (PPS). The SPS and the PPS, combination, may form a secure element that can be used in conjunction with a host device and a connectivity device to allow the host device to engage in secure transactions, such as mobile payment over a near field communications (NFC) connection. As a result of the SPS being implemented as a hard macro isolated from the PPS, the SPS may be certified once, and re-used in other host devices without necessitating re-certification.

Abstract: A method of controlling a mobile device is described, the method comprising: receiving a time varying current or voltage of a signal generated on the terminals of an acoustic transducer of the mobile device, the time varying current or voltage being generated in response to a tapping and/or sliding motion on a surface of the mobile device performed by a user; comparing the time varying signal characteristics with a set of predetermined signal characteristics; and generating at least one user command in dependence of the comparison. The mobile device may reliably detect complex user commands using an acoustic transducer.

Abstract: A high-voltage automotive battery pack, system, architecture, and methodology include a first and second adjacent battery cells (410, 420) connected to a dual-cell supervisor circuit (412) that is positioned to bridge the first and second battery cells and that is connected to monitor the first and second battery cells, wherein the dual-cell supervisor circuit comprises current injection and impedance-detection circuitry (510) for separately measuring a voltage, impedance, and temperature at each of the first and second battery cells, alone or in combination with an external switched inductor (501) which is coupled to be switched across the first battery cell (505) or the second battery cell (506) to perform low-loss impedance measurement of the first and second battery cells.

Abstract: An integrated circuit device includes first and second semiconductor die and a physically unclonable function (PUF). The second semiconductor die is attached, at least partially, to the first semiconductor die using the PUF. The PUF includes a plurality of conductive paths formed between the first semiconductor die and the second semiconductor die. The PUF controller is coupled to the PUF for generating a digital value based on a characteristic of each conductor of the plurality of conductive paths. The digital value logically binds the first semiconductor die to the second semiconductor die. The first semiconductor die may include a nonvolatile memory and the digital value may be an encryption key for encrypting data stored in the nonvolatile memory.

Abstract: The present application relates to a methodology of verifying secret keys in a distributed network comprising a plurality of nodes connected to a shared medium. Each node of the plurality of nodes is member of at least one group of a plurality of groups. Each group is associated with a secret group key. A verification request is broadcast to the plurality of nodes and verification responses broadcast from the plurality of nodes are received. Each verification response comprises one code sequence for each logical group, of which the broadcasting node is member. Each code sequence of the verification request is generated on the basis of a secret group key associated with a respective logical group from a predefined data sequence. The code sequences are collected and the integrity of the plurality of nodes is confirmed by comparing the code sequences.

Abstract: A micro-electro-mechanical system (MEMS) device and a method of testing a MEMS device. The device includes a MEMS sensor having first and second mobile elements, first and second electrodes arranged to deflect the mobile elements by the application of test voltages, and a differential detector circuit. The device also includes an input multiplexer circuit configured selectively to connect each electrode to a test voltage source to apply a plurality of test voltages to deflect the mobile elements during a test mode. The test voltages comprise a set of monotonically increasing test voltages and a set of monotonically decreasing voltages for performing a C(V) sweep to test for stiction. The device further includes an output multiplexer circuit configured selectively to connect the first mobile element and/or the second mobile element to a single one of the inputs of the detector circuit to detect the deflection of the mobile element.

Abstract: A method is provided for performing a cryptographic operation in a white-box implementation on a mobile device. The cryptographic operation is performed in the mobile device for a response to a challenge from a mobile device reader. The mobile device reader includes a time-out period within which the cryptographic operation must be completed by the mobile device. In accordance with an embodiment, a first time period to complete the cryptographic operation on the mobile device is determined. A predetermined number of dummy computations are added to the cryptographic operation to increase the first time period to a second time period. The second time period is only slightly less than the time-out period by a predetermined safety value to make it less likely a relay attack with be successful.

Abstract: A magnetic field sensor for sensing an external magnetic field along a sensing direction comprises a sensor bridge. The sensor bridge has a first sensor leg that includes a first magnetoresistive sense element and a second sensor leg that includes a second magnetoresistive sense element. The first and second sense elements have respective a first and second pinned layers having corresponding first and second reference magnetizations. The second reference magnetization is oriented in an opposing direction relative to the first reference magnetization. The first and second sense elements have respective first and second sense layers, each having an indeterminate magnetization state. A permanent magnet layer is proximate the magnetoresistive sense elements. In the absence of an external magnetic field, the permanent magnet layer magnetically biases the indeterminate magnetization state of each sense layer in an in-plane orientation to produce a sense magnetization of the first and second sense layers.

Abstract: A through substrate via (TSV) and method of forming the same are provided. The method of making the TSV may include etching a via opening into the backside of semiconductor substrate, the via opening exposing a surface of a metal landing structure. A conductive layer is deposited over the backside of semiconductor substrate, sidewalls of the via opening, and exposed surface of the metal landing structure. The conductive layer is coated with a polymer material, filling the via opening. The polymer material is developed to remove the polymer material from the backside of semiconductor substrate, leaving the via opening filled with undeveloped polymer material. A planar backside surface of semiconductor substrate is formed by removing the conductive layer.

Abstract: A method and apparatus are provided to authenticate information embedded within radar signals. Radar signals comprising embedded information are received from a first sender. First position information is determined corresponding to a position of the first sender. Second position information associated with the embedded information is determined. The first and second position information is compared.

Abstract: An antenna system is provided that is capable of transmitting and receiving using near-field magnetic induction (NFMI). The antenna system includes a non-magnetic metallic core, a ferrite shield, and at least one electrically conducting winding. The ferrite shield is positioned between the non-magnetic metallic core and the electrically conducting winding. The non-magnetic metallic core may be a battery. The ferrite material forms a low impedance path for the magnetic field lines and increases inductance, thus providing increased energy efficiency and transmission quality. The antenna system is suitable for use in space constrained battery powered devices, such as hear instruments including hearing aids and earbuds.

Abstract: Aspects of the disclosure are directed to compensating for errors in in an analog-to-digital converter circuit (ADC). As may be implemented in accordance with one or more embodiments, an apparatus and/or method involves an ADC that converts an analog signal into a digital signal using an output from a digital-to-analog converter circuit (DAC). A compensation circuit generates a compensation output by, for respective signal portions provided to the DAC, generating a feedback signal based on an incompatibility between the conversion of the signal portions into an analog signal and the value of the signal portions provided to the DAC. A compensation output is generated based on the signal input to the DAC with a gain applied thereto, based on the feedback signal.