Abstract: A controller for a haptic feedback element is described, the haptic feedback element being configured to generate haptic vibrations, wherein the controller comprises a sense input and is configured to sense a signal induced on at least one terminal of the haptic feedback element in response to an external vibration source. The controller may sense vibrations induced one or more terminals of a haptic feedback element. The external vibration source may for example be due to speech transmitted via bone conduction which can be detected and subsequently processed.

Abstract: A low voltage level shifter that is suitable for use with subthreshold logic. In one embodiment, the low voltage level shifter includes first and second input transistors coupled to first and second input nodes, respectively, that receive complementary low voltage input signals. A circuit is coupled to the first and second input transistors and to first and second output nodes that generate complementary high voltage output signals. The circuit is configured to transmit a first current to the second output node when the first input transistor is activated, wherein the first current is substantially equal to current drawn by the first input transistor when it is activated. The circuit is also configured to transmit a second current to the first output node when the second input transistor is activated, wherein the second current is substantially equal to current drawn by the second input transistor when it is activated.

Abstract: The disclosure relates to a processing module of a receiver device and associated method and apparatus. The method comprises receiving a signal comprising one or more frames, each frame comprising a synchronization-symbol-portion, a security-sequence-portion, and a data-payload-portion; and processing the signal to perform carrier recovery, and excluding at least part of the security-sequence-portions of the one or more frames from the carrier recovery process.

Abstract: Hybrid power amplifier circuits, modules, or systems, and methods of operating same, are disclosed herein. In one example embodiment, a hybrid power amplifier circuit includes a preliminary stage amplification device, a final stage amplification device, and intermediate circuitry at least indirectly coupling the preliminary stage amplification device and the final stage amplification device. The intermediate circuitry includes a low-pass circuit and a high-pass circuit, and the hybrid power amplifier circuit is configured to amplify a first signal component at a fundamental frequency. Due at least in part to the intermediate circuitry, a phase of a second signal component at a harmonic frequency that is a multiple of the fundamental frequency is shifted.

Abstract: A current digital to analog converter (DAC) including an offset array including a plurality of unit cells of a first size, and a trimming array including a plurality of unit cells having the first size and a plurality of half cells, wherein the half cells have a larger size than the plurality of unit cells.

Abstract: In an embodiment, an integrated circuit (IC) device is disclosed. In the embodiment, the IC device includes an Ethernet frame processor, at least one Ethernet port coupled to the Ethernet frame processor, and a hardware synchronization circuit coupled to the Ethernet frame processor and to the at least one Ethernet port, the hardware synchronization circuit including a controller, a local clock, a media-independent peripheral coupled to the controller, and a media-dependent peripheral coupled to the media-independent peripheral, wherein power can be provided to the hardware synchronization circuit independent of the Ethernet frame processor.

Abstract: An embodiment of a microwave heating apparatus includes a solid state microwave energy source, a chamber, a dielectric resonator antenna with an exciter dielectric resonator and a feed structure, and one or more additional dielectric resonators each positioned within a distance of the exciter resonator to form a dielectric resonator antenna array. The distance is selected so that each additional resonator is closely capacitively coupled with the exciter resonator. The feed structure receives an excitation signal from the microwave energy source. The exciter resonator is configured to produce a first electric field in response to the excitation signal, and the first electric field may directly impinge on the additional resonator(s). Impingement of the first electric field may cause each of the additional resonators to produce a second electric field. The electric fields are directed into the chamber to increase the thermal energy of a load within the chamber.

Abstract: A method for k-bit Enumerative Sphere Shaping (ESS) of multidimensional constellations includes converting a first set of a plurality of uniformly distributed data bits from a serial data bit stream to a first unsigned amplitude sequence comprising a plurality of amplitudes bounded by a spherical constellation of maximum energy levels of a plurality of energy levels, wherein the first unsigned amplitude sequence has a Gaussian distribution and each of the energy levels is determined by a respective one of the amplitudes in the amplitude sequence. The first unsigned amplitude sequence is converted to a first shaped data bit sequence. The first shaped data bit sequence is combined with a second set of a one or more uniformly distributed data bits from the serial data bit stream to form a combined data stream. The combined data stream is mapped to a combined amplitude stream.

Abstract: A semiconductor package with an embedded capacitor and corresponding manufacturing methods are described. The semiconductor package with the embedded capacitor includes a semiconductor die having a first metal layer extending across at least a portion of a first side of the semiconductor die and a package structure formed on the first side of the semiconductor die. A first electrical conductor of the embedded capacitor is formed in the first metal layer of the semiconductor die. The package structure includes a second metal layer that has formed therein a second electrical conductor of the embedded capacitor. A dielectric of the embedded capacitor is positioned within either the semiconductor die or the package structure of the semiconductor package to isolate the first electrical conductor from the second electrical conductor of the embedded capacitor.

Abstract: Certain aspects of the disclosure are directed to a method for communicating data from a transmitting circuit to a receiving circuit over a noisy channel. The method can be performed by logic circuitry, and can include encoding data, for transmission over the noisy channel. The data can be encoded, as a shaped-coded modulation signal by shaping the signal based on an amplitude selection algorithm that leads to a symmetrical input and by constructing a trellis having a bounded-energy sequence of amplitude values selected by computing and storing a plurality of channel-related energy constraints based on use of a nonlinear-estimation process, and therein providing an index for the bounded-energy sequence of amplitudes. The method can also include receiving over the noisy channel, the shaped-coded modulation signal, and decoding the data from the shaped-coded modulation signal by using the index to reconstruct the bounded-energy sequence of amplitudes.

Abstract: A method of tuning inductive and/or capacitive components within an integrated circuit device. The method comprises measuring bare-die mounted performance of such a component formed within a semiconductor die, determining a package distribution layer pattern for the at least one component for achieving a desired performance for the at least one component based at least partly on the measured bare-die mounted performance, and packaging the semiconductor die with the determined package distribution layer pattern for the at least one component.

Abstract: A device for reading data from a first memory to a second memory based on real-time blank page detection includes a memory controller for reading a page of data from the first memory, a buffer for buffering a portion of the page data, a blank page pre-detection unit for generating a pre-detection result that indicates whether the page is a blank page based on a pre-determined part of the page data, a data processing unit for processing all of the page data to identify a page type, and a control unit for signaling the memory controller to read the page of data from the first memory and enabling the data processing unit based on the pre-detection result.

Abstract: A semiconductor device includes a semiconductor substrate configured to include a channel, a gate supported by the semiconductor substrate to control current flow through the channel, a first dielectric layer supported by the semiconductor substrate and including an opening in which the gate is disposed, and a second dielectric layer disposed between the first dielectric layer and a surface of the semiconductor substrate in a first area over the channel. The second dielectric layer is patterned such that the first dielectric layer is disposed on the surface of the semiconductor substrate in a second area over the channel.

Abstract: According to a first aspect of the present disclosure, a method of configuring a mobile device is conceived, comprising: determining a geographical location of said mobile device; retrieving one or more near field communication settings specific to the geographical location; applying and storing the near field communication settings to the mobile device. According to a second aspect of the present disclosure, a corresponding computer program is provided. According to a third aspect of the present disclosure, a corresponding system for configuring a mobile device is provided.

Abstract: A transistor includes a trench formed in a semiconductor substrate with the trench having a first sidewall and a second sidewall. A vertical field plate is formed in the trench and the vertical field plate is located between the first sidewall and the second sidewall. A gate electrode is formed in the trench with a first edge of the gate electrode proximate to the first sidewall and a second edge of the gate electrode proximate to the vertical field plate. A first dielectric material is formed in the trench between the first sidewall and the vertical field plate. A second dielectric material is formed in the trench between the vertical field plate and the second sidewall with the second dielectric material having a dielectric constant lower than that of the first dielectric material.

Abstract: A power-down signal generating circuit receives first and second supply voltages, where the first supply voltage is less than the second supply voltage, and generates a power-down signal. The power-down signal generating circuit includes a driving amplifier, first through third transistors, and an amplification circuit. When the first supply voltage is deactivated, the power-down signal is activated. The driving amplifier prevents the first through third transistors from being enabled simultaneously, which reduces static leakage current.

Abstract: A switching amplifier circuit (200) connected to drive an impedance-based output load (230) includes high side and low side switches (201-204) configured and connected to connect first and second supply voltage lines to first and second output nodes (ANTP, ANTN) in response to gating control signals, and also includes an output current sensing circuit for measuring a current through the output load with a current sensing resistor (Rs) connected between the second supply voltage line and a source of one or more split gate-source switching transistors (203C) in the low side gate-source switching transistor, where a voltage sense circuit connected across the current sensing resistor is configured to sample a voltage across the current sensing resistor for measuring a sense current at the current sensing resistor.

Abstract: A method and apparatus are provided for controlling a drive terminal of a power transistor by applying a turn-off voltage to the drive terminal at a turn-off time, measuring a gate current at the drive terminal to detect a predetermined gate current slope, determining a first time increment after the turn-off time when the predetermined gate current slope is detected, determining a second time increment which is proportional to the first time increment and which expires within a Miller plateau for the power transistor, and lowering the gate current at the drive terminal to a predetermined current level upon expiration of the second time increment in order to reduce overvoltages at the power transistor.

Abstract: A compensation circuit configured for coupling to a voltage source and a reference circuit. The voltage source is configured for supplying a supply voltage to the compensation circuit and the reference circuit. The reference circuit includes a first circuit node and a reference output electrically coupled to the first circuit node for outputting a reference signal having a constant reference amplitude. The compensation circuit includes a transient converter for converting a first transient perturbation of the supply voltage into a first compensation electrical signal proportional to said first transient perturbation, and an adder coupled to the transient converter for adding the first compensation electrical signal to an electrical signal at the first circuit node with a first polarity opposite to a disturbance polarity of a disturbance of the electrical signal in response to the first transient perturbation.

Abstract: Various embodiments relate to a method for producing a digital signature using a white-box implementation of a cryptographic digital signature function, including: receiving a input message; hashing the input message; generating a nonce based upon the input message and the white-box implementation of the cryptographic digital signature function; and computing a digital signature of the input using the nonce.