Patents Assigned to NXP
  • Patent number: 10574273
    Abstract: Embodiments described herein provide a method for dynamically scaling log-likelihood ratio (LLR) values of received data bits before decoding the received data bits. A plurality of data bits are received corresponding to a data packet. A first set of data bits of a first type are determined from the plurality of data bits based on a modulation scheme corresponding to the received data bits. A first LLR histogram is generated corresponding to the first set of data bits of the first type. A first scaling factor is calculated based on the first LLR histogram such that a first LLR value range corresponding to the first set of data bits is expanded to a maximum LLR value range. All LLR values are scaled by the first scaling factor. The scaled LLR values corresponding to the plurality of data bits are sent to a decoder.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: February 25, 2020
    Assignee: NXP USA, Inc.
    Inventors: Sri Varsha Rottela, Vijay Ahirwar
  • Patent number: 10573364
    Abstract: Embodiments of a magnetoresistive random access memory (MRAM) diagnostic system are provided, which includes: preconditioning all bit cells in an MRAM cell array to a data value of one during a diagnostic mode, wherein the MRAM cell array is implemented in an active side of a semiconductor substrate; applying a first magnetic disturb field having a predetermined field strength to the MRAM cell array, subsequent to the preconditioning, wherein the first magnetic disturb field is generated by an antenna implemented in a number of layers of conductive and dielectric material over the active side of the semiconductor substrate; performing a first error correcting code (ECC) read operation to read the MRAM cell array, subsequent to the applying the first magnetic disturb field; and in response to detecting at least one uncorrectable read during the first ECC read operation, setting a fail state and exiting the diagnostic mode.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: February 25, 2020
    Assignee: NXP USA, Inc.
    Inventors: Padmaraj Sanjeevarao, Richard Eguchi, Anirban Roy
  • Patent number: 10574198
    Abstract: An integrated circuit device includes a device substrate having first and second opposing surfaces, a first component electrode coupled to the first surface, and a conductive plane coupled to the second surface. The integrated circuit device also includes a plurality of through substrate vias electrically coupling a first region of the first component electrode to the conductive plane through the device substrate, wherein a second adjacent region of the first component electrode is substantially devoid of through substrate vias. Arrangement of the plurality of through substrate vias in the first region is based on a projected current distribution through the first component electrode when the integrated circuit device is operational.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: February 25, 2020
    Assignee: NXP USA, Inc.
    Inventors: Vikas Shilimkar, Daniel Joseph Lamey, Kevin Kim
  • Patent number: 10571354
    Abstract: A test chamber is used within a system for testing microelectromechanical systems (MEMS) pressure sensors. The system includes a processor, two air tanks pressurized to different air pressures, a high speed switch mechanism, and the test chamber. The test chamber houses a MEMS pressure sensor to be tested, a control pressure sensor, and a temperature sensor. The MEMS pressure sensor and the control pressure sensor are located in a cavity within the test chamber. The cavity is of minimal size and has a domed inner surface. A response time of the MEMS pressure sensor within the cavity can be characterized by utilizing the system and subjecting the MEMS pressure sensor to a pressure stimulus pulse produced by switching between the two air tanks.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: February 25, 2020
    Assignee: NXP USA, Inc.
    Inventors: Philippe Garre, Silvia Garre, William DeWitt McWhorter, Larry Dale Metzler
  • Patent number: 10574469
    Abstract: A physically unclonable function (PUF) is implemented using a PUF array of single-transistor cells organized as a plurality of word lines and intersecting bit lines. A single-transistor cell is connected to a word line and bit line at each of the intersections. A current source is coupled to each of the bit lines and provides a current when a PUF cell connected to the bit line is conductive. The bit lines are organized in pairs. A PUF evaluation engine is coupled to the PUF array and provides an address for selecting a word line of the PUF array in response to a challenge. A comparator is coupled to each pair of bit lines of the PUF array for detecting a current. The comparator provides a voltage signal in response to detecting a difference current between the first and second bit line. The PUF evaluation engine receives the voltage signal and generates a logic bit.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: February 25, 2020
    Assignee: NXP USA, INC.
    Inventors: Brad John Garni, Nihaar N. Mahatme, Alexander Hoefler
  • Patent number: 10573594
    Abstract: A single semiconductor device package that reduces electromagnetic coupling between elements of a semiconductor device embodied within the package is provided. For a dual-path amplifier, such as a Doherty power amplifier, an isolation feature that separates carrier amplifier elements from peaking amplifier elements is included within the semiconductor device package. The isolation feature can take the form of a structure that is constructed of a conductive material coupled to ground and which separates the elements of the amplifier. The isolation feature can be included in a variety of semiconductor packages, including air cavity packages and overmolded packages. Through the use of the isolation feature provided by embodiments of the present invention a significant improvement in signal isolation between amplifier elements is realized, thereby improving performance of the dual-path amplifier.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: February 25, 2020
    Assignee: NXP USA, Inc.
    Inventors: Peter H. Aaen, David J. Dougherty, Manuel F. Romero, Lakshminarayan Viswanathan
  • Patent number: 10573107
    Abstract: A method is provided for authenticating a transceiver in a keyless entry system for a vehicle. The method uses a collision avoidance radar system on the vehicle for authenticating a key fob radar transceiver. A lower power radar signal is transmitted from the vehicle. The lower power radar signal is transmitted below an ambient noise level to make the radar signal difficult for an attacker to detect. The key fob transceiver is then authenticated as being a legitimate transceiver for accessing the vehicle using the low power radar signal. A distance bounding scheme may be used to determine if the key fob is within a predetermined distance. Challenge/response communications may be used to authenticate that the key fob is the legitimate key fob.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: February 25, 2020
    Assignee: NXP B.V.
    Inventor: Jan-Peter Schat
  • Patent number: 10574303
    Abstract: This specification discloses methods and devices for emulating a tag device that communicates via inductive coupling, such as a NFC (Near Field Communication) tag device. In some embodiments, this specification discloses methods and devices to use this tag device “emulation” for testing, validating, calibrating, and characterizing a reader device. In some embodiments, a tag emulation device can emulate movement of the tag emulation device relative to the reader device by changing configuration parameters of the tag emulation device and by not actually moving the tag emulation device relative to the reader device. In some embodiments, these configuration parameters changes include: changing a Tx (transmitter) voltage, changing a Tx driver impedance, changing a HF (high frequency) attenuator resistance, changing a Tx output modulation, changing a matching network tuning, changing a phase of a Tx signal versus a carrier signal from the reader device, enabling one or two Tx drivers.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: February 25, 2020
    Assignee: NXP B.V.
    Inventors: Gernot Hueber, Ian Thomas Macnamara
  • Patent number: 10574393
    Abstract: The present disclosure describes methods and apparatuses for phase-based cyclic redundancy check (CRC) verification for wireless communication. In some aspects, a soft phase value and a sliced phase value are received for a symbol of a data packet, the data packet received via a wireless interface. An error measurement is determined for the symbol based on the soft phase value and the sliced phase value. The error measurement for the symbol is then compared to an error measurement threshold for detecting symbol-level errors in the data packet. Based on the error measurement exceeding an error measurement threshold, a bit error can be detected in the data packet, which may have passed CRC. By detecting the bit error despite a CRC pass, the bit error can be indicated to higher-level entity of the wireless interface. This can be effective to prevent the bit error from impairing operation of the higher-level entity.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: February 25, 2020
    Assignee: NXP USA, Inc.
    Inventors: Vijay Ganwani, Ankit Sethi, Sudhir Srinivasa, Sih-Yu Lin, Yui Lin
  • Patent number: 10572261
    Abstract: A task identifier-based mechanism is configured to temporarily disable a dual-issue capability of one or more threads in a superscalar simultaneous multi-threaded core. The core executes a first thread and a second thread which are each provided with a dual-issue capability wherein up to two instructions may be issued in parallel. In response to a task identifier being received that is indicative of a task requiring an improved level of determinism, the dual-issue capability of at least one of the first thread or the second thread is temporarily disabled.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: February 25, 2020
    Assignee: NXP USA, Inc.
    Inventors: Alistair Paul Robertson, James Andrew Collier Scobie
  • Patent number: 10574281
    Abstract: A device includes a near field communication (NFC) module for generating an electromagnetic carrier signal and modulating the carrier signal according to data to be transmitted, and an antenna coupled to and driven by the NFC module with the modulated carrier signal. The device includes an analog front end coupled between the NFC module and the antenna. The device further includes a digital gain control (DGC) block for controlling gains in a first and second baseband amplifiers (BBAs). The DGC block includes a first clipping detector for correlating in-phase input signals with a subcarrier pattern and a second clipping detector for correlating quadrature input signals with the subcarrier pattern, and further includes a signal energy correction block adapted to output a number of correction ticks for a numerically controlled oscillator (NCO) based on a number of gain updates performed for the first or the second BBAs.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: February 25, 2020
    Assignee: NXP B.V.
    Inventors: Ulrich Andreas Muehlmann, Radha Srinivasan, Stefan Mendel
  • Patent number: 10574318
    Abstract: A first-transceiver system for use in an antenna diversity scheme. The first-transceiver system comprising: a first-receiver; a first-time/clock-generation-unit; a first-transmitter; and a timing-controller. The first-receiver is configured to receive a wireless first-common-signal from a third-party-transmitter, wherein the first-common-signal is representative of a common-signal transmitted by the third-party-transmitter. The timing-controller is configured to: receive signaling representative of the first-common-signal; receive signaling representative of a wireless second-common-signal as received at a second-transceiver, the wireless second-common-signal being representative of the common-signal; and generate a timing-signal based on the first-common-signal and the second-common-signal.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: February 25, 2020
    Assignee: NXP B.V.
    Inventors: Lars van Meurs, Alessio Filippi, Arie Koppelaar, Marinus van Splunter
  • Patent number: 10572794
    Abstract: In accordance with a first aspect of the present disclosure, a near field communication (NFC) ring is provided, comprising a processing unit and one or more rotatable components, wherein said processing unit is configured to perform one or more predefined functions in response to one or more predefined rotations of said components. In accordance with a second aspect of the present disclosure, a method of operating a near field communication (NFC) ring is conceived, said NFC ring comprising a processing unit and one or more rotatable components, wherein said processing unit performs one or more predefined functions in response to one or more predefined rotations of said components. In accordance with a third aspect of the present disclosure, a corresponding computer program is provided.
    Type: Grant
    Filed: September 8, 2018
    Date of Patent: February 25, 2020
    Assignee: NXP B.V.
    Inventor: Srikanth Dandamudi
  • Patent number: 10574218
    Abstract: A digital glitch filter for filtering glitches in an input signal includes a first flip-flop for generating a filtered output signal, and a self-oscillating circuit for generating a self-oscillating clock signal. A first logic gate enables the self-oscillating circuit when the filtered output signal is not equal to the input signal. A ripple counter generates a divided clock signal by dividing the self-oscillating clock signal. A counter and comparator counts the divided clock signal to obtain a count number and compares the count number with a predetermined count target. A second flip-flop, which is connected to the counter and comparator, generates a valid signal, which is activate when the count number reaches the count target. The valid signal is input to the first flip-flop such that the filtered output signal toggles when the valid signal is active.
    Type: Grant
    Filed: January 1, 2019
    Date of Patent: February 25, 2020
    Assignee: NXP USA, Inc.
    Inventors: Zhixiong Lin, Mingqin Xie, Yong Zhu
  • Patent number: 10574312
    Abstract: The present disclosure describes apparatuses and methods for interference cancellation in multi-antenna receivers. In some aspects, a packet transmitted through a wireless environment is received via multiple antennas of a receiver, the packet being affected by interference of the wireless environment. The receiver multiplies signals of the packet with an interference cancellation matrix to provide reduced-interference signals of the packet from which a first portion of the interference is removed. Based on a first set of the reduced-interference signals of the packet, the receiver provides a reduced-interference channel estimate. A second portion of the interference is then removed from a second set of the reduced-interference signals using the reduced interference channel estimate. By so doing, the receiver may reduce effects of interference of the wireless environment (e.g., interfering packets or signals) to improve receive performance (e.g.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: February 25, 2020
    Assignee: NXP USA, Inc.
    Inventors: Xiayu Zheng, Hongyuan Zhang, Sudhir Srinivasa
  • Publication number: 20200057136
    Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a radar system is disclosed. The method involves generating a chirp signal having a repeating pattern of chirps, each chirp in the repeating pattern of chirps having a base frequency and a chirp bandwidth, wherein the repeating pattern of chirps includes at least two chirps that differ from each other in at least one of base frequency and chirp bandwidth, transmitting a radar signal according to the chirp signal, receiving radio frequency energy that includes a reflected portion of the radar signal, and selecting for processing from the received radio frequency energy a signal that matches the repeating pattern of chirps of the chirp signal.
    Type: Application
    Filed: August 14, 2018
    Publication date: February 20, 2020
    Applicant: NXP B.V.
    Inventors: Michael Johannes Doescher, Abdellatif Zanati, Cicero Silveira Vaucher
  • Publication number: 20200059204
    Abstract: The embodiments described herein provide radio frequency (RF) amplifiers, and in some embodiments provide amplifiers that can be used in high power RF applications. Specifically, the amplifiers described herein may be implemented to include one or more matching networks with the transistor(s) and inside the device package in a way that may facilitate operation at high frequencies and over wide bandwidths. Specifically, the amplifiers can be implemented with matching networks that include inductive and capacitive elements arranged in double T-match configuration, where at least some inductive elements are implemented with bond wires and the capacitive elements are implemented with integrated passive devices (IPDs). In such implementations the double T-match configuration of the matching network can be fully implemented inside the package, and may provide the amplifier with high frequency, wide bandwidth performance.
    Type: Application
    Filed: August 14, 2018
    Publication date: February 20, 2020
    Applicant: NXP USA, INC.
    Inventors: IJAZ KAHLOON, WARREN HENRY BRAKENSIEK
  • Patent number: 10567127
    Abstract: A communication device generates a physical layer (PHY) preamble of a multi-user (MU) PHY data unit. The PHY preamble includes a first signal field, and a second signal field. The second signal field includes: a common field that includes a value, selected from a codebook, that indicates i) an allocation of frequency resources to one or more resource units, wherein each resource unit corresponds to a respective block of consecutive orthogonal frequency division multiplexing (OFDM) tones, and ii) a respective number of receiving devices assigned to each resource unit. The second signal field also includes a plurality of user-specific fields that indicate an allocation of the one or more resource units to the multiple receiving devices, wherein each user-specific field corresponds to a respective receiving device and includes i) an identifier of the respective receiving device, and ii) an indication of which one or more spatial streams are allocated to the respective receiving device.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: February 18, 2020
    Assignee: NXP USA, Inc.
    Inventors: Yakun Sun, Hongyuan Zhang, Liwen Chu, Lei Wang, Jinjing Jiang, Mingguang Xu
  • Patent number: 10566690
    Abstract: One example discloses a near-field circuit configured to be coupled to a near-field antenna wherein the near-field antenna includes, a first conductive structure, a second conductive structure, a first feeding connection, and a second feeding connection, wherein the conductive structures are configured to transmit and/or receive non-propagating quasi-static electric (E) field signals, the near-field circuit including: a transmit circuit having a first coupling connection and a second coupling connection; a voltage boost circuit configured to be coupled in series between the first coupling connection of the transmit circuit and the first feeding connection of the near-field antenna; wherein the second coupling connection of the transmit circuit is configured to be coupled to the second feeding connection of the near-field antenna.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: February 18, 2020
    Assignee: NXP USA, Inc.
    Inventor: Anthony Kerselaers
  • Patent number: 10566268
    Abstract: A package to die connection system and method are provided. The system includes a semiconductor device having a substrate with a top surface. A gasket is affixed to the top surface of the substrate and has at least one cavity with a portion of the cavity open to a sidewall of the gasket. A semiconductor die is attached to the top surface of the substrate. A sidewall of the semiconductor die is abutted with the sidewall of the gasket. A portion of a metal layer is exposed to the open portion of the cavity. A pillar located in the cavity is electrically connected to the exposed portion of the metal layer.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: February 18, 2020
    Assignee: NXP USA, INC.
    Inventors: Mark Douglas Hall, Walter J. Ciosek, David Russell Tipple