Abstract: In accordance with a first aspect of the present disclosure, a biometric sensing system is provided, comprising: a sensor module configured to generate sensing data; a processing unit configured to process data received from said sensor module; wherein the sensor module and the processing unit are communicatively coupled to each other via a universal synchronous asynchronous receiver transmitter (USART) communication interface. In accordance with a second aspect of the present disclosure, a corresponding communication method is conceived. In accordance with a third aspect of the present disclosure, a corresponding computer program is provided.

Abstract: Apparatus are provided for amplifier systems and related circuits are provided. An exemplary circuit includes a main amplifier arrangement, first impedance matching circuitry coupled between the output of the main amplifier arrangement and a first circuit output, a peaking amplifier arrangement, and second impedance matching circuitry coupled between the output of the peaking amplifier arrangement and a second output of the circuit. In one exemplary embodiment, the first impedance matching circuitry and the second impedance matching circuitry have different circuit topologies and different physical topologies.

Abstract: A linear regulator is disclosed, comprising: a transistor having a control terminal, a first main terminal being a supply terminal connected to a supply input, and a second main terminal being an output terminal configured to provide a regulated output at an output connection; an error amplifier having a reference input, a feedback input and an output connected to the control terminal; a reference current source; a reference circuit configured to provide a reference voltage to the reference input from the reference current source; and a feedback circuit from the second main terminal through a feedback resistance (Rfb) and configured to provide a feedback voltage to the feedback input of the error amplifier; wherein the feedback circuit and the reference circuit include a common resistance (Rtail, Rd3), and at least one of the reference circuit and the reference circuit comprises a capacitive path (Cref) to a ground.

Abstract: A method for configuring level shifter spare cells includes providing a power rail connectable to a corresponding power domain, and providing a spare cell including a level shifter circuit. The level shifter circuit has first and second terminals that are connectable to the power rail, and the first and second terminals are floating with respect to the power rail.

Abstract: A system for simultaneously driving a plurality of antennas for transmission of an electromagnetic wave includes a first terminal, a second terminal, a first driver coupled to the first terminal, and a second driver coupled to the second terminal. The system includes a circuit configured to generate an indication of a phase difference between a first current through the first terminal and a second current through the second terminal. The system includes a control circuit configured to enable the first driver and the second driver to concurrently drive a first signal through the first terminal and a second signal through the second terminal, respectively, and configured to adjust a delay between the first signal and the second signal based on the indication of the phase difference and a predetermined target phase difference.

Abstract: Various embodiments are directed to electrostatic discharge (ESD) protection apparatus comprising a bipolar junction transistor (BJT) having terminals, a field-effect transistor (FET) having terminals, and a common base region connected to a recombination region. The BJT and the FET are integrated with one another and include a common region that is shared by the BJT and the FET. The BJT and FET collectively bias the common base region and prevent triggering of the BJT by causing a potential of the common base region to follow a potential of one of the terminals of the BJT in response to an excessive but tolerable non-ESD voltage change at one or more of the terminals.

Abstract: A method including receiving, by an antenna combiner of a wireless communication system, a set of Random Access Channel (RACH) sequences of a first RACH signal from a first antenna and a set of RACH sequences of a second RACH signal from a second antenna. The method further including selecting, by the antenna combiner, each RACH sequence of the set of RACH sequences of a selected RACH signal from a selected antenna that has a best Signal to Interference plus Noise Ratio (SINR) from each RACH sequence of the set of RACH sequences of the first RACH signal from the first antenna that has a first SINR and each RACH sequence of the set of RACH sequences of the second RACH signal from the second antenna that has a second SINR.

Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.

Abstract: Analog-to-digital conversion is tested in-field using an on-chip built-in self-test (BIST) sub-circuit formed within an underlying integrated circuit. Processing cycles may be conscripted during an idle state when the analog-to-digital conversion is not needed. The BIST requires a test time which may be compared to an idle time. If the idle time exceeds the test time, then the BIST may be entirely performed. However, if the idle time is unknown or less than the test time, the BIST may be paused and resumed between subsequent idle states.

Abstract: A system and method to record and trace data exchanges between cooperating hardware unit operations and software unit operations, providing an efficient mechanism to trace back to a root cause point from an observed failure point in a series of executed instructions performed within a data processing system. A data debug memory records information pertaining to each system memory access performed by instructions executed by the hardware and software units into separate memory information blocks. Linked relationships are created between certain ones of the memory information blocks to represent data dependencies that occurred between the instructions. These linked relationships may then be utilized to generate lists that map the various data dependencies between the executed instructions.

Abstract: An embodiment of a system includes an RF signal source, a first electrode, a second electrode, and a cavity configured to receive an electrodeless bulb. The RF signal source is configured to generate an RF signal. The first electrode is configured to receive the RF signal and to convert the RF signal into electromagnetic energy that is radiated by the first electrode. The cavity is defined by first and second boundaries that are separated by a distance that is less than the wavelength of the RF signal so that the cavity is sub-resonant. The first electrode is physically positioned at the first boundary, and the second electrode is physically positioned at the second boundary. The first electrode, the second electrode, and the cavity form a structure that is configured to capacitively couple the electromagnetic energy into the electrodeless bulb when the electrodeless bulb is positioned within the cavity.

Abstract: A power converter including a buck converter to receive input power and set operating voltages of the power converter, a current sensing circuit to determine an input current of the power converter, a charge pump circuit to store charge delivered by the voltage regulation circuit and output to a load and to a battery pack a current larger than the input current, and a battery pack controller to control switching and provide feedback within the power converter.

Abstract: A successive approximation register, SAR, analog-to-digital converter, ADC, (400) is described. The SAR ADC (400) includes: an analog input signal (410); an ADC core (414) configured to receive the analog input signal (410) and comprising: a digital to analog converter, DAC (430) located in a feedback path; and a SAR controller (418) configured to control an operation of the DAC (430), wherein the DAC (430) comprises a number of DAC cells, arranged to convert a digital code from the SAR controller (418) to an analog form; a digital signal reconstruction circuit (450) configured to convert the digital codes from the SAR controller (418) to a binary form; and an output coupled to the digital signal reconstruction circuit (450) and configured to provide a digital data output (460).

Abstract: An apparatus includes a digital-to-analog converter (DAC) and an independently controlled biasing circuit coupled to the DAC. The DAC includes at least a first transistor and a second transistor, where the first and second transistors are configured to provide output signals for the DAC. The biasing circuit includes a third transistor having a body coupled to the third transistor source and this source is coupled to a first transistor body and to a second transistor body of the first and second transistors of the DAC. A current loop is coupled to the source and the drain of the transistor of the biasing circuit that maintains a substantially same value of current in the biasing circuit as in the DAC.

Abstract: One example discloses a vibration sensor, comprising: an RF receiver circuit configured to receive an RF input signal; an RF signal characterization circuit configured to measure an attribute of the RF input signal over a set time-period; wherein the attribute of the RF input signal varies based on a physical motion between the vibration sensor and an RF source transmitting the RF input signal; and a vibration profiling circuit configured to map the attribute of the RF input signal to a vibration level.

Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a wired communications device involves including a frame boundary bit sequence and a random data sequence as a preamble of a bit stream, encoding the bit stream into an encoded bit stream, and transmitting the encoded bit stream using the wired communications device.

Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a wired communications device involves performing a bit mapping operation on an input bit stream to generate a mapped bit stream, performing a bit scrambling operation in response to the mapped bit stream to generate a scrambled bit stream, generating an encoded bit stream in response to the scrambled bit stream, and transmitting the encoded bit stream using the wired communications device.

Abstract: Embodiments of methods and systems for automatic power control (APC) in a communications device that communicates via inductive coupling are described. In an embodiment, a method for APC in a communications device that communicates via inductive coupling involves obtaining multiple system parameters, determining an APC configuration of the communications device from the system parameters, and controlling a transmission configuration of the communications device based on the APC configuration. Other embodiments are also described.

Abstract: Certain aspects of the disclosure are directed to electrostatic discharge protection of an integrated circuit clock. According to a specific example, circuitry includes a direct-current power supply, a voltage-controlled oscillation (VCO) circuit, an electrostatic protection circuit, and a voltage regulator. The VCO circuit has an oscillation frequency and includes an amplification circuit and capacitance circuitry. The electrostatic protection circuit is arranged to connect power to the VCO circuit while reducing variation in the oscillation frequency of the VCO circuit resulting from electrostatic energy. The voltage regulator is connected between the direct-current power supply and a power supply connection at which the direct-current power is connected to the VCO, and is configured to mitigate an imbalance of electric charges from adversely altering a tuning capacitance of the VCO established by the capacitance circuitry.

Abstract: Methods and systems are disclosed to adjust communication links within wireless networks based upon composite link quality indicators (LQIs). Packet communications are received by a network node through a communication link from a separate network node within a wireless network. The network node can also be configured to transmit packet communications from the network node through the communication link to the separate network node. The network node generates composite LQI measurements for the received packet communications, and the composite LQI measurements are based upon signal strength measurements for the received packet communications and also based upon signal quality measurements for the received packet communications. The network node then adjusts the communication link based upon the composite LQI measurements.