Abstract: A method of processing a semiconductor wafer includes forming a plurality of die in the semiconductor wafer. The semiconductor wafer has a first brittleness. The top surface the semiconductor wafer undergoes grinding to leave an inner planar surface and a rim, wherein the rim extends above the inner planar surface and around a perimeter of the grinded semiconductor wafer. The first encapsulant material is formed over the inner planar surface and contained within the rim to form a composite semiconductor wafer that has a second brittleness less than the first brittleness. The composite semiconductor wafer is singulated into the plurality of die in which each die of the plurality of die is a composite structure die.

Abstract: A packaged RF device is provided that utilizes flexible circuit leads. The RF device includes at least one integrated circuit (IC) die configured to implement the RF device. The IC die is contained inside a package. In accordance with the embodiments described herein, a flexible circuit is implemented as a lead. Specifically, the flexible circuit lead is coupled to the at least one IC die inside the package and extends to outside the package, the flexible circuit lead thus providing an electrical connection to the at least one IC die inside the package.

Abstract: A CAN module comprising a bit duration compensation component arranged to generate a compensated transmit command signal for controlling the driver component to drive a dominant state on the CAN bus. The compensated transmit command signal comprises dominant bits of a compensated-bit duration Tbit_cp=Tbit_Tx+tc, wherein tc comprises a compensation offset derived at least partly from a difference between a transmit-bit duration of a digital transmit command signal and a receive-bit duration of a received data signal.

Abstract: A magnetic field sensor for sensing an external magnetic field along a sensing direction oriented perpendicular to a plane of the magnetic field sensor comprises a sensor bridge. The sensor bridge has a first sensor leg that includes a first magnetoresistive sense element and a second sensor leg that includes a second magnetoresistive sense element. The first and second sense elements include respective first and second pinned layers having corresponding first and second reference magnetizations within the plane and oriented in the same direction. The first and second sense elements further include respective first and second sense layers, each having an indeterminate magnetization state. A permanent magnet layer is proximate the magnetoresistive sense elements. In the absence of an external magnetic field, the permanent magnet layer magnetically biases the indeterminate magnetization state of each sense layer to produce a sense magnetization of the first and second sense layers.

Abstract: A transistor includes a semiconductor substrate having an intrinsic active device, a first terminal, and a second terminal. The transistor also includes an interconnect structure formed of layers of dielectric material and electrically conductive material on the semiconductor substrate. The interconnect structure includes a pillar, a tap interconnect, and a shield structure positioned between the pillar and the tap interconnect formed from the electrically conductive material and extending through the dielectric material. The pillar contacts the first terminal and connects to a first runner. The tap interconnect contacts the second terminal and connects to a second runner. The shield structure includes a base segment, a first leg, and a second leg extending from opposing ends of the base segment, wherein the first and second legs extend from opposing ends of the base segment in a direction that is antiparallel to a length of the base segment.

Abstract: In a video system, a video source, e.g., a camera, provides a source video stream. The source video stream comprises a stream of image data units. A buffer control unit writes the image data units consecutively to a circular buffer. A display control unit reads the image data units consecutively from the circular buffer to generate a target video stream in accordance with a read delay. The display control unit comprises a feedback loop which controls timing of the operation of reading the image data units from the circular buffer so as to reduce a difference between the read delay and a reference delay. The video system may, for example, be installed in a vehicle, e.g., for providing a driver with a live view from a camera.

Abstract: A semiconductor device includes a leadframe having a flag and a plurality of bond terminals. A semiconductor die is attached to the leadframe at the flag. A bond pad is formed on the semiconductor die. A top surface layer of the bond pad includes copper having a predetermined grain orientation. A bond wire includes a first end and a second end. The bond wire is attached to the bond pad at the first end and attached to one of the bond terminals in the plurality at the second end.

Abstract: A method for secure transactions on a mobile handset or tablet equipped with a touch screen controlled by a secure processor such as a master secure element or Trusted Execution Environment having gesture recognition capabilities. Since the touch screen is fully controlled by the secure processor, the user can securely enter the transaction amount using gestures to validate the transaction.

Abstract: A method of obscuring software code including a data array and a plurality of operations, including: identifying, by a processor, a data array with an index to be obscured and an operation using the data array; permutating the identified data array using a permutating function; and replacing the identified operation using the permutated data array and equivalent encoded permutation function.

Abstract: Systems and apparatus are provided for solid-state oscillators and related resonant circuitry. An exemplary oscillator system includes an amplifier having an amplifier input and an amplifier output and resonant circuitry coupled between the amplifier output and the amplifier input. In exemplary embodiments, the resonant circuitry includes an annular resonance structure that is substantially symmetrical and includes a pair of arcuate inductive elements. In accordance with one or more embodiments, the resonant circuitry includes an additional inductive element that is capacitively coupled to the annular resonance structure via an air gap to improve the quality factor of the resonant circuitry.

Abstract: Semiconductor devices with cross-domain electrostatic discharge (ESD) protection and related fabrication methods are provided. An exemplary semiconductor device includes first domain circuitry, second domain circuitry, and an interface coupled between an output node of the first domain driver circuitry and second domain receiver circuitry. The receiver circuitry includes a transistor having a gate electrode coupled to the interface, with a body electrode of the transistor being coupled to protection circuitry of the first domain circuitry. The body electrode is effectively biased to a reference voltage node of the first domain by the protection circuitry in response to an ESD event to protect the gate oxide of the transistor from a potentially damaging ESD voltage.

Abstract: A plated hole with a sidewall plating. The plated hole has a vent opening that has a sidewall of non-conductive material that is not plated. During attachment of a joint conductive material such as solder to the sidewall plating, gasses generated from the attachment process are outgassed through the vent opening.

Abstract: Microelectronic systems having embedded heat dissipation structures are disclosed, as are methods for fabricating such microelectronic systems. In various embodiments, the method includes the steps or processes of obtaining a substrate having a tunnel formed therethrough, attaching a microelectronic component to a frontside of the substrate at a location covering the tunnel, and producing an embedded heat dissipation structure at least partially within the tunnel after attaching the microelectronic component to the substrate. The step of producing may include application of a bond layer precursor material into the tunnel and onto the microelectronic component from a backside of the substrate. The bond layer precursor material may then be subjected to sintering process or otherwise cured to form a thermally-conductive component bond layer in contact with the microelectronic component.

Abstract: Methods and systems for achieving semiconductor-based circuits or systems having multiple components with one or more matched or similar characteristics or features are disclosed herein. In one example embodiment, a system includes a processing device that includes first, second, and third circuitry. The first circuitry is configured to generate control signals that at least indirectly cause a pick and place head mechanism to attempt to pick up and place at least some of first and second dice. The second circuitry is configured to assess whether attempts to implement one or more of first and second dice should be skipped based upon wafer map information. Further, the third circuitry is configured to determine whether a second position of a first one of the second dice is sufficiently proximate to a first position so that it would be appropriate to implement the first one of the second dice.

Abstract: An embodiment of an amplifier has a bandwidth defined by low and upper cutoff frequencies. The amplifier includes an input impedance matching circuit and a transistor. The transistor has a gate, a first current conducting terminal coupled to an output of the amplifier, and a second current conducting terminal coupled to a reference node. The input impedance matching circuit has a filter input coupled to an input of the amplifier, a filter output coupled to the gate of the transistor, and a multiple pole filter coupled between the filter input and the filter output. A first pole of the filter is positioned at a first frequency within the bandwidth, and a second pole of the filter is positioned at a second frequency outside the bandwidth. The input impedance matching circuit is configured to filter the input RF signal to produce a filtered RF signal at the filter output.

Abstract: An automotive security apparatus, comprising: a security-terminal, configured to receive security-location-information representative of a location of the automotive security apparatus or a vehicle key; and a vehicle-location-terminal, configured to receive vehicle-location-information representative of a location of a vehicle, a processor, configured to compare the security-location-information with the vehicle-location-information, and determine a security-condition-signal based on whether the location of the automotive security apparatus or the vehicle key is inside or outside of a predetermined-proximity of the location of the vehicle; and an output-terminal, configured to provide the security-condition-signal.

Abstract: An integrated circuitry includes a first logic block coupled between a first power supply terminal and a second power supply terminal. The first logic block includes a first scan chain and a configurable defect coupled to a scan output node of the first scan chain. The configurable defect has a logic node and a conductive element coupled between the logic node and the first or the second power supply terminal. The configurable defect is configured to, during a quiescent current testing mode, place a predetermined logic state on the logic node such that a current flows through the conductive element. The current can be detected by external equipment.

Abstract: A method for implementing a non-volatile counter using non-volatile memory is disclosed. In an embodiment, the method involves distributing operations for storing a low word of a counter in non-volatile memory across memory cells in a memory array in the non-volatile memory, and storing additional bits of the counter in the non-volatile memory in memory cells outside of the memory array, wherein the location in the memory array at which the low word is stored is determined for each count based on the upper bits of the counter.

Abstract: A method of identifying a component by a response to a challenge is disclosed, the component comprising an array of bipolar transistors connectable in parallel so as to have a common collector contact, a common emitter contact and a common base contact, the challenge comprising a value representative of a total collector current value, the method comprising: receiving the challenge; supplying the total collector current to the common collector contact; detecting instability in each of a group of the transistors; and determining the response in dependence on the group. A circuit configured to operate such a method is also disclosed.

Abstract: A semiconductor device includes a first dielectric layer on a substrate, the first dielectric layer including a first dielectric portion over a first doped well region of a first conductivity type and a second dielectric portion over a second doped well region of a second conductivity type, and a second dielectric layer on the substrate directly adjacent the first dielectric layer. The second dielectric layer is over the second doped well region. A first conductive gate structure is over the first and second dielectric layers. A third dielectric layer is on the substrate over the second doped well region and separated a first distance from the second dielectric layer. A second conductive gate structure is over the third dielectric layer. A third doped region of the second conductivity type is implanted in the second doped well region a second distance from the third dielectric layer and the second conductive gate structure.