Abstract: A display system for displaying a media stream based on a given access point includes a decoder for decoding frames of the media stream, and an evaluation unit for scoring macro blocks (MBs) of a current frame. A score of an intra-MB is defined as a predetermined value, and a score of an inter-MB is generated based on scores of MBs in previously decoded frames. A controller signals a display to skip the current frame or start to display the media stream from a qualified frame identified using the scores of the MBs of at least the current frame.

Abstract: A public key architecture (160) includes a dual certificate hierarchy which facilitates two independent authentication functions. One of the authentication functions authenticates an authentication device (164) to a verification device (166). The other authentication function authenticates a configuration device (162) to the authentication device (164). In some embodiments, the authentication process uses a lightweight certificate formed in conjunction with a lightweight signature scheme (370).

Abstract: A method for providing an integrated circuit such that first and second sensing electrodes respectively have at their surfaces first and second receptor molecules for selectively binding to first and second analytes of interest; exposing the integrated circuit to a sample potentially comprising at least one of the first and second analytes, providing a first bead having a first electrical signature attached to a first molecule having a conformation/affinity for binding to the first sensing electrode dependent on the presence of the first analyte; providing a second bead having a second electrical signature attached to a second molecule having a conformation/affinity for binding to the second sensing electrode dependent on the presence of the second analyte; and determining the presence of the electrical signature of the first and/or second bead(s) on the first and second sensing electrodes respectively. An IC for implementing this method.

Abstract: A voice activation system is described including a first voice activity detector for receiving a first signal from a microphone; a second voice activity detector for receiving a second signal from a speaker; a voice detector output coupled to the output of the first voice activity detector and the second voice activity detector. The first detector and the second detector are operable to generate an output signal in response to a candidate speech signal received on the respective detector inputs and the voice activation system is configured to generate a voice detector output signal when at least one of the first detector output and the second detector output indicate that speech has been detected. The voice activation system may reduce the average power consumption and increase the recognition rate of an always-on voice activation solution for headsets or other mobile audio devices.

Abstract: Disclosed is a transistor having a first region of a first conductivity type for injecting charge carriers into the transistor and a laterally extended second region of the first conductivity type having a portion including a contact terminal for draining said charge carriers from the transistor, wherein the first region is separated from the second region by an intermediate region of a second conductivity type defining a first p-n junction with the first region and a second p-n junction with the second region, wherein the laterally extended region separates the portion from the second p-n junction, and wherein the transistor further comprises a substrate having a doped region of the second conductivity type, said doped region being in contact with and extending along the laterally extended second region and a further contact terminal connected to the doped region for draining minority charge carriers from the laterally extended second region.

Abstract: An integrated circuit die includes a stack of a substrate and multiple layers extending in parallel to the substrate. A number of integrated electronic components is formed in the stack, and connected to form an electronic circuit. The electronic circuit comprises a first electric contact, a second electric contact, and a coupling which couples the electric strips electrically to each other. The coupling includes a circuit via which extends through at least two of the layers. The die further includes an integrated current sensor having a coil arrangement for sensing a current flowing through a part of the electronic circuit. The coil arrangement is magnetically coupled to the circuit via over at least a part of a length of the circuit via to sensing a magnetic flux through the circuit via. A measurement unit can measure a parameter of the coil arrangement representative of a current flowing through the circuit via.

Abstract: The use of a netlist or other database containing topological information of an electrical circuit comprising a multiplicity of components which are to undergo safe operating area (SOA) checking, permits a relationship between recorded SOA errors to be established. Knowing how such errors may be interdependent can assist designers in deciding which errors should be rectified first. The relationship between the recorded errors relating to two connected components may be modified by a confidence factor based on elapsed time between the occurrence of the two recorded errors.

Abstract: Reader (420) for determining the validity of a connection to a transponder (440), designed to measure a response time of a transponder (440) and to authenticate the transponder (440) in two separate steps. Transponder (440) for determining the validity of a connection to a reader (420), wherein the transponder (440) is designed to provide information for response time measurement to said reader (420) and to provide information for authentication to said reader (420) in two separate steps, wherein at least a part of data used for the authentication is included in a communication message transmitted between the reader (420) and the transponder (440) during the measuring of the response time.

Abstract: A woven signal-routing substrate for a wearable electronic device has conductive warps and wefts that are woven with each other and with insulative warps and wefts. Woven electrical cross-connections are formed at some of the intersections of the conductive warps and wefts, while no electrical cross-connections are formed at other intersections, to provide a signal-routing architecture for the substrate that can be used to route signals between electronic components of the wearable device. Non-connecting intersections are formed using insulative warps that are sufficiently thicker than the relatively thin conductive warps to enable a conductive weft to cross a conductive warp without making physical contact at intersection locations where an electrical cross-connection is not desired. The woven electrical cross-connections may be formed at other intersection locations using weaving topologies that ensure that the corresponding mutually orthogonal warps and wefts do contact one another.

Abstract: A device including a processor and a memory is disclosed. The memory includes a noise spectral estimator to calculate noise spectral estimates from a sampled environmental noise, a speech spectral estimator to calculate speech spectral estimates from the input speech, a formant signal to noise ratio (SNR) estimator to calculate SNR estimates using the noise spectral estimates and speech spectral estimates within each formant detected in a speech spectrum. The memory also includes a formant boost estimator to calculate and apply a set of gain factors to each frequency component of the input speech such that the resulting SNR within each formant reaches a pre-selected target value.

Abstract: There is described a contactless communication device. The device comprises (a) a receiver unit (110, 610) having an antenna input (RXn, Vmid, RXp) for connecting to an antenna, the receiver unit (110, 610) being adapted to couple with a transmitting device and to receive an RF signal transmitted by the transmitting device, the receiver unit (110, 610) being further adapted to determine a point of time relating to a position of data within the RF signal, (b) a comparator (120) adapted to generate a comparator output signal (agc_comp) which is indicative of a relation between a voltage at the antenna input (RXn, Vmid, RXp) of the receiver unit (110, 610) and a reference voltage (Vref), and (c) a voltage regulation circuit coupled to the comparator (120) and to the antenna input (RXn, Vmid, RXp) of the receiver unit (110, 610), the voltage regulation circuit being adapted to repetitively regulate the voltage at the antenna input (RXn, Vmid, RXp) based on the comparator output signal (agc_comp).

Abstract: A touch sensitive capacitive keypad system (300) is provided with a keypad sensing electrode (304) disposed within sensing proximity of multiple electrodes (E0-E9) and formed under a keypad touch panel having defined key areas, where the electrodes are respectively aligned with the defined key areas to facilitate touch detection at the keypad touch panel with a controller (310) that is configured to determine which of the plurality of defined key areas is being touched by detecting a predetermined signal characteristic at the keypad sensing electrode (304) before sequential scanning the plurality of capacitive key electrodes to identify which capacitive key electrode is aligned with a defined key area being touched.

Abstract: In some embodiments, a substrate contact is formed by forming a first gate structure and a second gate structure. The first gate structure is formed in a first volume in a first area of the wafer and the second gate structure is formed in a second volume in a second area of the wafer. The gate dielectric is removed from the wafer in a first area of the wafer but remains in the second area. A first sidewall spacer formed for the gate structure and a second sidewall spacer is formed for the second gate structure. In some embodiments, the first gate structure can be utilized as a substrate contact and the second gate structure can be utilized as a gate of a transistor. In other embodiments, the first gate structure and the second gate structure can be removed and a metal gate material can be deposited in opening for forming a substrate contact and a metal gate, respectively.

Abstract: There is disclosed a method of predicting an ambient temperature around a mobile device, wherein: a primary temperature sensor comprised in said mobile device measures a first temperature value; at least one secondary temperature sensor comprised in said mobile device measures a second temperature value; a processing unit comprised in said mobile device calculates a first prediction of an ambient temperature around the mobile device in dependence on the first temperature value and at least one parameter which is indicative of a thermal influence of one or more mobile device components on the measurements; the processing unit calculates a second prediction of said ambient temperature in dependence on the second temperature value and said parameter; the processing unit compares the first prediction with the second prediction and adjusts said parameter if the difference between the first prediction and the second prediction exceeds a predefined maximum.

Abstract: A system-on-chip includes a processing core and a memory controller connected between the core and an external memory. A clock divider receives an internal clock signal and outputs a divided clock signal. The memory controller uses the divided clock signal to establish an interface communication frequency with the memory. A boot control logic circuit, connected to the clock divider, compares a check data pattern to a predefined data pattern read from the memory by the memory controller at the interface frequency. When the predefined and check data patterns do not match, the boot control logic circuit instructs the clock divider to adjust the divided clock signal to change the interface frequency, after which the predefined data pattern reading and comparison are repeated, and when the predefined and check data patterns match, the memory controller reads a boot program, executed by the core, from the memory at the interface frequency.

Abstract: Digital pre-distortion is performed on a received signal using a set of pre-distortion coefficients to produce a digital pre-distorted signal. The digital pre-distorted signal is converted to an analog signal, which is amplified to produce a transmission output signal. The transmission output signal is converted to a digital feedback signal. A plurality of fractional delay filters is applied to the digital feedback signal to obtain a plurality of fractional delay compensated (FDC) candidates, and gain compensation is applied to each of the plurality of FDC candidates to obtain a plurality of gain and fractional delay compensated (XFT) candidates. The digital pre-distorted signal is used as a reference signal, and the XFT candidates and the reference signal are used to select a selected XFT candidate of the plurality of XFT candidates. The selected XFT candidate is used to generate the set of pre-distortion coefficients.

Abstract: Embodiments of a semiconductor packaged device and method of making thereof are provided, the device including a substrate; a first flip chip die mounted to a first major surface of the substrate; a second flip chip die mounted to the first major surface of the substrate, the second flip chip die laterally adjacent to the first flip chip die on the first major surface; and a wire bond formed between a first bond pad on the first flip chip die and a second bond pad on the second flip chip die.

Abstract: An information processing device includes a control unit, a hash unit, and a comparison unit. The control unit runs a program and to store flow control information of the program in a call stack. The hash unit generates a first hash value by applying a hash function to selected data in response to a first context change of the program. The control unit starts or resumes a second process or thread of the program only when the hash unit has generated the first hash value. The hash unit generates a second hash value by re-applying the hash function to the selected data in response to a second context change. The first and second context changes include a termination or interruption of the first process or thread and the second process or thread. The comparison unit determines whether the first hash value and the second hash value are identical.

Abstract: A device is disclosed. The device includes a baseboard including a first set of metallic contact pads, a semiconductor integrated chip (IC) package including a second set of metallic contact pads and metallic interconnects to connect the first set of metallic contacts pads and the second set of metallic contact pads through metallic interconnects. The second set of metallic contact pads includes a first group of contact pads and a second group of contact pads. The first group of contact pads are designed to carry a high frequency signal. The baseboard includes a plurality of holes that at least partially segregates a first group of metallic interconnects that connects the first group of contact pads to the baseboard and a second group of metallic interconnects that connects the second group of contact pads to the baseboard.

Abstract: A semiconductor device includes a plurality of wire bonds formed on a surface of the semiconductor device by bonding each of a plurality of copper wires onto corresponding ones of a plurality of aluminum pads; a protective material is applied around the plurality of wire bonds, the protective material having a first pH; and at least a portion of the semiconductor device and the protective material are encapsulated with an encapsulating material having a second pH, wherein the first pH of the protective material is for neutralizing the second pH of the encapsulating material around the plurality of wire bonds.