Abstract: An analog-to-digital converter including a converter arrangement configured to provide a digital output signal as an output of the analog-to-digital converter based on an analog input signal comprising an input to the analog-to-digital converter, the analog-to-digital converter including a calibration module configured to provide calibration signalling to set one or more of a gain of one or more components of the converter arrangement and an offset of one or more components of the converter arrangement, the calibration module further configured to provide, as an output, diagnostic information based on the calibration signalling for use in determining the occurrence of a fault in the analog-to-digital converter.

Abstract: One example discloses a voltage reference, including: a bandgap circuit core having a first intermediate bandgap voltage output, a second intermediate bandgap voltage output, and a bandgap voltage reference output; an amplifier having a first input, a second input, an input offset, an output, and an input_offset_trim; a trim controller; a switch matrix coupled between the bandgap circuit, the amplifier and the trim controller; wherein the switch matrix has a functional configuration and a calibration configuration; wherein in the functional configuration of the switch matrix, the first intermediate bandgap voltage output is coupled to the first input of the amplifier and the second intermediate bandgap voltage output is coupled to the second input of the amplifier; and wherein in response to the calibration configuration of the switch matrix, the trim controller is coupled to adjust the input offset of the amplifier using the input_offset_trim.

Abstract: A memory system includes a core power supply node configured to provide a core power supply; backup regulator configured to provide a backup power supply; memory configured to be powered by the core power supply or the backup power supply; threshold detection circuitry configured to provide a first indicator that when asserted indicates the core power supply has fallen to a first threshold, a second indicator that when asserted indicates the core power supply has fallen to a second threshold, and a third indicator that when asserted indicates the core power supply has fallen to a third threshold. The memory system also includes power sequence detection circuitry is configured to determine, upon the core power supply falling and based on which of the first, second, and third indicators are asserted, whether the asserted indicators have been asserted in a correct sequence and provide a first test result accordingly.

Abstract: A system for assigning addresses to a plurality of communication nodes coupled via a power line is disclosed. Each of the plurality of communication nodes includes a current sensor. The plurality of communication nodes includes one master communication node and the master communication node is configured to start an auto-addressing process by asking the each of the plurality of communication nodes to sink a preselect amount of current and measure current, through the current sensor, flowing through the powerline under the each of the plurality of communication nodes. A first communication node in the plurality of communication nodes that does not measure any current flowing under the first communication node is assigned a first address.

Abstract: A digital-to-analog converter (DAC) includes a plurality of resistive elements connected together in series to form a ring of resistive elements. A node is formed by each of the connections of adjacent resistive elements of the ring. Groups of parallel-connected switches are coupled to each node. A first switch of the group of switches is for selectively coupling a first power supply voltage terminal to the node. A second switch of the group of switches is for selectively coupling a second power supply voltage to the node. A third switch of the group of switches is for selectively coupling an output terminal to the node. A differential or single-ended analog output may be provided. Mismatch induced error is removed using a mismatch error shaping technique that shapes the errors outside a pass-band.

Abstract: A data processor is disclosed. The data processor includes a data processing module. The data processing modules includes an input for receiving an input signal, an output for providing a quantized output signal, a combining unit configured to combine a feedback signal from the output with the input signal and a quantizer configured to provide the quantized output signal based on the combined signal. The data processor further includes a correction module configured to receive the quantized output signal, generate a full-scale digital signal based on the quantized output signal, determine a metastability error in the full-scale digital signal and provide a compensated output signal based on the quantized output signal and the determined metastability error.

Abstract: Switched mode power supply (SMPS) with a control circuitry and method of operating such a SMPS are described. The control circuitry includes a first driver to drive an input switch in response to a driving signal, a pulse circuit to generate a pulse signal in response to the driving signal, a timer circuit to generate a delayed signal in response to the pulse signal and a second driver to drive to the output switch in response to the delayed signal.

Abstract: Switched mode power supply (SMPS) with at least one active clamp circuit and method of operating such a SMPS are described. The active claim circuit utilizes a clamp switch, a Zener diode and a clamp capacitor that are connected in series between one side of a particular winding of a transformer and the other side of the particular winding of the transformer.

Abstract: In an embodiment, a method for analyzing signals from a pixelated capacitive sensor is disclosed. The method involves classifying capacitance signals from sensor cells of a pixelated capacitive sensor into at least one class based on capacitance values for sensor cells indicated by corresponding capacitance signals and assigning an attribute to sensor cells based on the classification of the corresponding capacitance signals.

Abstract: A method, system, and apparatus are provided for debugging a compiled computer program having one or more variables by generating variable location information for a first variable stored in a CPU register that is parsed from runtime disassembly information for the compiled computer program and used to generate a pattern to search for the first variable in the runtime disassembly information to identify a program address for the first variable that can be used to set a software program watchpoint for the first variable.

Abstract: Capacitive micromachined ultrasound transducer (CMUT) module and method for manufacturing the CMUT module are described. The CMUT module includes a CMUT array and an integrated circuit (IC) die. The CMUT array includes a CMUT membrane, a layer of cells and a plurality of CMUT elements with first metal contacts. The CMUT elements are separated by isolation trenches that do not extend into any cavity of the cells. The IC die includes second metal contacts that are attached to the first metal contacts of the CMUT elements of the CMUT array by eutectic bonds to provide electrical and structure connections between the CMUT array and the IC die.

Abstract: Embodiments of an electrostatic discharge (ESD) protection device and a method of operating an ESD protection device are described. In one embodiment, the ESD protection circuit is connected between a VDD rail and a VSS rail and includes an internal floating ESD rail located between the VDD rail and the VSS rail, I/O pins connected between the internal floating ESD rail and the VSS rail, ESD diodes corresponding to at least one I/O pin, an internal bias cell corresponding to an I/O pin and configured to short the corresponding I/O pin to the internal floating ESD rail when the I/O pin is pulled high, and an internal bias cell corresponding to a VDD pin of the VDD rail and configured to short the VDD rail to the internal floating ESD rail when the VDD pin is pulled high.

Abstract: Embodiments of a control device for an electronic fuse and a method for controlling an electronic fuse are described. Embodiments of a control device for an electronic fuse may include an interface configured to receive a current from a transistor device of the electronic fuse. Additionally, the control device may further include a sense-and-control device coupled to the interface and configured to detect an increase in the current received at the interface under a standby mode of the electronic fuse and to output an interrupt signal in response to the increase in the current received at the interface.

Abstract: A semiconductor device includes a circuitry die and a solar cell die. The circuitry die includes a plurality of interconnect layers on a front side of the circuitry die, a metallization layer on a back side of the circuitry die, and at least one TSV (through substrate via) that makes an electrical connection between a last metal interconnect layer on the front side of the circuitry die and the metallization layer on the back side of the circuitry die. The solar cell die is configured to power the circuitry die. The solar cell die includes a transparent contact on a front side of the solar cell die. A back side of the solar cell die is attached to the back side of the circuitry die and makes electrical contact with the metallization layer on the back side of the circuitry die.

Abstract: An integrated circuit and method are provided. The integrated circuit comprises: a digital core configured to output a first voltage signal; and a first input/output cell; wherein the first input/output cell is configured to convert the first voltage signal to a first current signal and provide the first current signal to circuitry external to the integrated circuit.

Abstract: A radar device comprises at least one transmitter unit for transmitting a radar signal, at least one receiver unit for receiving a reflected radar signal, and a phase shift unit for producing a phase shift in the frequency modulated radar signal in response to a phase shift signal. The receiver unit comprises at least one filter unit for filtering the received signal and is arranged for resetting the filter unit in response to said phase shift signal, so as to avoid saturation of the filter unit due to the phase shift.

Abstract: A semiconductor device includes a semiconductor die having a top side and a bottom, active side. During assembly of the semiconductor device, a metal film is sputtered over the top and side surfaces of the die, and then a mold compound is formed over the metal film. The metal film can provide both heat dissipation and EMI shielding. The device may be assembled using a wafer level assembly process.

Abstract: A magnetic field sensor is disclosed for providing an output signal in response to an external magnetic field. The sensor comprises a primary magnetic field transducer for producing a primary signal in response to the external magnetic field and having a first magnetic field saturation characteristic; a secondary magnetic field transducer for producing a secondary signal in response to the external magnetic field and having a second magnetic field saturation characteristic. The first magnetic field saturation characteristic is different from the second magnetic field saturation characteristic. The sensor is configured to use the secondary signal to correct for errors in the output signal arising from saturation of the primary transducer.

Abstract: The exemplary embodiments of the invention realize an efficient prevention of massive infiltration of cloned RFID transponders into existing and new RFID systems. Furthermore, reader devices used for authentication of RFID transponders do not need to be on-line and do not need to be equipped with a Security Authentication Module (SAM). This simplifies authentication procedures and reduces costs. According to an exemplary embodiment of the invention a transponder-specific originality signature is stored by a transponder manufacturer on the transponder. The transponder-specific originality signature may, for example, be stored in the non-volatile memory (EEPROM) of the transponder during the fabrication of the transponder. This transponder-specific originality signature can be checked at any time in a convenient way, which provides an indication of originality of said transponder.

Abstract: An electromagnetic induction wireless transceiver system including: a magnetic antenna; an electric antenna including first and second plates, the first plate being connectable to a body; and a power driver configured to produce a modulating signal used to drive the magnetic antenna and the electric antenna to produce electromagnetic induction fields, wherein the transceiver when connected to a body in a first location is configured to transmit power to a second electromagnetic induction wireless transceiver connected to a second location a distance from the first location, wherein the first and second locations are connected through magnetic and electric near-field coupling.