Abstract: Aspects of the invention relate to an integrated circuit device and method of production thereof. The integrated circuit device comprises at least one application semiconductor die comprising at least one functional component arranged to provide application functionality, at least one functional safety semiconductor die comprising at least one component arranged to provide at least one functional safety undertaking for the at least one application semiconductor die, and at least one System in Package, SiP, connection component operably coupling the at least one functional safety semiconductor die to the at least one application semiconductor die to enable the at least one functional safety semiconductor die to provide the at least one functional safety undertaking for the at least one application semiconductor die.

Abstract: A FlexRay network guardian including: a resetting leading coldstart node (RLCN) detector configured to detect a RLCN failure; a deaf coldstart node (DCN) detector configured to detect a DCN failure; a babbling idiot (BI) detector configured to detect a BI failure; and a FlexRay network decoder configured to output a signal regarding the status of the FlexRay network to the RLCN detector, DCN detector, and BI detector, wherein the RLCN detector, DCN detector, and BI detector are configured to send an indication of a failure to a containment module.

Abstract: An embodiment of an amplifier system includes a modifiable signal adjustment device with an RF signal adjustment circuit coupled between first and second nodes. The RF signal adjustment circuit includes an adjustable phase shifter and an adjustable attenuator coupled in series with each other. The device also includes a memory and a controller circuit. The controller circuit retrieves a phase shift value and an attenuation value from the memory. The controller circuit then controls the adjustable phase shifter to apply a phase shift corresponding to the phase shift value to an input RF signal received at the first node, and controls the adjustable attenuator to apply an attenuation corresponding to the attenuation value to the input RF signal. Applying the phase shift and the attenuation results in an output RF signal at the second node.

Abstract: A switching controller circuit for a power converter includes analog and digital control circuits, a clock enable circuit, and a digital pulse width modulation (PWM) circuit. When the power converter is in a standby mode, the switching controller circuit operates in an analog control mode by activating the analog control circuit. When the power converter is not in standby mode, the switching controller circuit activates the digital control circuit and operates in a digital control mode. The switching controller circuit uses inexpensive electronic components and consumes less power in the analog control mode, thereby reducing standby mode power consumption.

Abstract: Multi-bit data flip-flops are disclosed that provide bit initialization through propagation of scan bits. Input multiplexers are configured to select between input data bits and input scan bits based upon mode select signals. Master latches receive and latch outputs from the input multiplexers. Slave latches receive and latch outputs from the master latches and also provide propagated input scan bits to the input multiplexers. A first state for the mode select signals selects the input data bits for a data mode of operation, and a second state for the mode select signals selects the input scan bits for a scan mode of operation. Further, the input multiplexers, master latches, and slave latches are configured to operate in an initialization mode to pass a fixed input scan bit through the multi-bit data flip-flop based upon initialization signals (e.g., set and/or reset signals).

Abstract: A method including receiving, by an image classification engine, a number K of clusters to be created by a clustering algorithm. The method further including receiving, by the image classification engine, a set of elements based on an image, executing, by the image classification engine, the clustering algorithm on the set of elements to create K clusters, each cluster having a respective subset of the set of elements, for each cluster, computing, by the image classification engine, a centroid of the cluster, for each cluster, creating, by the image classification engine, a generator of the cluster based on the respective subset of the set of elements corresponding to each cluster, and for each element of each cluster, computing, by the image classification engine, a cost function corresponding to the element based on the centroid, the respective subset of the set of elements, and the generator corresponding to the cluster.

Abstract: A script-driven head-up display controller comprising an image warping unit and an image projection unit wherein the image warping unit is coupled to the image projection unit and is adapted to: receive a line-based warping descriptor comprising first information associated with a distortion caused by a non-flat display; and, in response to the reception of the line-based warping descriptor, the image warping unit is further adapted to, based on the line-based warping descriptor: fetch one or more lines of the source image; and, output to the image projection unit at least one output line of the output image associated with an electronic image warping of one or more pixels of the one or more input lines, and wherein the line-based warping descriptor further comprises second information associated with buffer management instructions calculated off-line.

Abstract: A method and information processing system with improved cache organization is provided. Each register capable of accessing memory has associated metadata, which contains the tag, way, and line for a corresponding cache entry, along with a valid bit, allowing a memory access which hits a location in the cache to go directly to the cache's data array, avoiding the need to look up the address in the cache's tag array. When a cache line is evicted, any metadata referring to the line is marked as invalid. By reducing the number of tag lookups performed to access data in a cache's data array, the power that would otherwise be consumed by performing tag lookups is saved, thereby reducing power consumption of the information processing system, and the cache area needed to implement a cache having a desired level of performance may be reduced.

Abstract: A parallel decoder for decoding compressed video picture data including inter-coded picture item data with motion vector data. A decoding module decodes picture data stored in a temporary storage. The decoding module includes an inter-prediction module that uses inter-prediction item data to decode an inter-coded picture item by referring to already decoded reference picture item data. The structure of inter-prediction item data in the temporary storage is a function of the positions of corresponding reference picture items. The decoding order of stored inter-prediction item data by the inter-prediction module is prioritized as a function of a decoding order of reference picture item data.

Abstract: A relaxation oscillator for generating a low temperature coefficient (LTC) clock signal includes a reference voltage generator and an oscillator. The reference voltage generator generates an LTC current and a bandgap reference voltage. The reference voltage generator includes positive temperature coefficient (PTC) resistors to compensate for the effects of temperature variations. The oscillator receives the LTC current and the bandgap reference voltage, and generates a clock signal. In another embodiment, the reference voltage generator generates a charge current that varies with temperature. The oscillator receives the charge current and generates first and second output signals. Set and reset comparators include PTC resistors that determine the gains of the set and reset comparators. The PTC resistors compensate for variation in the first and second output signals due to the temperature variations by varying the gains of the set and reset comparators.

Abstract: The invention provides a processing system, comprising a memory comprising a processor call stack; a stack space usage register configured to determine the stack space usage of the processor call stack and to store a usage parameter indicative of the determined stack space usage; a first threshold register configured to store a pre-determinable first stack level threshold; and a first comparator configured to compare the usage parameter with the first stack level threshold and to output a first interrupt blocking signal, if the usage parameter exceeds the first stack level threshold, the first interrupt blocking signal being configured to block the decoding of interrupt signals input to the processing system and having interrupt priorities lower than or equal to or just lower than a first interrupt priority threshold. The invention further provides a method for stack management, especially in a processing system.

Abstract: A half-bridge circuit comprises a high supply contact and a low supply contact. A half-bridge output contact is connectable to drive a load and has a high-side between the high supply contact and the half-bridge output contact and a low-side between the half-bridge output contact and the low supply contact. A high-side bidirectional vertical power transistor at the high-side has a source connected to the high supply contact, and a low-side bidirectional vertical power transistor at the low-side, transistor has a source connected to the low supply contact. The high-side bidirectional vertical power transistor and low-side bidirectional vertical power transistor are connected in cascode and share a common drain connected to the half-bridge output contact, and are controllable to alternatingly allow a current flow from the high supply contact to the half-bridge output contact or from the half-bridge output contact to the low supply contact.

Abstract: A remote antenna system is provided. The remote antenna system comprises an antenna controller circuit and a remote antenna circuit coupled to the antenna controller circuit by a cable. The remote antenna system further comprises a bidirectional data signal path for carrying transmit and received data signals between the antenna controller circuit and the remote antenna circuit; and a control path for carrying control information between the antenna controller circuit and the remote antenna circuit. The control path is a bidirectional control path. The control path comprises a transmit circuit comprising an input to receive control information and configured to convert the control information into a series of pulses; and a receive circuit comprising a comparator circuit configure to receive the series of pulses and reconstruct them to the control signal.

Abstract: A device for performing a mapping an input message to an output message by a keyed cryptographic operation, wherein the keyed cryptographic operation includes a plurality of rounds. To protect against differential fault analysis attacks, the cryptographic operation is modified to apply a secret sharing approach to one of the rounds. Also, a portion of the computations are split into first and second shares, where the first share uses a first weight and the second share uses a second weight. The final operations are again merged into a single matrix multiplication. Cryptographic operations that have a substitution function and an affine transformation can be protected in this way.

Abstract: A power converter and a method for controlling a power converter are disclosed. The method involves generating a common mode control signal and a differential mode control signal in response to a first error signal and a second error signal, wherein the first error signal is a function of the voltage/current at a first output of a dual output resonant converter and the second error signal is a function of the voltage/current at a second output of the dual output resonant converter. The method also involves adjusting the voltage/current at the first output of the dual output resonant converter and the voltage/current at the second output of the dual output resonant converter in response to the common mode control signal and the differential mode control signal.

Abstract: A method for operating an RFID device is disclosed. In the embodiment, the method involves establishing a radio-frequency link, receiving signal samples of the radio-frequency link, determining the offset of an initial phase of the link by filtering noise from the signal samples, windowing the filtered signal samples, and calculating an offset value from phase differences between the windows of signal samples, and modifying a configuration profile based on the offset value. During data transmission the configuration profile can be used to configure the transmitter in order to maintain the constant phase during transmission.

Abstract: A current-mode DC-DC converter includes a power switch and a reset circuit for providing a resettable input signal to the switch. A first feedback loop, coupled to the switch, provides a control signal to the reset circuit to instigate the resettable input signal when a ramp voltage reaches a target peak current value. An inductor is coupled to the switch. A second current control feedback loop includes a current sense circuit that monitors an inductor current influenced by an output of the switch, and a slope compensation circuit for introducing a ramp voltage to a sensed voltage of the switch to control power switch on/off to limit the inductor current. The converter is characterized by a slope compensation effect cancellation circuit coupled to the current sense circuit via the second feedback loop for sensing an inductor peak current and controlling power switch on/off in response to the inductor peak current.

Abstract: One or more characteristics of devices are ascertained in accordance with one or more aspects of the disclosure. As may be consistent with one or more embodiments, the attachment of an external circuit to an input port is detected based on a resistance value presented by the external circuit. A resistance range that includes the resistance value presented at the input port is determined, in response to detecting the attachment, by dynamically coupling one or more of a plurality of resistor-based circuits relative to the input port. A signal presented by the external circuit on the input port is coded based on the determined resistance range, using one or more of the resistor-based circuits, and the code is used to identify a type of the external circuit. These aspects can provide for the communication of power and data with a variety of different types of external circuits.

Abstract: A silicon controlled rectifier (SCR) circuit is configured to shunt electrostatic discharge (ESD) current from a node to a reference voltage. The SCR circuit includes a first bipolar PNP transistor having a first emitter connected to the node, a first base, and a first collector. A second bipolar NPN transistor has a second collector sharing a first region with the first base, a second base sharing a second region with the first collector, and an emitter electrically connected to the reference voltage. A guard region is configured and arranged to delay triggering of the SCR circuit in response to an ESD event by impeding current flow in the second region.

Abstract: A circuit is provided for ringing suppression. The circuit comprises a termination resistor coupled to a bus via a switch; and a control circuit. The control circuit comprises an input coupled to a data input pin of a bus transceiver and an output coupled to control the termination resistor. The circuit is configured to selectively couple the resistor to the bus in response to a transition on the input bit stream.