Abstract: An embodiment of an amplifier system includes a modifiable signal adjustment device with an RF signal adjustment circuit coupled between first and second nodes. The RF signal adjustment circuit includes an adjustable phase shifter and an adjustable attenuator coupled in series with each other. The device also includes a memory and a controller circuit. The controller circuit retrieves a phase shift value and an attenuation value from the memory. The controller circuit then controls the adjustable phase shifter to apply a phase shift corresponding to the phase shift value to an input RF signal received at the first node, and controls the adjustable attenuator to apply an attenuation corresponding to the attenuation value to the input RF signal. Applying the phase shift and the attenuation results in an output RF signal at the second node.

Abstract: An interrupt management system for managing multiple interrupts includes a timer and an interrupt management sub-system. The interrupt management sub-system receives first and second interrupts, determines the first interrupt to be a real-time interrupt and the second interrupt to be a non-real-time interrupt, initializes the timer for a predetermined time period on reception of the first interrupt, and determines whether the second interrupt is either a maskable or non-maskable interrupt. The interrupt management sub-system transmits the first interrupt to an interrupt controller, en-queues the second interrupt during the predetermined time period, and transmits the second interrupt to the interrupt controller after the predetermined time period when the second interrupt is a maskable interrupt. The interrupt management sub-system transmits the second interrupt to the interrupt controller during the predetermined time period when the second interrupt is a non-maskable interrupt.

Abstract: A phase locked loop circuit includes a voltage controlled oscillator, VCO, configured to receive an oscillator tuning voltage; a phase detector configured to receive an input signal and a reference signal and generate a phase difference pulse signal that is varied in accordance with the oscillator tuning voltage; a loop filter having an input and an output; and a level shifter circuit coupled to an output of the phase detector and the loop filter input and configured to apply a level shift to the phase difference pulse signal such that the level shift is configured to compensate VCO gain and the loop filter averages the phase difference pulse signal to output an averaged signal to the VCO.

Abstract: A memory includes a first memory cell; and a second memory cell. A selectable current path is coupled between the first memory cell and the second memory cell. The selectable current path includes a first transistor. A first amplifier is coupled in a first feedback arrangement between the first memory cell and the first transistor. During a read operation of the first memory cell, a current through the first memory cell is substantially equal to a current through the second memory cell. The memory cell may include a magnetic tunnel junction (MTJ).

Abstract: A method and system are provided for error correction in a memory. Error correction code (ECC) for data stored in a portion of the memory is enabled. A location and number of errors for the portion of the memory is then stored. It is determined if the number of errors exceeds a predetermined number of errors. If the number of errors exceeds the predetermined number, then the data stored in the portion of the memory is refreshed. If refreshing does not correct the errors, then a different ECC may be used.

Abstract: A electromagnetic induction wireless communication system including: a magnetic antenna; an electric antenna; a tuning capacitor coupled to the antenna combination configured to tune the antenna combination; a controller configured to control the operation of the communication system; a signal source coupled to the controller configured to produce a communication signal used to drive the magnetic antenna and the electric antenna; a voltage control unit coupled to the signal source configured to produce one of an amplitude difference, phase difference, and an amplitude and a phase difference between the communication signal used to drive the magnetic antenna and electric antenna.

Abstract: There is described a device for identifying an asset. The device comprises (a) a piece of material having predetermined physical properties, the piece of material being adapted to be irreversibly attached to the asset, (b) a stimulation and measurement unit attached to the piece of material, the stimulation and measurement unit being adapted to apply a predetermined stimulation to the piece of material and to measure a corresponding response from the piece of material, (c) an analysis unit adapted to analyze the measured response from the piece of material, and (d) a communication unit adapted to output data representative of the analysis of the measured response. There is also described an asset, an identification system and a method of identifying an asset. Furthermore, there is described a computer program.

Abstract: A method includes activating a transistor providing current to a load via an inductor based on values stored at a first timer and at a second timer. The second timer is enabled based a value of a current conducted at the inductor and based on a value of a reference current. The transistor is deactivated in response to determining that a measurement of time elapsed at the first timer is a predetermined multiple of the second measurement of time.

Abstract: An integrated circuit (IC) includes a logic built-in self-test (LBIST) system that includes scan chains. The scan chains receive a clock signal and test pattern signals, and generate scan out signals. A debug controller receives the scan out signals and shifts a set of the scan out signals to a joint test action group (JTAG) controller. The debug controller also maintains a dynamic count indicative of the number of debug shift operations performed, and compares the dynamic count with a final count. If the dynamic count is less than the final count, the debug controller performs a second debug shift operation, which facilitates determination of a fault location in the IC.

Abstract: A system for controlling access to a vehicle includes a first portable device and an access controller. The access controller stores an unshared password and an access control parameter (ACP). The first portable device stores the unshared password and generates an access mode signal and a shared password. In a first access mode, the access controller provides full access to the vehicle based on a first lock signal and the unshared password. In a second access mode, the access controller provides limited access to the vehicle based on a second lock signal and the shared password. In a third access mode, the access controller provides limited access to the vehicle for a predetermined time based on a third lock signal. The access controller generates a control output signal and an ignition control signal based on the ACP and the shared password to allow only limited access to the vehicle.

Abstract: A communication station is suitable for contactless communication with transponders and with further communication stations and has a first protocol-executing circuit and a second protocol-executing circuit, the first protocol-executing circuit being designed to effect communication between the communication station and transponders under a station/transponder protocol and the second protocol-executing circuit being designed to effect communication between the communication station and further communication stations under a station/station protocol.

Abstract: An audio processing system and method are described. A microphone is arranged to generate a microphone output signal responsive to an acoustic input. A speaker is arranged to generate an acoustic output responsive to a speaker input signal and to generate a speaker output signal responsive to the acoustic input. A wind noise detector is arranged to receive and process the microphone output signal and/or the speaker output signal to detect wind noise. A signal processor is arranged to receive the microphone output signal and is configured to process the speaker output signal when wind noise has been detected. The microphone output signal is modified using a result of processing the speaker output signal to reduce the amount of wind noise in a processed audio signal output by the signal processor.

Abstract: An LED controller includes: an absolute value calculator to calculate an initial light intensity value for a desired light output curve; a fade-in calculator to calculate a first light intensity value; and a fade-out calculator to calculate a second light intensity value. The LED controller also includes processing logic configured to: select one of the fade-in calculator and the fade-out calculator as a selected incremental value calculator, based on a directional indicator that indicates whether a fade-in light output effect or a fade-out light output effect is requested, initialize coefficients of the absolute value calculator and the selected incremental value calculator with a set of coefficient values associated with the desired light output curve, and output a set of voltage levels to a set of pulse width modulation (PWM) generators that output a set of PWM signals, which control light output of a string of LEDs.

Abstract: A high density, low power, high performance information system, method and apparatus are described in which an integrated circuit apparatus includes a first integrated circuit link element (657) and a redundant integrated circuit link element (660) connected in parallel between first and second deflectable MEMS switches (652-655, 662-665) which are connected in a signal path and controlled to deselect the first integrated circuit link element (657) and connect the redundant integrated circuit link element (660) in the signal path in response to a two-state control signal provided to the first and second deflectable MEMs switches which identifies the first integrated circuit link element as being defective.

Abstract: The present invention provides a clock source for an integrated circuit, comprising a primary oscillator adapted to generate a primary clock signal based on a reference control signal, at least one secondary oscillator each secondary oscillator being adapted to generate a secondary clock signal based on the reference control signal, wherein for each secondary oscillator a frequency correction unit is provided and adapted to adjust the reference control signal for the associated secondary oscillator based on the primary clock signal and the secondary clock signal of the associated secondary oscillator such that the clock frequency of the secondary clock signal of the associated secondary oscillator essentially equals the clock frequency of the primary clock signal. The present invention furthermore provides a method for providing a clock signal, and an integrated circuit.

Abstract: An apparatus includes an antenna that is configured to transmit a radio frequency signal across a transmission media having a channel response impairment. A transmission path includes an encoder circuit that encodes data on a carrier signal; and a pre-equalizer circuit that is configured to pre-distort the encoded data according to equalizer coefficients representing the channel response impairment. A first equalization path includes circuitry that generates the equalizer coefficients based upon transients resulting from a presence change event for the carrier signal. A second equalization path includes circuitry that generates the equalizer coefficients based upon knowledge of encoded data on the carrier signal. Selection circuitry selects between the first equalization path and the second equalization path.

Abstract: In a non-volatile memory, a method of performing a sensing operation to read a non-volatile (NV) element includes a first and a second phase. During the first phase, the NV element is coupled via a sense path transistor to a first capacitive element at a first input of an amplifier stage and a reference cell is coupled via a reference sense path transistor to a second capacitive element at a second input of the amplifier stage. During the second phase, the NV element is coupled via the sense path transistor to the second capacitive element and the reference cell is coupled via the reference sense path transistor to the first capacitive element. During the first phase, the first and second capacitive elements are initialized to voltages representative of states of the NV element and reference cell, respectively. During the second phase, the voltage differential between the two voltages is amplified.

Abstract: A method uses a memory that includes a plurality of non-volatile memory (NVM) cells; a plurality of word lines; a plurality of bit lines; and an amplifier having an inverting input, a non-inverting input, and an output; and a capacitance coupled to the inverting input includes. A reference is coupled to the non-inverting input. The output of the amplifier is coupled to the inverting input of the amplifier while the non-inverting input receives the reference. The output is decoupled from the inverting input to store a voltage on the inverting input of the amplifier. A non-volatile (NV) element of a first NVM cell of the plurality of NVM cells is coupled to the non-inverting input. An output signal representative of the state of the NVM cell is provided.

Abstract: An I/O cell comprising a first set of driver stages comprising, each driver stage of the first set comprising a high side switch controllable to couple an I/O node of the I/O cell to a first high voltage supply node and a low side switch controllable to couple the I/O node of the I/O cell to a first low voltage supply node. The I/O cell further comprising a second set of driver stages, each driver stage of the second set comprising a high side switch controllable to couple the I/O node of the I/O cell to a second high voltage supply node and a low side switch controllable to couple the I/O node of the I/O cell to a second low voltage supply node. The switches of the first set of driver stages are controllable independently of the switches of the second set of driver stages.

Abstract: A method for making an electronic component package from an encapsulated panel. The encapsulated panel includes two packaging substrate assembles including electronic components. Access sides of the electronic components face outward from the encapsulated panel. Standoffs separate the packaging substrate assemblies from each other.