Abstract: A microelectromechanical systems (MEMS) device includes a structural layer having a top surface. The top surface includes surface regions that are generally parallel to one another but are offset relative to one another such that a stress concentration location is formed between them. Laterally propagating shallow surface cracks have a tendency to form in the structural layer, especially near the joints between the surface regions. A method entails fabricating the MEMS device and forming trenchesin the top surface of the structural layer of the MEMS device. The trenches act as a crack inhibition feature to largely prevent the formation of deep cracks in structural layer which might otherwise result in MEMS device failure.

Abstract: The invention relates to a semiconductor isolation structure. More particularly, the present invention relates to a semiconductor isolation structure suitable for providing high voltage isolation. Embodiments disclosed include a semiconductor structure (10) comprising: a first semiconductor region (R1), a second semiconductor region (R2) within the first semiconductor region (R1), and a voltage isolator (11) separating the first and second semiconductor regions (R1, R2), the voltage isolator (11) comprising: a nested series of insulating regions (T1, T2) around the perimeter of the second semiconductor region (R2), an intermediate semiconductor region (I1, I2) between each adjacent pair of nested insulating regions (T1, T2), and a voltage control device (12) comprising a conducting element (D1-D3) connected to at least one intermediate semiconductor region (I1, I2) in parallel with the at least one insulating region (T1, T2), so as to control a voltage across the at least one insulating region (T1, T2).

Abstract: The present invention comprises a method and apparatus for controlling an IGBT device. The method comprises, upon receipt of a first and at least one further IGBT control signals, the first IGBT control signal indicating a required change in operating state of the IGBT device, controlling an IGBT driver module for the IGBT device to change an operating state of the IGBT device by applying a first logical state modulation at an input of an IGBT coupling channel, and applying at least one further modulation to the logical state at the input of the IGBT coupling channel in accordance with the at least one further IGBT control signal within a time period from the first logical state modulation, the time period being less than a state change reaction period ?t for the at least one IGBT device.

Abstract: A method and data processing system for accessing an entry in a memory array by placing a tag memory unit (114) in parallel with an operand adder circuit (112) to enable tag lookup and generation of speculative way hit/miss information (126) directly from the operands (111, 113) without using the output sum of the operand adder. PGZ-encoded address bits (0:51) from the operands (111, 113) are applied with a carry-out value (Cout48) to a content-addressable memory array (114) having compact bitcells with embedded partial A+B=K logic to generate two speculative hit/miss signals under control of a delayed evaluate signal. A sum value (EA51) computed from the least significant base and offset address bits determines which of the speculative hit/miss signals is selected for output (126).

Abstract: Embodiments of a method for providing electrostatic discharge (ESD) protection for an Input/Output (I/O) device, an ESD protection device for an I/O device, and an I/O device are described. In one embodiment, a method for providing ESD protection for an I/O device involves activating a switch device to turn off the I/O device during an ESD event and deactivating the switch device to turn on the I/O device in the absence of an ESD event. Other embodiments are also described.

Abstract: A device includes a semiconductor substrate, source and drain regions disposed in the semiconductor substrate and having a first conductivity type, a body region disposed in the semiconductor substrate, having a second conductivity type, and in which the source region is disposed, a drift region disposed in the semiconductor substrate, having the first conductivity type, and through which charge carriers drift during operation upon application of a bias voltage between the source and drain regions, a device isolation region disposed in the semiconductor substrate and laterally surrounding the body region and the drift region, and a breakdown protection region disposed between the device isolation region and the body region and having the first conductivity type.

Abstract: The invention discloses a method of reading data (dat) from a first transponder (TAG1) into a transceiver (REA). Said (dat) are only transmitted from the first transponder (TAG1) to the transceiver (REA) when a second transponder (TAG2) is present within the RFID communication range of the transceiver (REA) and if a positive authentication procedure between the two transponders (TAG1, TAG2) within the RFID communication range of the transceiver (REA) takes place. The second transponder (TAG2) is preferably a stationary transponder (TAG2), whereas the first transponder (TAG1) may be a mobile transponder. The invention further relates to transponders (TAG1, TAG2) as well as to a transceiver (REA) used in such a method of reading data (dat). Furthermore, the invention relates to a poster (POS), to which a first transponder (TAG1) is attached, and to a poster wall (WAL) for attaching such a poster (POS) and a second transponder (TAG2).

Abstract: A memory device includes a first ternary content addressable memory (TCAM), a second TCAM, a memory array coupled to the first and second TCAMs, a first priority logic coupled between the first TCAM and the memory array, a second priority logic coupled between the second TCAM and the memory array, and a look-ahead signal generated by the first priority logic and provided to the second priority logic. Match lines from the first and second TCAMs are coupled to respective word lines in the memory array.

Abstract: Disclosed is a semiconductor device comprising a stack of patterned metal layers separated by dielectric layers, the stack comprising a first conductive support structure and a second conductive support structure and a cavity in which an inertial mass element comprising at least one metal portion is conductively coupled to the first support structure and the second support structure by respective conductive connection portions, at least one of said conductive connection portions being designed to break upon the inertial mass element being exposed to an acceleration force exceeding a threshold defined by the dimensions of the conductive connection portions. A method of manufacturing such a semiconductor device is also disclosed.

Abstract: A communication partner appliance is implemented within a near field communication system. The communication partner appliance includes a receiver, a detector, and a processor. The receiver receives a NFC command signal from another communication partner appliance. The detector detects whether a carrier signal from the other communication partner appliance is present at the receiver at a time other than during a transmission of the NFC command signal from the other communication partner appliance to the receiver. The processor controls a power supply element based on a determination by the detector whether the carrier signal from the other communication partner appliance is present at the receiver. The power supply element is configured to establish a connection to either a first power supply or a second power supply. The first power supply is dependent on the carrier signal, and the second power supply is independent of the carrier signal.

Abstract: The present invention relates to a sensing device with a surface having at least one individual sensing region, wherein each sensing region includes a plurality of binding elements anchored on the surface for binding different specific analytes of interest, at least one of the analyte of interest and its matching binding element having a label for detecting said binding. The present invention further relates to a method of manufacturing such a sensing device.

Abstract: Dual-interface Integrated Circuit (IC) card components and methods for manufacturing the dual-interface IC card components are described. In an embodiment, a dual-interface IC card component includes a single-sided contact base structure, which includes a substrate with an electrical contact layer. On the single-sided contact base structure, one or more antenna contact leads are attached to the single-sided contact base structure to form a dual-interface contact structure by applying an adhesive material to partially cover an overlapping area of the at least one antenna contact and the substrate, which is a component of a dual-interface IC card. Other embodiments are also described.

Abstract: An electrostatic discharge protection apparatus comprises a stack arrangement having a first electrostatic discharge protection element and a second electrostatic discharge protection element. The stack arrangement is arranged to provide a bias potential between the first and second electrostatic discharge protection elements. In one embodiment, the bias potential can be achieved by a clamp arrangement coupled across the stack arrangement.

Abstract: An audio controller for use with a loudspeaker that generates sound in dependence upon a loudspeaker signal is disclosed. The loudspeaker includes a voice coil. The audio controller includes a monitor to monitor an electric response of the voice coil to the loudspeaker signal and a signal generator to generate an evaluation signal. The evaluation signal comprises a signal having an evaluation frequency that is below resonant frequency of the loudspeaker. A processing unit is included to generate, based on the monitored electric response, the loudspeaker signal from an input sound signal. The processing unit is configured to combine the evaluation signal with the input sound signal to generate the loudspeaker signal.

Abstract: A memory system has an array of split gate non-volatile NVM cells that are in program sectors and the program sectors make up one or more erase sectors. The control gate of cells in a program sector are physically connected. A program/erase circuit programs a selected program sector by applying a programming signal to the control gates of the split gate memory cells of the selected program sector while applying a non-programming signal to the control gates of program sectors not selected for programming, that erases an erase sector comprising a plurality of the program sectors by contemporaneously applying an erase voltage to the control gates of the split gate NVM cells of the erase sector, wherein during the applying the programming signal, the program/erase circuit applies a source voltage to the sources of each of the split gate NVM cells of the erase sector.

Abstract: An embodiment of a solder wettable flange includes a flange body formed from a conductive material. The flange body has a bottom surface, a top surface, sidewalls extending between the top surface and the bottom surface, and one or more depressions extending into the flange body from the bottom surface. Each depression is defined by a depression surface that may or may not be solder wettable. During solder attachment of the flange to a substrate, the depressions may function as reservoirs for excess solder. Embodiments also include devices and systems that include such solder wettable flanges, and methods for forming the solder wettable flanges, devices, and systems.

Abstract: Aspects of the present disclosure are directed to addressing impedance-matching issues. As may be implemented in connection with one or more embodiments, an apparatus includes an integrated circuit (IC) chip having a signal-connection terminal and processing circuitry that passes signals along a communication path that is within the IC chip and connected to the signal-connection terminal. Impedance-matching circuitry operates to provide impedance-matching for the communication path, therein mitigating signal loss due to impedance-mismatching. A chip-mounting structure secures the IC chip and electrically connects thereto at the signal-connection terminal.

Abstract: A control circuit for a switched-mode power supply having an input side (101) connectable to an electrical power source and an output side (102) connectable to a load.

Abstract: A low drop-out voltage regulator, an integrated circuit, a sensor and a method of providing a regulated voltage are provided. The low drop-out voltage regulator comprises a regulated voltage driver for providing the regulated voltage in response to a control voltage, a feedback-loop circuit for generating the control signal such that the regulated voltage driving circuit provides the regulated voltage, and a pull-up circuit for pulling up the regulated voltage to a supply voltage when a difference between the supply voltage and the control voltage is smaller than a predetermined threshold value. In the feedback-loop circuit a first feedback voltage or a second feedback voltage is generated, respectively, on basis of a first ratio and a second ratio between the feedback voltage and the regulated voltage. The second feedback voltage is generated instead of the first feedback voltage when the regulated voltage is pulled-up to the supply voltage.

Abstract: A detector element for a microbolometer detector includes a platform structure spaced apart from a substrate. The platform structure has a peripheral region surrounding a central region. First and second contacts are located at the peripheral region proximate opposing first and third edges of the peripheral region. A stiff beam structure extends across the central region between the first and second contacts, and at least one sensor is located at the peripheral region proximate at least one of second and fourth edges of the peripheral region. An optically absorptive material structure of a grid pattern of first and second material portions may be located at the central region. First material portions perpendicular to the beam structure may connect to the beam structure and to inner edges of the peripheral region, and none of the second material portions extend continuously between and couples to opposing inner edges of the peripheral region.