Abstract: A method for alleviating burn-in effect and enabling performing a start-up process in respect of a device comprising a plurality of challengeable memory elements, wherein the memory elements are able to, upon start-up, generate a response pattern of start-up values useful for identification as the response pattern depends on physical characteristics of the memory elements, the method comprising the step of, after start-up of the memory elements, writing a data pattern to the memory elements which is inverse to a response pattern that was previously read from the same memory elements. Thus, degradation of the PMOS transistors due to NBTI can be alleviated.
Type:
Grant
Filed:
April 16, 2009
Date of Patent:
December 25, 2012
Assignees:
Intrinsic ID B.V., NXP B.V.
Inventors:
Pim T. Tuyls, Geert J. Schrijen, Abraham C. Kruseman
Abstract: In order to provide a method of detaching a thin semiconductor circuit (1) from its base (2), wherein the semiconductor circuit (1) is provided with terminals (3) for electrical contacting, in particular with gold contacts, by means of which method thin semiconductor circuits (1) can also be mounted without damage for example directly on a chip card, it is proposed that a layer of soldering tin (6) is applied to a support substrate (4), the support substrate (4) is soldered to the electrical terminals (3) and the base (2) of the semiconductor circuit (1) is removed.
Abstract: A method for storing or reading data in a memory array is described. The application data file includes an application data length indicator indicating a memory size of first application data stored in the application data file in compliance with a predetermined protocol. The method for storing additional data comprises checking whether a memory size of the application data file is larger than the memory size indicated by the application data length indicator and storing second application data in a partial memory area of the application data file not occupied by the first application data. Thereby, memory areas which, according to the predetermined protocol, are not used, can be used for new applications, data can be hidden in these areas such that they cannot be read by protocol compliant reader devices, and the data structure is compatible with the former predetermined protocol.
Abstract: The present invention relates to a stress buffering package for a semiconductor component, wherein a stress buffering means comprises individual stress buffering elements that do not influence the stress buffering effect from each other. Furthermore the invention relates a method for manufacturing a stress buffering package for a semiconductor component.
Abstract: A method of operating a resonant power converter(1, 2), having a high side switch(3) and a low side switch(4), is disclosed in which the switching is controlled to allow for improved operation at low power levels. The method involved an interruption to the part of the switching cycle in which the low side switch (4) is normally closed, by opening the switch at a particular moment in the cycle which allows the energy to be store in the resonance capacitor (5). Since, as a result, the energy is largely not resonating but stored in a single component, the time quantization of the mode of operation is significantly reduced or eliminated.
Abstract: Consistent with an example embodiment there is a method for controlling a deceleration process of a DC motor, wherein the DC motor is driven by a bridge driver coupled to a power supply intended to provide a supply voltage VDD at a power supply output. The method comprises applying a deceleration PWM signal to the bridge driver for decelerating the DC motor, and controlling the bridge driver such that a motor-induced back current is reduced, if the voltage at the power supply output exceeds a first voltage threshold which is higher than VDD. In accordance with the example embodiment, the method includes the following: if the voltage at the power supply output falls below a second voltage threshold which is lower than the first voltage threshold, control of the bridge driver is terminated such that the motor-induced back current is reduced.
Abstract: A MEMS device comprises first and second opposing electrodes (42,46), wherein the second electrode (46) is electrically movable to vary the electrode spacing between facing first sides of the first and second electrodes. A first gas chamber (50) is provided between the electrodes, at a first pressure, and a second gas chamber (52) is provided on the second, opposite, side of the second electrode at a second pressure which is higher than the first pressure. This arrangement provides rapid switching and with damping of oscillations so that settling times are reduced.
Type:
Grant
Filed:
May 7, 2009
Date of Patent:
December 25, 2012
Assignee:
NXP B.V.
Inventors:
Peter G. Steeneken, Hilco Suy, Martijn Goossens
Abstract: A host controller having a first communication interface, or protocol, writes to and reads from one or more slave devices each having a second communication interface, or protocol, which is different from the first, through a translation device, or integrated circuit, that is responsive to command streams from the host controller. The present invention provides a high-level communications protocol by which command information and data are passed to a translation device, and the translation device interprets these commands and engages in the desired data transfer operation between the host controller and the slave devices. In a further aspect of the present invention, the high-level communications protocol also includes commands interpreted by the translation device to achieve data transfers between the host controller and the translation device, including accessing internal registers and I/O ports of the translation device.
Abstract: A UWB or other transmitter reduces interference to a narrow-band victim receiver on a periodic basis by means of a frequency swept notch. The notch may be created using active interference cancellation signal processing or simple deletion of sub-carriers. Details are given of both methods.
Abstract: A peripheral device and a method for programming the read/writeable memory of the RFID circuitry by communications between either RF antenna or bus communications port controller interface or both. In the peripheral device, an EEPROM, bus communications controller interface, NFC interface, antenna, and logic controller operate to receive and transmit configuration and calibration data between a BLUETOOTH circuit and an external BLUETOOTH enabled device. The dual interfaced EEPROM is operable to share or partition its EEPROM between an NFC interface and a bus communications controller.
Abstract: ADC-DC converter, for a solar charger, is disclosed. The converter is based on a buck-boost converter, and is operable both in a boost mode, and in a buck mode. The converter differs from known converters, in that during buck mode operation, the boost mode is disabled, thereby reducing or eliminating the losses associated with buck mode operation. Methods of operating such a reconfigurable buck-boost converter are also disclosed as is a computer programme product for controlling a reconfigurable buck-boost converter.
Abstract: A device (100) for processing audio data (101), wherein the device (100) comprises a mid-frequency filter unit (105) adapted to selectively filter a mid-frequency range component of the audio data (101) in such a manner that amplitudes of different frequency sub components of the mid-frequency range component of the audio data (101) are scaled so that the scaled amplitudes reflect relations between the original amplitudes of the different frequency sub-components.
Abstract: A module comprises a bus invert encoder (24) for determining whether a set of data bits should be inverted prior to transmission over a communication bus. The bus invert encoder (24) produces a bus invert signal BI which controls a selective inversion means (28), for example a multiplexer. A partial fault detection encoder (32) determines one or more temporary check bits from the set of data bits, substantially in parallel with the bus invert encoder (24). Thus, the one or more temporary check bits are determined based on the assumption that the set of data bits are to be transmitted without inversion from the selective inversion means (28). A logic unit (34) is provided for correcting the one or more temporary check bits, if necessary, based on the bus invert signal produced by the bus invert encoder (24).
Type:
Grant
Filed:
August 19, 2005
Date of Patent:
December 18, 2012
Assignee:
NXP B.V.
Inventors:
Martijn H. R. Lankhorst, Franciscus P. Widdershoven
Abstract: A communication partner appliance is implemented within a near field communication system. The communication partner appliance includes a receiver, a detector, and a processor. The receiver receives a NFC command signal from another communication partner appliance. The detector detects whether a carrier signal from the other communication partner appliance is present at the receiver at a time other than during a transmission of the NFC command signal from the other communication partner appliance to the receiver. The processor controls a power supply element based on a determination by the detector whether the carrier signal from the other communication partner appliance is present at the receiver. The power supply element is configured to establish a connection to either a first power supply or a second power supply. The first power supply is dependent on the carrier signal, and the second power supply is independent of the carrier signal.
Abstract: The invention relates to a method of playing and configuring a multimedia memory game; to a computer program product comprising computer-executable instructions for carrying out the steps of a method of playing and configuring a multimedia memory game; to a mobile device; to an electronic data carrier; and to a multimedia memory game comprising a mobile device, a first electronic data carrier and a second electronic data carrier. During a turn of the game, the content stored on the first electronic data carrier is read and the content stored on the second electronic data carrier is read. Then it is verified whether the first content and the second content satisfy a predetermined associative relationship. Only if the first content and the second content satisfy the predetermined associative relationship, it is concluded that the turn is successful. The predetermined associative relationship may be preconfigured or configured by a user.
Abstract: By partially serializing the transmission of a sequence keyed UWB symbol (FIG. 2), the number of parallel receiver branches required to receive such a transmission is reduced. The reduced number of receiver paths are re-used during the reception of each of the partially serialized portions of a UWB symbol, and the local oscillator (312, 332, 334, 336) output frequencies are changed for reception of each of those portions. Reducing the number of parallel receiver paths advantageously reduces the amount of power consumed by such a receiver. Similarly, the amount of area required to implement such a receiver in an integrated circuit is advantageously reduced. In a further aspect of the present invention, a synchronization sequence uses less than the complete set of frequency bands (402-408) available for transmission of a UWB symbol.
Abstract: In an RFID system an RFID device (2) comprises a device air interface (C2) witha predefined quality factor (Q2) for transmitting wireless carrier and data signals (CS) being transmitted to a remote RFID transponder(1) comprising a transponder air interface (C1) with a predefined quality factor (Q1). Carrier and data signal pre-compensation means (3) are arranged between the device air interface (C2) and data signal processing means (4), wherein the carrier and data signal pre-compensation means (3) are adapted to pre-compensate signal distortions of the carrier and data signals (CS) caused by the quality factors (Q2, Q1) of the device air interface (C2) and the transponder air interface (C1) of the RFID device (2) and the RFID transponder(1), respectively.
Abstract: A method of packaging a micro electro-mechanical structure comprises forming said structure on a substrate; depositing a sacrificial layer over said structure; patterning the sacrificial layer; depositing a SIPOS (semi-insulating polycrystalline silicon) layer over the patterned sacrificial layer; treating the SIPOS layer with an etchant to convert the SIPOS layer into a porous SIPOS layer, removing the patterned sacrificial layer through the porous layer SIPOS to form a cavity including said structure; and sealing the porous SIPOS layer. A device including such a packaged micro electro-mechanical structure is also disclosed.
Type:
Grant
Filed:
November 23, 2010
Date of Patent:
December 11, 2012
Assignee:
NXP B.V.
Inventors:
Johannes van Wingerden, Wim van den Einden, Harold H. Roosen, Greja Johanna Adriana Maria Verheijden, Gerhard Koops, Didem Ernur, Jozef Thomas Martinus van Beek
Abstract: A circuit arrangement is described comprising a first receiver configured to receive a first input signal, a second receiver configured to receive a second input signal, a first signal generator configured to generate a first pulse signal, a second signal generator configured to generate a second pulse signal, wherein a delay between a rising edge of the first pulse signal and a rising edge of the second pulse signal is proportional to a difference between the first input signal and the second input signal, a first converter configured to convert the first pulse signal to a first digital number proportional to a width of the first pulse signal, a second converter configured to convert the second pulse signal to a second digital number proportional to a width of the second pulse signal, wherein at least one of the first converter and the second converter comprises a cascade of at least two converter stages, wherein each converter stage of the at least two converter stages is configured to propagate and shrink