Patents Assigned to NXP
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Patent number: 8330138Abstract: An electronic device (100), the electronic device (100) comprises a substrate (101), a first electrode (102) formed at least partially on the substrate (101), a second electrode (103) formed at least partially on the substrate (101), a convertible structure (104) connected between the first electrode (102) and the second electrode (103), and a spacer element (105) connected between the first electrode (102) and the second electrode (103) and adapted for spacing the convertible structure (104) with regard to a surface of the substrate (101).Type: GrantFiled: May 28, 2008Date of Patent: December 11, 2012Assignee: NXP B.V.Inventors: Romain Delhougne, Michael Zandt
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Patent number: 8331507Abstract: A device processes signals from a plurality of signal channels that are received in parallel. A channel processing circuit (12a,b, 14a,b), applies a series of filtering operations selectively to the signal from a first one of the signal channels. A filter management circuit (18) detects a reception condition from reception of a signal in a second one of the signal channels. The filter management circuit (18) controls application of at least a part of said filtering operations to the signal from the first one the signal channels by the channel processing circuit (12a,b, 14a,b), dependent on the detected reception condition. Selected filter operations may be enabled or disabled. Thus, power consumption may be reduced. In an embodiment, the detected reception condition is determined as a by-product of functional reception of another channel. Thus power consumption for the detection of the reception condition is also reduced.Type: GrantFiled: January 28, 2009Date of Patent: December 11, 2012Assignee: NXP B.V.Inventors: Richard John Caldwell, Robert Fifield
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Patent number: 8330191Abstract: The invention relates to a integrated circuit comprising an electronic circuit integrated on a substrate (5), and further comprising protections means for protection of the electronic circuit (25). The protection means comprise: i) a first strained encapsulation layer (10) being provided on a first side of the substrate (5), wherein the first strained encapsulation layer (10) has a strain (S1) in a direction parallel to the substrate (5), and ii) disabling means (20) arranged for at least partially disabling the electronic circuit (25) under control of a strain change in the substrate (5). The invention further relates to a method of manufacturing such integrated circuit, and to a system comprising such integrated circuit. Such system is selected from a group comprising: a bank-card, a smart-card, a contact-less card and an RFID.Type: GrantFiled: May 26, 2009Date of Patent: December 11, 2012Assignee: NXP B.V.Inventors: Romano Hoofman, Remco Henricus Wilhelmus Pijnenburg, Youri Victorovitch Ponomarev
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Patent number: 8331893Abstract: A receiver has an input stage (LNA) that comprises, in a signal direction from an input (SI) to an output (SO), an input transistor (Q1) and an attenuator (D1, D2, R7-R12, C2-C5). The attenuator provides an attenuation that depends on a control signal (VDC). The input stage comprises a transistor-biasing circuit (R2) that biases the input transistor in dependence on the control signal.Type: GrantFiled: January 24, 2006Date of Patent: December 11, 2012Assignee: NXP B.V.Inventor: Efthimios Tsilioukas
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Patent number: 8330090Abstract: A photosensitive device (100), the photosensitive device (100) comprising a substrate (101) and a plurality of vertically aligned nanowire diodes (102 to 105) provided on and/or in the substrate (101).Type: GrantFiled: April 29, 2008Date of Patent: December 11, 2012Assignee: NXP, B.V.Inventor: Prabhat Agarwal
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Patent number: 8330539Abstract: A dual bridge amplifier includes a first bridge amplifier receiving a first input signal and having a pair of drive outputs connecting to a first load, a second bridge amplifier receiving a second input signal and having a pair of drive outputs connecting to a second load, and a mode switch between one of the drive outputs of the first bridge amplifier and one of the drive outputs of the second bridge amplifier. The mode switch closes and switches the dual bridge amplifier to a series amplification mode, based on detecting the magnitudes of the first and second input signals. The series amplification mode shares current between the first load and the second load, reducing amplifier heat generation.Type: GrantFiled: November 25, 2009Date of Patent: December 11, 2012Assignee: NXP B.V.Inventors: Derk-Jan Hissink, Fred Mostert, Clemens Herman Johan Mensink, Adrianus Johannes Maria Tuijl
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Publication number: 20120308014Abstract: A method and apparatus is for outputting audio files to a user to enable selection of one of the audio files by the user. At least two independent audio files are played simultaneously, distributed differently over a set of speakers, thereby to appear to the user to originate from different directions. This enables a faster selection process by the user.Type: ApplicationFiled: December 7, 2011Publication date: December 6, 2012Applicant: NXP B.V.Inventors: Shyam Sundera Bala Koteswara Gupta Pallapothu, Sandeep Yadav, Sanigapally Harinath Reddy, Dattaguru BN
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Publication number: 20120306056Abstract: A semiconductor wafer (100) having a regular pattern of predetermined separation lanes (102) is provided, wherein the predetermined separation lanes (102) are configured in such a way that the semiconductor wafer is singularizable along the regular pattern.Type: ApplicationFiled: May 17, 2012Publication date: December 6, 2012Applicant: NXP B.V.Inventors: Florian Schmitt, Heimo Scheucher, Michael Ziesmann
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Publication number: 20120305374Abstract: A MEMS switch in which at least first, second and third signal lines are provided over the substrate, which each terminate at a connection region. A lower actuation electrode arrangement is over the substrate. A movable contact electrode is suspended over the connection regions for making or breaking electrical contact between at least two of the three connection regions and an upper actuation electrode provided over the lower actuation electrode. The use of three of more signal lines enables a symmetrical actuation force to be achieved, and/or enables multiple switch functions to be implemented by the single movable electrode.Type: ApplicationFiled: November 29, 2011Publication date: December 6, 2012Applicant: NXP B.V.Inventors: Martijn Goossens, Hilco Suy, Peter Gerard Steeneken, Klaus Reimann
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Patent number: 8326909Abstract: A method of computing at least a first and a second tree of arithmetic or logical operations on a microprocessor comprising at least n parallel processing elements. The method comprises: a) executing (in 48) n arithmetic or logical operations of a first iteration of the first tree in parallel using the n processing elements, then b) executing (in 66) m arithmetic or logical operations in parallel between the results of the first iteration, using m processing elements chosen from the n processing element used for the computation of the first iteration, the other n?m processing element being unused for the computation of the second iteration. In parallel with the computation of the second iteration of the first tree, the method comprises executing (in 66) k arithmetic or logical operations of the second tree in parallel using k processing elements chosen from the n?m processing elements unused for the computation of the second iteration of the first tree.Type: GrantFiled: December 13, 2005Date of Patent: December 4, 2012Assignee: NXP B.V.Inventor: Bruno Ballarin
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Patent number: 8327406Abstract: The invention applies to the transmission of a multimedia content from a server to a client terminal. The multimedia content is available from the server as one or more sets of files. Upon reception of an initial request from the client, the server sends a document back to the client, said document causing the client to repetitively send fetching request. Upon reception of a fetching request, the server selects the file to download.Type: GrantFiled: June 23, 2004Date of Patent: December 4, 2012Assignee: NXP B.V.Inventors: Philippe Gentric, Nicolas Delahaye, Lotfi Lamrani
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Patent number: 8324935Abstract: A bus driver circuit for driving a bus voltage is provided. The bus driver circuit comprises: a bus line output (CANL) the bus voltage of which is driven by the bus driver circuit; a first transistor (M1) having a gate, the voltage at the gate of the first transistor (M1) determining the bus voltage at the bus line output (CANL); a first capacitor (C1) connected to the gate of the first transistor (M1) for driving the voltage at the gate of the first transistor (M1); a first switch (S1) connecting/disconnecting the first capacitor (C1) to a first voltage source (Vgm) via a first RC network comprising at least one resistor and at least one capacitor; and a second switch (S2) connecting/disconnecting the first capacitor (C1) to a predetermined fixed potential (GND 2) for discharging the first capacitor (C1) via a second RC network comprising at least one resistor and at least one capacitor. The first switch (S1) and the second switch (S2) are complementarily driven by a signal (TxD) on a data line.Type: GrantFiled: October 8, 2009Date of Patent: December 4, 2012Assignee: NXP B.V.Inventor: Henk Boezen
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Patent number: 8325077Abstract: The present invention relates to a system for distributing multimedia content to at least one client device over a network. Said system comprises: a slicer (SLI) for slicing the multimedia content into a set of slices; a coder (ALC) for coding a slice according to an asynchronous layer coding technique such that N coded symbols including K source symbols and N?K error symbols are generated; a content server (SER) for storing and transmitting said coded slices upon request of the client device; a client device (CLD) comprising means for receiving said coded slices and a decoder (DEC) for decoding a coded slice as soon as K coded symbols of said slice have been received.Type: GrantFiled: August 11, 2005Date of Patent: December 4, 2012Assignee: NXP B.V.Inventor: Philippe Gentric
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Patent number: 8327205Abstract: A method is provided for testing an integrated circuit comprising multiple cores, with at least two cores having different associated first and second clock signals of different frequencies. A test signal is provided using a clocked scan chain clocked at a test frequency (TCK). A transition is provided in a clock circuit reset signal (clockdiv_rst) which triggers the operation of a clock divider circuit (44) which derives the first and second clock signals (clk_xx, clk_yy, clk_zz) from an internal clock (40) of the integrated circuit. The first and second clock signals thus start at substantially the same time, and these are used during a test mode to perform a test of the integrated circuit. After test, the test result is output using the clocked scan chain clocked at the test frequency (TCK).Type: GrantFiled: January 4, 2007Date of Patent: December 4, 2012Assignee: NXP B.V.Inventors: Tom Waayers, Johan C. Meirlevede, David P. Price, Norbert Schomann, Ruediger Solbach, Hervé Fleury, Jozef R. Poels
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Patent number: 8324833Abstract: The application relates to setting color point and light intensity. By controlling the phase as well as the amplitudes of a driving voltage for a lighting device, the color point as well as the light intensity of a lighting device may be set.Type: GrantFiled: February 2, 2009Date of Patent: December 4, 2012Assignee: NXP B.V.Inventors: Peter H. F. Deurenberg, Cornelis J. P. M. Rooijackers
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Patent number: 8324878Abstract: A voltage regulator includes an active control switch, an active sync switch, a driver circuit, and a gate resistor. The active control switch is coupled between an input voltage line and an input of an energy storage device. The active sync switch is coupled to the input of the energy storage device. The driver circuit is coupled to the control and sync switches to alternately drive each of the control and sync switches into a conducting state to produce a regulated voltage at an output of the energy storage device. The gate resistor is coupled in series within a control path of the sync switch. The gate resistor has a resistance value that is tuned to reduce an anticipated dead time between a turn-off time of the sync switch and a turn-on time of the control switch.Type: GrantFiled: November 2, 2009Date of Patent: December 4, 2012Assignee: NXP B.V.Inventor: Dong Ho Lee
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Patent number: 8325015Abstract: A flexible wristband includes conductive silicone rubber loops and an insulating rubber portion. The conductive silicone rubber loops are formed parallel to one another, and substantially define a circumference of the wristband. The conductive silicone loops are connected through a radio frequency identification (RFID) integrated circuit package to form a loop antenna. The insulating silicone rubber portion is formed parallel to the conductive silicone rubber loops, separating the conductive silicone rubber loops and providing an insulating break in the conductive loops. The RFID integrated circuit package includes multiple terminals respectively connected to the conductive silicone rubber loops to create a loop antenna, enabling the RFID integrated circuit package to transmit data through the loop antenna.Type: GrantFiled: January 17, 2009Date of Patent: December 4, 2012Assignee: NXP B.V.Inventor: Trevor G. R. Hall
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Publication number: 20120299126Abstract: Disclosed is an integrated circuit (IC) comprising a substrate (10) carrying a plurality of circuit elements; a metallization stack (12, 14, 16) interconnecting said circuit elements, said metallization stack comprising a patterned upper metallization layer comprising at least one sensor electrode portion (20) and a bond pad portion (22), at least the at least one sensor electrode portion of said patterned upper metallization layer being covered by a moisture barrier film (23); a passivation stack (24, 26, 28) covering the metallization stack, said passivation stack comprising a first trench (32) exposing the at least one sensor electrode portion and a second trench (34) exposing the bond pad portion; said first trench being filled with a sensor active material (36). A method of manufacturing such an IC is also disclosed.Type: ApplicationFiled: May 15, 2012Publication date: November 29, 2012Applicant: NXP B.V.Inventors: Roel Daamen, Casper Juffermans, Josephus Franciscus Antonius Maria Guelen, Robertus Antonius Maria Wolters
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Publication number: 20120299130Abstract: A MEMS accelerometer uses capacitive sensing between two electrode layers. One of the electrode layers has at least four independent electrodes arranged as two pairs of electrodes, with one pair aligned orthogonally to the other such that tilting of the membrane can be detected as well as normal-direction movement of the membrane. In this way, a three axis accelerometer can be formed from a single suspended mass, and by sensing using a set of capacitor electrodes which are all in the same plane. This means the fabrication is simple and is compatible with other MEMS manufacturing processes, such as MEMS microphones.Type: ApplicationFiled: January 25, 2011Publication date: November 29, 2012Applicant: NXP B.V.Inventors: Geert Langereis, Iris Bominaar-Silkens, Twan Van Lippen
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Publication number: 20120303983Abstract: A control system (100) for controlling a power consumption of an electronic device (300) is provided. The electronic device is adapted to communicate with a reader device via a wireless communication interface. The control system comprises a measuring unit (102) being adapted for measuring an actual field strength of an electromagnetic field provided by the reader device to the control system, a power delivery unit (101) being adapted for delivering power received via the electromagnetic field to the electronic device, and a control unit (103) being coupled to the measuring unit and being adapted for providing a control signal to the electronic device for controlling the consumption of the power being delivered to the electronic device, wherein the control signal is based on the actual field strength of the electromagnetic field.Type: ApplicationFiled: May 18, 2012Publication date: November 29, 2012Applicant: NXP B.V.Inventors: Ajay KAPOOR, Gerard VILLAR PIQUE, Jose de Jesus PINEDA DE GYVEZ