Patents Assigned to NXP
  • Publication number: 20120286881
    Abstract: An oscillator architecture and a method for powering up/down the oscillator architecture are described. In one embodiment, an oscillator architecture includes a reference generator configured to generate reference signals and an in-phase/quadrature (IQ) oscillator configured to generate oscillation signals based on the reference signals. The reference generator includes a distributed start-up circuitry that includes multiple start-up circuits. The IQ oscillator includes at least one turbo comparator having a low power functional mode and a turbo functional mode. Other embodiments are also described.
    Type: Application
    Filed: May 10, 2011
    Publication date: November 15, 2012
    Applicant: NXP B.V.
    Inventors: KEVIN MAHOOTI, SANKET GANDHI, MIN MING TARNG
  • Publication number: 20120288093
    Abstract: It is described a method for operating a transponder (203), the method comprising: receiving, by the transponder, in particular wirelessly, transmitted reader data (205) representing x and sqrt[b]/x, wherein x is an element of a binary Galois field and b is a scalar; processing, by the transponder, the reader data (205) to determine, whether x is a first coordinate of a point on an elliptic curve defined by the elliptic curve equation y2+xy=x3+ax2+b, wherein the elliptic curve is defined over the Galois field such that x and y are elements of the Galois field, wherein y is a second coordinate of the point on the elliptic curve. Further a transponder, a method for operating a reader and a reader are described.
    Type: Application
    Filed: April 24, 2012
    Publication date: November 15, 2012
    Applicant: NXP B.V.
    Inventor: Bruce Murray
  • Publication number: 20120288086
    Abstract: Various embodiments relate to a method for integrity protected calculation of a cryptographic function including: performing an operation c=a?b in a cryptographic function f(x1, x2, . . . , xn) defined over a commutative ring R; choosing a? and b? corresponding to a and b such that a? and b? are elements of a commutative ring R?; computing c?=a???b?; computing a?=CRT(a, a?) and b?=CRT(b, b?), where CRT is the Chinese Remainder Theorem; computing c?=a???b?; mapping c? into R?; and determining if the mapping of c? into R? equals c?.
    Type: Application
    Filed: May 11, 2011
    Publication date: November 15, 2012
    Applicant: NXP B.V.
    Inventors: Martin Schaffer, Bruce Murray
  • Patent number: 8310265
    Abstract: An integrated circuit comprises a device under test and embedded test circuitry. The embedded test circuitry comprises a plurality of process monitoring sensors, a threshold circuit for comparing the sensor signals with a threshold window having an upper and a lower limit and a digital interface for outputting the threshold circuit signal. The process monitoring sensors comprise circuitry based on the circuit elements of the device under test. This arrangement enables monitoring of circuit element performance, such as transistor properties, using process monitoring sensors which are embedded with the device under test, so that the same process parameter variations apply to the sensors as to the device under test. The sensors preferably match the physical layout of the device under test.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: November 13, 2012
    Assignee: NXP B.V.
    Inventors: Amir Zjajo, Manuel Jose Barragan Asian, Jose De Jesus Pineda De Gyvez
  • Patent number: 8310024
    Abstract: The chip comprises a network of trench capacitors and an inductor, wherein the trench capacitors are coupled in parallel with a pattern of interconnects that is designed so as to limit generation of eddy current induced by the inductor in the interconnects. This allows the use of the chip as a portion of a DC-DC converter, that is integrated in an assembly of a first chip and this—second chip. The inductor of this integrated DC-DC converter may be defined elsewhere within the assembly.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: November 13, 2012
    Assignee: NXP B.V.
    Inventors: Derk Reefman, Freddy Roozeboom, Johan H. Klootwijk
  • Patent number: 8305099
    Abstract: A full duplex, high speed test interface comprises a tester side circuit and a device under test side circuit, each comprising balancing circuits. The balancing circuit of the test side circuit is configured to cancel its own transmitted data at the test side circuit such that the transmitted data does not influence any other signal generated at the test side circuit. Similarly, the balancing circuit of the device under test side circuit is configured to cancel its own transmitted data at the device under test side circuit such that the transmitted data does not influence any other signal generated at the device under test side circuit.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: November 6, 2012
    Assignee: NXP B.V.
    Inventor: Henk Boezen
  • Patent number: 8307145
    Abstract: A single USB-to-IDE adapter (204) connects two or more IDE devices (208, 210, 212) to a USB apparatus (202). The USB apparatus (202) communicates with each IDE device using a connection identifier associated with the USB connection (206) and a unique identifier associated with each IDE connection (214, 216, 218). The USB-to-IDE adapter (204) may be integrated within the USB apparatus (202) or as a discrete component connected to the USB apparatus (202).
    Type: Grant
    Filed: October 14, 2005
    Date of Patent: November 6, 2012
    Assignee: NXP B.V.
    Inventors: Zhenyu Zhang, Scott Guo
  • Publication number: 20120275354
    Abstract: A wireless transceiver comprising: a receiver adapted to receive signals in a television broadcast band; and a transmitter adapted to transmit signals in a different band. Also provided is a counterpart transceiver. The latter transceiver comprises: a transmitter adapted to transmit signals in a television broadcast band; and a receiver adapted to receive signals in the different band.
    Type: Application
    Filed: September 22, 2011
    Publication date: November 1, 2012
    Applicant: NXP B.V.
    Inventor: Frederic Francois Villain
  • Publication number: 20120274362
    Abstract: Various exemplary embodiments relate to a tracking system and method. The system includes a transistor switch having a gate node and a source node, a power source circuit connected to the gate node, and a bootstrapping circuit connected to the source node and to the gate node. The power source circuit charges the switch during a first tracking phase, and the bootstrapping circuit charges the switch during a second tracking phase.
    Type: Application
    Filed: April 27, 2011
    Publication date: November 1, 2012
    Applicant: NXP B.V.
    Inventors: Konstantinos DORIS, Erwin Janssen, Athon Zanikopoulos, Alessandro Murroni
  • Patent number: 8302059
    Abstract: A method of designing a power switch block (200) for an integrated circuit layout in a predefined integrated circuit technology is disclosed. The power switch block (200) includes a segment (710) comprising a plurality of spaced parallel conductors (110, 120, 130, 140) each having a predefined height in said technology, a stack of a first power switch (115) of a first conductivity type and a pair of drivers (152; 154) for respectively driving the first power switch (115) and a second power switch (135), said drivers having predefined dimensions in said technology, and the second switch (135) of a second conductivity type.
    Type: Grant
    Filed: May 25, 2009
    Date of Patent: October 30, 2012
    Assignee: NXP B.V.
    Inventors: Jose de Jesus Pineda de Gyvez, Rinze Ida Mechtildis Peter Meijer, Cas Groot
  • Publication number: 20120269076
    Abstract: A magnetic induction system is disclosed, which has antenna diversity at the transmitter side, but which does not require a bidirectional link to pass information regarding received signal quality back to the transmitter. The system uses a time division multiplexing access (TDMA) arrangement, to transmit the same, or correlated, information with a level of redundancy, from two, or more, antenna to at least a receiver. The or each receiver is configured to determine a received signal quality from the channel received from one antenna, and, in response to inadequate signal quality, to switch to another antenna. A receiver, and a transmitter for such a magnetic induction system are also disclosed, as is an associated method. A non-limiting application of such a system is in binaural hearing aids, in which antenna diversity is preferred at the transmitter because of space limitations.
    Type: Application
    Filed: October 13, 2011
    Publication date: October 25, 2012
    Applicant: NXP B.V.
    Inventor: Ludo Albert LENAERTS
  • Publication number: 20120269304
    Abstract: A symbol clock recovery circuit is provided for a data communication system using coherent demodulation. The symbol clock recovery circuit comprises an analog-to-digital converter comprising a first input for receiving a coherent-detected baseband analog signal derived from a carrier signal, a second input for receiving an adapted symbol clock signal, and an output for outputting a digital signal comprising a frame having a preamble with at least two symbols. The symbol clock recovery circuit comprises further a phase shifting unit comprising a first input for receiving a symbol clock signal derived from the carrier signal, and a timing detector, comprising a first input for receiving the digital signal from the analog-to-digital converter and an output for providing a signal comprising information about an optimum sample phase to the phase shifting unit.
    Type: Application
    Filed: March 12, 2012
    Publication date: October 25, 2012
    Applicant: NXP B.V.
    Inventors: Massimo Ciacci, Remco Cornelis Herman Van De Beek, Ghiath Al-kadi
  • Publication number: 20120271975
    Abstract: A method of encoding a digital bus message information, in particular a wake-up bus message information or configuring data, on a bus system, the method comprising: encoding a predetermined part of digital bus message information bits by means of sub-patterns in a stream of line symbols on at least one bus line, wherein sub-patterns consist of successive dominant and recessive phases, comprised of recessive and dominant line symbols, wherein a recessive phase is comprised of at least two recessive line symbols in order to establish a ratio of successive dominant and recessive phases that corresponds to a value of the predetermined part. A respective digital bus message, particularly for use on a bus system, is to be encoded in accordance with the method.
    Type: Application
    Filed: December 20, 2010
    Publication date: October 25, 2012
    Applicant: NXP B.V.
    Inventor: Bernd Uwe Gerhard Elend
  • Publication number: 20120270500
    Abstract: A wireless mobile communication device having NFC functionality that is designed to always be capable of NFC functionality, including secure NFC functionality by having a first and second energy source where charging of the second energy source may be achieved by the voltage induced by the received NFC signal.
    Type: Application
    Filed: June 29, 2012
    Publication date: October 25, 2012
    Applicant: NXP B.V.
    Inventors: Philippe MAUGARS, Patrice GAMAND
  • Patent number: 8294534
    Abstract: A resonator comprising a beam formed from a first material having a first Young's modulus and a first temperature coefficient of the first Young's modulus, and a second material having a second Young's modulus and a second temperature coefficient of the second Young's modulus, a sign of the second temperature coefficient being opposite to a sign of the first temperature coefficient at least within operating conditions of the resonator, wherein the ratio of the cross sectional area of the first material to the cross sectional area of the second material varies along the length of the beam, the cross sectional areas being measured substantially perpendicularly to the beam.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: October 23, 2012
    Assignee: NXP B.V.
    Inventors: Casper van der Avoort, Jozef Thomas Martinus Van Beek, Johannes van Wingerden, Joep Bontemps, Robert James Pascoe Lander
  • Patent number: 8294496
    Abstract: A sawtooth generator circuit comprises a first triangular waveform generator with equal ramp up and ramp down rates and a second triangular waveform generator with equal ramp up and ramp down rates and which are equal to the ramp up and ramp down rates of the first triangular waveform generator. The first and second triangular waveform generators are controlled to be 180 degrees out of phase. A switching arrangement alternately switches the increasing or decreasing ramps of the first and second triangular waveform generators to an output of the sawtooth generator circuit. The invention provides a sawtooth generator circuit which is suitable for high frequency applications, with low current consumption and low ground bounce. A very fast falling edge can be obtained.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: October 23, 2012
    Assignee: NXP B.V.
    Inventors: Michael Gattung, Gerhard Osterloh, Ralf Beier
  • Patent number: 8295771
    Abstract: The present invention discloses a wireless telephone system using microphone arrays together with additional signal processing to suppress the background noise in the surrounding environment. The signal processing resources of a wireless telephone and multi-channel transmission capabilities of the Bluetooth transmission are used to suppress the background noise. The wireless telephone system includes a Bluetooth transceiver communicating to a wireless telephone through a multi-channel Bluetooth transmission, and an array of microphones coupled to the Bluetooth transceiver. The array of microphones includes a first microphone producing a first audio signal output and a second microphone producing a second audio signal output. The first audio signal output and second audio signal output are transmitted to the wireless telephone through the first channel and second channel of multi-channel Bluetooth transmission respectively.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: October 23, 2012
    Assignee: NXP, B.V.
    Inventors: Olaf Hirsch, Dominique Everaere
  • Patent number: 8294203
    Abstract: Electrically isolated, deep trench isolation (DTI) structures, are formed in a wafer, and a portion of the DTI structures are converted to electrically connected structures to provide a shielding function, or to provide connection to deep buried layers. In one aspect, DTI structures include a polysilicon filling over a liner layer disposed on the inner surface of a deep trench, the polysilicon is removed by isotropic etching, and the deep trench is re-filled with a conductive material. Alternatively, the polysilicon filling remains and a contact is formed to provide an electrical connection to the polysilicon. In another aspect, a deep trench is disposed in the wafer such that a lower portion thereof is located within a deep buried layer, and after the polysilicon is removed, an anisotropic etch removes a portion of the deep trench liner from the bottom of the deep trench, thereby allowing a tungsten deposition to make electrical contact with the deep buried layer.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: October 23, 2012
    Assignee: NXP B.V.
    Inventors: Wibo Daniel Van Noort, Peter Deixler
  • Publication number: 20120262241
    Abstract: A MEMS resonator has a component which provides a capacitance associated with the transduction gap which has a temperature-dependent dielectric characteristic, which varies in the same direction (i.e. the slope has the same sign) as the Young's modulus of the material of the resonator versus temperature. This means that the resonant frequency is less dependent on temperature.
    Type: Application
    Filed: April 13, 2012
    Publication date: October 18, 2012
    Applicant: NXP B.V.
    Inventors: Kim Phan Le, Peter Gerard Steeneken, Jozef Thomas Martinus VAN BEEK
  • Publication number: 20120262235
    Abstract: A differential output stage configured for receiving differential input signal comprising first and second signals, comprising a first output for providing a first output signal, and a second output providing a second output signal, the first and second output signals together forming a differential output signal, a first voltage buffer and first controlled current source each connected to the first output, the first voltage buffer being driven by a signal in-phase with the first input signal, the first controlled current source being driven by a signal in-phase with the second input signal, and a second voltage buffer and second controlled current source each connected to the second output, the second voltage buffer being driven by a signal in-phase with the second input signal, the second controlled current source being driven a signal in-phase with by the first input signal.
    Type: Application
    Filed: March 27, 2012
    Publication date: October 18, 2012
    Applicant: NXP B.V.
    Inventor: Gian HOOGZAAD