Patents Assigned to NXP
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Publication number: 20120300517Abstract: A power factor corrector raises power factor at low loads or high mains voltages by modifying the switch timing or the current received by the power converter. It achieves this by increasing the switch-on time of a control switch during the falling time so that the majority of the switch-on time during a mains period occurs during the falling time, to thereby control the current received by the converter to compensate for current received by the intermediate filter. Some embodiments may employ a feedback system to produce one or more error signals that modify the control signal used to control the operation of the converter. Various embodiments may also include additional stages that limit the compensation range of the error signal.Type: ApplicationFiled: December 28, 2010Publication date: November 29, 2012Applicant: NXP B.V.Inventors: Cheng Zhang, Hans Halberstadt
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Patent number: 8320192Abstract: A method of programming a memory cell (100), the method comprising applying a first electric potential to a first electric terminal (101) of the memory cell (100) to accelerate first charge carriers of a first type of conductivity to thereby generate second charge carriers of a second type of conductivity by impact ionisation of the accelerated first charge carriers, and applying a second electric potential to a second electric terminal (102) of the memory cell (100) to accelerate the second charge carriers to thereby inject the second charge carriers in a charge trapping structure (103) of the memory cell (100).Type: GrantFiled: April 1, 2008Date of Patent: November 27, 2012Assignee: NXP B.V.Inventors: Nader Akil, Michiel Van Duuren
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Patent number: 8319449Abstract: The present invention relates to an electronic device for driving a light emitting semiconductor device, which includes controlling means (CNTL) being adapted for controlling a switch mode power supply for supplying the light emitting semiconductor device in response to a sensing value received by the controlling means which is indicative of a voltage across a current source for determining a current through the light emitting semiconductor device, wherein the switch-mode power supply is controlled such that the voltage across the current source is minimum.Type: GrantFiled: December 3, 2007Date of Patent: November 27, 2012Assignee: NXP B.V.Inventors: Gian Hoogzaad, Antonius M. G. Mobers
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Patent number: 8319507Abstract: A system and method for sensing a load current that flows from an amplifier into a load of the amplifier involves obtaining a voltage drop across internal impedance of the amplifier and computing the load current using the internal impedance and the voltage drop across the internal impedance.Type: GrantFiled: February 8, 2010Date of Patent: November 27, 2012Assignee: NXP B.V.Inventor: Temujin Gautama
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Patent number: 8320252Abstract: A system and method for data communications involves receiving a data frame in a receiver using a sliding receive window protocol, where a sliding receive window of the sliding receive window protocol is identified by sliding receive window information, and determining whether the data frame is a retransmitted data frame using the sliding receive window information.Type: GrantFiled: November 3, 2009Date of Patent: November 27, 2012Assignee: NXP B.V.Inventors: Koen Derom, Ludo Lenaerts
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Patent number: 8319546Abstract: A control circuit for a transistor arrangement comprises a monitoring arrangement (60) for monitoring the current flow and voltage across the transistor arrangement (50) and means (62) for determining if the current and voltage values define an operating point which falls within a stable operating region. The stable operating region comprises a region having a boundary (30) which comprises an electro-thermal instability line.Type: GrantFiled: January 21, 2010Date of Patent: November 27, 2012Assignee: NXP B.V.Inventors: Tony Vanhoucke, Godefridus A. M. Hurkx
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Publication number: 20120294074Abstract: Disclosed is a method of programming a phase change memory (100) comprising a plurality of memory cells (10), each memory cell comprising a control terminal connected to a word line (30), and a current terminal connected to a bit line (20), comprising applying a first set pulse (Vb) having a shape including a decaying trailing edge (54) to one of the bit line (20) and the word line (30) of a memory cell (10) for changing its phase change material from an amorphous phase to a crystalline phase; applying a second set pulse (Vw) to the other of the bit line and the word line of the memory cell, said second set pulse at least partially overlapping said first set pulse such that the resulting current pulse (Ids) through the memory cell exhibits the decaying trailing edge (52), said decaying trailing edge ensuring the crystallization of the phase change material; applying a first reset pulse (Vb) having said shape to one of the bit line (20) and the word line (30) of a memory cell for changing its phase change mateType: ApplicationFiled: January 11, 2011Publication date: November 22, 2012Applicant: NXP B.V.Inventors: Godferius Adrianus Maria Hurkx, Jesus Perez Gonzales
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Publication number: 20120297449Abstract: There is provided a method (100) of authenticating a first device (120) to a second device (110) based on a number of data elements and based on a predefined recombination function known by the first device and the second device. The method is executable by the first device and comprises receiving (101) an input signal by the first device from the second device, the input signal being indicative of selected ones of the data elements, generating (102), by the first device, an authentication signal by using the recombination function and based on the selected data elements as input elements, wherein the authentication signal represents a basis for the second device for authenticating the first device, and sending (103) the authentication signal to the second device.Type: ApplicationFiled: April 27, 2012Publication date: November 22, 2012Applicant: NXP B.V.Inventor: Peter Maria Franciscus ROMBOUTS
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Publication number: 20120297105Abstract: A pattern detector for a bus node for a system bus having a plurality of stations that are coupled together by means of an arrangement of bus lines, the bus node comprising: decoding circuitry configured for an analysis of sub-patterns in a stream of data on at least one bus line, and analysing circuitry configured to determine a series of digital relative length information of said sub-patterns, wherein said relative length information is generated by comparison of an actual sub-pattern with a preceding sub-pattern in the stream of data on said at least one bus line.Type: ApplicationFiled: December 22, 2010Publication date: November 22, 2012Applicant: NXP B.V.Inventor: Bernd Uwe Gerhard Elend
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Publication number: 20120293214Abstract: An electronic switching device comprises a first bipolar junction transistor (BJT) (2a) adapted to control the flow of current between a pair of switching terminals; a charge recovery circuit coupled to the base of the first BJT (2a) and adapted to establish a supply voltage across a capacitor (5) by storing in the capacitor (5) charge carriers accumulated in the base of the first BJT (2a) during application of a base drive current, the quantity of accumulated charge carriers depending on the base drive current; and a controllable current source (4) adapted to control the base drive current, thereby controlling the supply voltage.Type: ApplicationFiled: May 11, 2012Publication date: November 22, 2012Applicant: NXP B.V.Inventor: Anton Cornelis BLOM
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Patent number: 8315111Abstract: A regulator circuit is provided having multiple regulated output voltages. In accordance with various example embodiments, a regulator includes first and second pass transistors driven by a reference voltage generator circuit. The first pass transistor has a gate coupled to an output of the reference voltage generator circuit. A switching circuit is configured to couple the output of the reference voltage generator circuit to the gate of the second pass transistor in response to the enable signal being in a first state. The regulator includes a pre-charge circuit configured to charge the gate of the second pass transistor in response to an enable signal being in the first state.Type: GrantFiled: January 21, 2011Date of Patent: November 20, 2012Assignee: NXP B.V.Inventor: Sven Simons
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Patent number: 8314727Abstract: A method of providing a value for each element of a sequence of elements in a converter, the values being for a present conversion cycle in operation of the converter, wherein a pointer position identifies an element in the sequence of elements for a conversion cycle.Type: GrantFiled: December 23, 2010Date of Patent: November 20, 2012Assignee: NXP B.V.Inventors: Jingjing Hu, Lucien Johannes Breems
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Publication number: 20120288118Abstract: A method of modeling the frequency-dependent input-voltage-to-excursion transfer function of a loudspeaker, comprises, for a plurality of measurement frequencies, measuring a voltage and current and deriving an impedance at the measurement frequency. A frequency-dependent impedance function is derived. By additionally using the blocked electrical impedance and a force factor for the loudspeaker, a frequency-dependent input-voltage-to-excursion transfer function can be calculated. The invention provides a modeling approach which is not based on a parametric model, but computes the transfer functions for a set of frequencies separately. As a consequence, it does not require prior knowledge regarding the enclosure (e.g. closed or vented box) and can cope with complex designs of the enclosure.Type: ApplicationFiled: February 4, 2011Publication date: November 15, 2012Applicant: NXP B.V.Inventor: Temujin Gautama
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Publication number: 20120286588Abstract: A switching circuit employs MEMS devices. In connection with various example embodiments, signal switching circuit couples primary and secondary data link connectors having at least two channels and an electrode for each channel. A MEMS switch is coupled to each channel in of the secondary data link connectors, and includes a suspended membrane, first and second contact electrodes (one being in the membrane) and a biasing circuit that biases the membrane for moving the membrane between open and closed positions to contact the electrodes. A switch controller circuit selectively controls the application of an actuation voltage to each of the biasing circuits, thereby selectively actuating the membranes between the open and closed positions for routing signals between the primary and secondary data link connectors.Type: ApplicationFiled: May 11, 2011Publication date: November 15, 2012Applicant: NXP B.V.Inventors: Peter Steeneken, Olaf Wunnicke, Klaus Reimann, James Raymond Spehar, Michael Joehren, Gerrit Willem den Besten
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Publication number: 20120286399Abstract: In one embodiment, a method is provided for packaging a semiconductor die. A leadframe having a die-pad and one or more lead-pads is placed (502) on an assembly surface. The die-pad has a base portion (202) resting on the assembly surface, an upper portion (204) on the base portion extending laterally from the base portion, and a support arm (208) extending from and supporting the upper portion of die-pad. A semiconductor die (206) is wirebonded (504) to a top surface of the upper portion of the die-pad. The semiconductor die is wirebonded (506) to the one or more lead-pads (210). The semiconductor die and leadframe are encased (508) in a package material (802). The package material fills a space between the upper portion of the die-pad and the assembly surface. A portion of the support arm located in a cutting lane is removed (512).Type: ApplicationFiled: May 8, 2012Publication date: November 15, 2012Applicant: NXP B.V.Inventors: Tim BOETTCHER, Sven WALCZYK, Fei-Ying WONG, Pompeo UMALI, Roelf Anco Jacob GROENHUIS, Bernd ROHRMOSER, ChiFai LEE, Markus Bjoern Erik NOREN, PaulPangHing TSANG
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Publication number: 20120286410Abstract: Disclosed is a discrete semiconductor device package (100) comprising a leadframe portion (10) comprising a recess (14) having a depth substantially equal to the thickness of the discrete semiconductor device (20), wherein a raised portion of the leadframe portion adjacent to said recess defines a first contact area (12); a discrete semiconductor device (20) in said recess, wherein the exposed surface (22) of the discrete semiconductor device defines a second contact area; a protective layer (30) covering the leadframe portion and the a discrete semiconductor device but not the first contact area and the second contact area; and respective plating layers (40) covering the first contact area and the second contact area. A method of manufacturing such a package and a carrier comprising such a package are also disclosed.Type: ApplicationFiled: November 10, 2011Publication date: November 15, 2012Applicant: NXP B.V.Inventors: Roelf Anco Jacob GROENHUIS, Sven WALCZYK, Paul DIJKSTRA, Emiel de BRUIN
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Publication number: 20120286685Abstract: Various embodiments relate to a method of producing a high precision current using N current mirrors, a feedback control amplifier, and a reference current regulator to drive a light emitting diode, including: selecting one of the N current mirrors as a first current mirror; driving the first current mirror using a reference current produced by the reference current regulator; measuring a first sense voltage at the first current mirror; measuring a second sense voltage at a second current mirror that is one of the remaining N?1 current mirrors; integrating a difference of the first sense voltage and the second sense voltage to produce a feedback signal; and driving the remaining N?1 current mirrors using the feedback signal.Type: ApplicationFiled: December 5, 2011Publication date: November 15, 2012Applicant: NXP B.V.Inventor: Joseph Scott Elder
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Publication number: 20120286803Abstract: The invention relates to an electrochemical sensor integrated on a substrate, the electrochemical sensor comprising: a field effect transistor integrated on the substrate and having a source, gate and drain connections, said gate of the field effect transistor comprising: a sensing gate conductively coupled to a sensing electrode; and a bias gate, wherein the sensing gate is capacitively coupled to the bias gate and the bias gate is capacitively coupled to the substrate.Type: ApplicationFiled: April 26, 2012Publication date: November 15, 2012Applicant: NXP B.V.Inventors: Axel Nackaerts, Matthias Merz, Youri Victorovitch Ponomarev
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Publication number: 20120290241Abstract: A method of characterising an LED, as well as an integrated circuit using this method, based on a so-called characteristic resistance, in which the LED is operated at a first, relatively low, operating current and then at a second, relatively high, operating current. From the ratio between the difference between the forward voltages at these two operating currents, and the difference between the operating current, the characteristic resistance is determined. The characteristic resistance is measured at two or more moments during the operational lifetime of the device, and a prediction or estimate is made in relation to the total operational lifetime of the devices, from the evolution or change of the characteristic resistance.Type: ApplicationFiled: May 7, 2012Publication date: November 15, 2012Applicant: NXP B.V.Inventors: Viet Hoang Nguyen, Pascal Bancken
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Publication number: 20120286694Abstract: Various embodiments relate to a method for driving a light emitting diode (LED) flash including: measuring a junction temperature of the LED by applying a test current to the LED and measuring the LED forward voltage; determining the drive current based upon the measured junction temperature and measured data characteristics of the LED; and applying the drive current to the LED for a specified length of time.Type: ApplicationFiled: November 3, 2011Publication date: November 15, 2012Applicant: NXP B.V.Inventor: Joseph Scott Elder