Abstract: A circuit portion (100) of an IC comprises a plurality of conductive tracks (130) for coupling respective circuit portion elements (150), e.g. standard logic cells, to a power supply rail (110), with the conductive tracks (130) being coupled to the power supply rail (110) via at least one enable switch (132). The circuit portion (100) further comprising an element (160) for determining a voltage gradient over the circuit portion (100) in a test mode of the integrated circuit (600), which is conductively coupled to the conductive tracks (130). The element (160) has a first end portion (164) for coupling the element (160) to the power supply terminal and a second end portion (166) for coupling the element (160) to the output (620) in the test mode. This facilitates IDDQ testing of the circuit portion (100) by means of measuring a voltage gradient over the element (160).

Abstract: The invention concerns a method and signal conversion device for avoiding undesirable noise in the start up of an amplifying device, as well as to an amplifying device including such a signal conversion device. The signal conversion device (12) comprises a variable gain providing unit (Q3, Q4, Q5, Q6), a voltage to current converter (Q1, Q2, R1, R2), a variable gain control unit (22) controlling the variable gain of the variable gain providing unit, and a bias current control unit (20) for controlling a first biasing current (IB1) of the voltage to current converter, for avoiding DC offset originating noise as well as noise originating from components of the signal conversion device.

Abstract: An apparatus for storing digital media utilizes an electrically conductive element, which is for reading stored digital media, and multiple electrically conductive resonant circuits as an antenna for radio frequency communications. Each of the resonant circuits is electrically isolated from the other resonant circuits and the electrically conductive element is electrically isolated from each of the resonant circuits. As a result, the apparatus for storing digital media has a relatively wide operating frequency range and a relatively long communications range, which allows worldwide usage in various applications. For example, an optically readable compact disk (CD) utilizes a metal layer configured as a reflective surface for reading stored digital media in the CD, an electrically conductive component that is not in contact with a radio frequency identification (RFID) integrated circuit (IC), and an electrically conductive component that is in contact with the RFID IC, as an antenna for the RFID IC.

Abstract: Aspects of the present disclosure are directed toward a system in which a three-dimensional low-frequency (3D-LF) antenna and a high frequency (HF) antenna are used. The 3D-LF antenna includes three coils each oriented relative to X, Y and Z axes that define a Cartesian coordinate system for a three-dimensional space. The HF antenna is oriented along one of the axes of the LF coils and in the same antenna package as the 3D-LF antenna. The 3D-LF antenna is configured to be used in connection with an LF signal of between 3 kHz and 300 kHz. The HF antenna is configured to be used in connection with an HF signal between 3 MHz and 30 MHz.

Abstract: A multi-output DC to DC converter can have complex control requirements in CCM mode because of the differing load requirements of the outputs. A multi-output DC to DC converter having a single coil or inductor and a freewheel switch is described. A controller measures the duration of the freewheel phase. The controller increases the current supplied to the DC to DC converter in the following duty-cycle if the duration is less than a first value, and decreases the current supplied to the inductor in the following duty-cycle if the duration is greater than a second value.

Abstract: A sensor device for analyzing fluidic samples is provided, wherein the sensor device comprises a stacked sensing arrangement comprising at least three sensing layers and a multilayer structure, wherein the multilayer structure has a hole formed therein which is adapted to let pass the fluidic sample and wherein the stacked sensing arrangement is formed in the multilayer structure in such a way that the fluidic sample passes the stacked sensing arrangement when the fluidic sample passes the hole.

Abstract: The invention relates to a method according to the part of the surface of the semiconductor body adjoining the opening and which is to be kept free is provided with a cover layer after which the high-crystalline layer is formed by means of a deposition process. The material of the cover layer can then easily be chosen such that it can be selectively etched relative to the silicon underneath. In addition, the cover layer can easily be selectively deposited on the relevant part of the surface because use can be made of an anisotropic deposition process. In such a process the cover layer is not deposited in the hollow and on the bottom of the hollow. It will be apparent that for the high-crystalline layer also other materials can be chosen such as SiGe having such low Ge contents that the SiGe cannot be etched selectively very well compared to the Silicon.

Abstract: The invention suggests a transistor (21) comprising a source (24) and a drain (29) as well as a barrier region (27) located between the source and the drain. The barrier region is separated from the source and the drain by intrinsic or lowly doped regions (26, 28) of a semiconductor material. Potential barriers are formed at the interfaces of the barrier region and the intrinsic or lowly doped regions. A gate electrode (32) is provided in the vicinity of the potential barriers such that the effective height and/or width of the potential barriers can be modulated by applying an appropriate voltage to the gate electrode.

Abstract: The present invention relates to a method and system for a digital image stabilization intended to remove unwanted camera movement or jitter, both translational and rotational jitter. The system comprises the following means: 1) a motion estimation stage (10) of the global motion of the camera: block motion vectors are calculated for specific parts of the image and global motion parameters representing the camera motion are then derived. 2) a motion/jitter filtering stage (11): the translation vector and the rotation angle are filtered separately, a boundary check being then performed for verifying if the correction thus done is not above an allowed threshold. 3) a jitter compensation stage (12): the raw sequence is compensated according to the extracted jitter and the result is a stabilized sequence.

Abstract: A gain-controllable stage (CLN, A1, A2 . . . , A7, ACC) comprises a reactive signal divider (CLN) followed by an amplifier arrangement (A1, A2 . . . , A7, ACC). The reactive signal divider (CLN) may be in the form of, for example, a capacitive ladder network. The gain-controllable stage (CLN, A1, A2 . . . , A7, ACC) has a gain factor that depends on a signal division factor that the reactive signal divider (CLN) provides. The reactive signal divider (CLN) forms part of a filter (LC). The signal division factor is adjusted on the basis of a frequency (F) to which the receiver is tuned and a signal-strength indication (RS).

Abstract: The present invention relates to a capacitive MEMS sensor device for sensing a mechanical quantity.

Abstract: An integrated circuit suitable for use at high frequencies and comprising a first capacitor having an input and an output, as well as a ground connection, wherein the capacitor is ESD-protected through an resistor between the capacitor output and the ground connection, which resistor has a resistance value that is sufficiently high so as to prevent any substantial influence on RF performance of the ground connection.

Abstract: A MEMS electrostatic actuator comprises first and second opposing electrode arrangements, wherein at least one of the electrode arrangements is movable. A dielectric material (24) is adjacent the one of the electrode arrangements (22). The second electrode arrangement is patterned such that it includes electrode areas (26) and spaces adjacent the electrode areas, wherein the dielectric material (24) extends at least partially in or over the spaces. The invention uses a multitude of electrode portions as one plate. The electric field lines thus form clusters between the individual electrode portions and the opposing electrode. This arrangement provides an extended range of continuous actuation and tunability.

Abstract: A computing device comprises: a memory; a processor; an interpreter; and a Memory Management Unit. The interpreter is for controlling the processor to execute a program comprising at least one first instruction in a format that is not native to the processor and at least one second instruction in machine code that is native to the processor. The Memory Management Unit is adapted to control access by the processor to the memory and possibly also to peripherals when the at least one second instruction is executed.

Abstract: A circuit for connecting to a dimmer, the circuit configured to receive an input signal from the dimmer. The circuit comprises a first load and a switch. The switch is operable to automatically engage the first load at a predetermined time from a zero-crossing of the input signal and automatically disengage the first load at other times.

Abstract: The present invention relates to a circuit for sorting a set of data values, the circuit comprising a first set of p+q registers for storing the p+q largest data values of the set of data values including p statistical outliers; a second set of p+q registers for storing the p+q smallest data values of the set of data values including p statistical outliers, wherein p is a non-negative integer and q is a positive integer; a controller coupled to each register in said first and second sets, said controller being arranged to: receive the set of data values and for each data value obtain a comparison result of the data value with the respective data values in each of said registers; and update said registers as a function of said comparison results; the circuit further comprising a data processing circuit coupled to at least the q registers in said first and second sets, which for instance may be used to produce an average value of the data values stored in said q registers in response to the controller.

Abstract: It is described a high efficiency rectification stage using dynamic threshold MOSFET. The idea is to use the input signal to reduce the threshold voltage when the transistor has to be on, and to increase the threshold when the transistor has to be off. This allows reducing both the resistive losses and the leakage current. A matching network allows the generation of a second higher voltage signal to drive the control gates and the bulk, i.e. the wells, of the transistors. Further, a self-tuned front-end is provided to extend the bandwidth of the high-Q charge pump.

Abstract: A full duplex, high speed test interface comprises a tester side circuit and a device under test side circuit, each comprising balancing circuits. The balancing circuit of the test side circuit is configured to cancel its own transmitted data at the test side circuit such that the transmitted data does not influence any other signal generated at the test side circuit. Similarly, the balancing circuit of the device under test side circuit is configured to cancel its own transmitted data at the device under test side circuit such that the transmitted data does not influence any other signal generated at the device under test side circuit.

Abstract: A method is provided for initiating broadcasting payload data, the method comprising: wirelessly transmitting a message from a broadcast device to a network device, the message containing configuration information of the broadcasting; receiving the message at the network device and extracting the configuration information at the network device; and configuring the network device for receiving at least a part of the broadcasted payload data based on the configuration information. Further, a broadcast device for broadcasting payload data and a network device for receiving broadcasted payload data are provided.

Abstract: A near field communication device (100) for providing a communication path between a processing unit of the device and an external device, wherein the device (100) comprises the processing unit (102) and a control unit (101) coupled to the processing unit, wherein the control unit (101) is adapted for establishing a communication between the control unit and the external device (104) for providing a communication path between the processing unit and the external device via the control unit serving as a gateway.