Abstract: It is described a method for controlling an adaptation of a behavior of an audio device (100) to a current acoustic environmental condition. The method comprises (a) monitoring an audio output signal (x(t), x?(t)) being provided to an acoustic output device (110) of the audio device (100) for outputting an acoustic output signal, (b) measuring an audio input signal (z(t)) being provided by an acoustic input device (120) of the audio device (100), wherein the audio input signal (z(t)) is indicative for a feedback portion of the acoustic output signal and for the current acoustic environmental condition, (c) determining a relation between the audio output signal (x?(t)) and the audio input signal (z(t)) and (d) adapting the behavior of the audio device (100) based on the determined relation.

Abstract: A method for obtaining tickets for journeys in a passenger transportation system which comprises stations for entering and/or leaving transport means of the system for journeys between the stations, wherein at least one station of the system is assigned at least one contactlessly readable data carrier and/or at least one transport means of the system is assigned at least one contactlessly readable data carrier, wherein the contactlessly readable data carriers contain ticket information items, and one of the contactlessly readable data carriers is read by a mobile reader in at least one station and/or in at least one transport means, and the corresponding ticket information item or items is/are stored in the mobile reader.

Abstract: Disclosed is a sensor device (10) comprising a substrate (100) carrying a sensing element (110), and a metallization stack on said substrate for providing interconnections to said sensing element, the metallization stack comprising a plurality of patterned metal layers (130a-d) separated by insulating layers (120a-d), wherein a first metal layer (130c) comprises an electrode portion (16) conductively connected to the sensing element, and a further metal layer (130d) facing the first metal layer comprises a reference electrode portion (18), the electrode portion and the reference electrode portion being separated by a fluid channel (14) accessible from the top of the metallization stack. A method of manufacturing such a sensor device is also disclosed.

Abstract: An automatic gain controller is disclosed. The AGC includes an input for monitoring a signal associated with an amplifier and a gain control circuit for controlling the gain of the amplifier in response to the monitored signal, wherein the gain control circuit is adapted to control the gain of the amplifier in accordance with a gain control function having continuously variable attack and release time constants, both of which depend on the amplitude of the monitored signal.

Abstract: A device (102) supports error correction. A receiver (120) is configured to receive data over a communications link. A decapsulator (122) is coupled to the receiver and configured to create datagrams. A decoder (124) is coupled to the decapsulator and configured to store the datagrams in a table and to create codewords, the decoder storing the datagrams in table columns to create codewords in table rows. A user interface (126) is coupled to the decoder and configured to render images corresponding with the datagrams on the user interface. Advantages of the invention include efficient signal processing and prolonged battery life in mobile wireless devices.

Abstract: The present invention relates to a polar modulation apparatus and method, in which a polar-modulated signal is generated based on separately processed phase modulation (PM) and amplitude modulation (AM) components of an input signal. An amplified polar modulated output signal is generated in accordance with the phase modulation and amplitude modulation components by using a differential power amplifier circuitry and supplying an amplified phase modulation component to a differential input of the differential power amplifier circuitry. A bias input of the differential power amplifier circuitry is controlled based on the amplitude modulation component, so as to modulate a common-mode current of the differential power amplifier circuitry. Thereby, a new concept of a polar modulator with static DC-DC converter and power and/or efficiency and/or linearity controlled output power amplifier can be achieved.

Abstract: A semiconductor memory device includes n-wells (22) and p-wells (24) used to make up a plurality of memory cell elements (40). The n-wells (22) and p-5 wells (24) can be back-biased to improve reading and writing performance. One of the n-wells and p-wells can be globally biased while the other one of the n-wells and p-wells can be biased by groups, such as blocks, rows or columns. Error reduction and/or correction can be performed by adjusting the well bias.

Abstract: A semiconductor device includes a channel region 18 of semiconductor, a conductive gate electrode 12 adjacent to the channel region 18 and a gate dielectric 10 between the conductive gate electrode 12 and the channel region 18. The gate dielectric 10 is formed of a material that is a ferroelectric in bulk but in a superparaelectric state. The gate dielectric may be for instance of formula AXO3, where A is a group I or II element, and X is titanium, niobium, zirconium and/or hafnium. Such a gate dielectric 10 may be formed for example by low temperature deposition of the gate dielectric 10 or by using dopants of metal oxides to prevent domain growth, or both.

Abstract: A vertical phase change memory cell (2) has an active region (24) of phase change memory material defined either by providing a contact extending only over part of the phase change memory material or an insulating layer exposing only part of the phase change memory material. There may be more than one active region (24) per cell allowing more than one bit of data to be stored in each cell.

Abstract: A method of transferring content between at least two devices, the devices being capable of outputting said content, and a device itself is disclosed. First, the devices are connected via associated interfaces. Then, there is a detection or negotiation which of the devices is currently outputting content. Finally, content, which is currently being output, is transferred from the corresponding outputting device or devices to the other device or devices via the interfaces.

Abstract: A UHF RFID antenna is integrated into the disposable metal cover of foam, plastic, metal or cardboard containers.

Abstract: A method of controlling a loudspeaker of an electronic device provides voice coil temperature protection. When a power supply for the electronic device is first activated, a binding step is performed in which the loudspeaker impedance is determined and a temperature (such as ambient temperature) is accurately measured. These binding step measurements are used during subsequent use of the loudspeaker, to make the temperature measurements (based on voice coil impedance) as accurate as possible.

Abstract: The invention relates to a DC-DC converter adapted to supply a MEMS device comprising an input for receiving a DC voltage (Vs), an output for transmitting a supplied voltage (V1) to the MEMS device. The DC-DC converter further comprises a biasing circuit (MNBC) for biasing a first node (Vmi) and a second node (Vme) with a first biasing voltage (Vm1) and a second biasing voltage (Vm2).

Abstract: A circuit is implemented for a near field communication (NFC) system which includes a communication partner appliance. The circuit is a data carrier which includes activators, a receiver, a detector, and a processor. The activators activate a first or second communication mode. The receiver receives a carrier signal that is transmitted to the communication partner appliance by another communication partner appliance. The detector detects the presence of the received carrier signal and transmits a carrier signal present signal or a carrier signal not-present signal. The processor recognizes a command signal transmitted with the carrier signal. The processor also generates and transmits a command-end signal that is separate from the transmitted command signal and represents the end of the transmitted command signal. The processor also determines whether, after the occurrence of the command-end signal, the carrier signal present signal is present. The processor also transmits a first or second activation signal.

Abstract: A functional unit of a device is associated with a secret. Data stored in a memory location of the device is encrypted using the secret. The memory location of the device is accessible to other functional units; but without knowledge of the secret, the stored encrypted data is useless. The sharing of the secret creates a secure path between memory locations and functional units of the device while maintaining a unitary memory architecture. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Abstract: The present invention relates to a video encoder (ENC) for encoding frames (FR) of a video signal before transmission, said video encoder (ENC) including an encoding decision unit (EDU) for deciding which kind of coding will be used for each data of said frame (FR) in an encoding unit (ENU). Said video encoder (ENC) further implements a freshness map calculation unit (FMCU) for calculating, throughout the time, for each data of said frame (FR), a corresponding freshness value (FV) taking into account Intra and Inter prediction mechanisms, independently from a calculation of a distortion. Said freshness value (FV) express on which degree encoded data (ED) are relying on previously transmitted data and said freshness value (FV) is used by said encoding decision unit (EDU).

Abstract: According to an example embodiment, a heterostructure bipolar transistor, HBT, includes shallow trench isolation, STI, structures around a buried collector drift region in contact with a buried collector. A gate stack including a gate oxide and a gate is deposited and etched to define a base window over the buried collector drift region and overlapping the STI structures. The etching process is continued to selectively etch the buried collector drift region between the STI structures to form a base well. SiGeC may be selectively deposited to form epitaxial silicon-germanium in the base well in contact with the buried collector drift region and poly silicon-germanium on the side walls of the base well and base window. Spacers are then formed as well as an emitter.

Abstract: In a radio including analog and digital portions, with at least one A/D converter between the analog and digital portions, and the selectivity of the radio at least partly implemented in the digital domain, an AGC controller sets a first variable gain amplifier (VGA) (302) to low gain upon a determination that a wide-band power estimation exceeds a wide-band threshold. The wide-band threshold is selected to reduce the occurrence of A/D converter saturation. If the wide-band power estimation is less than the wide-band threshold, then for each VGA (302) in the analog portion, a determination is made whether a narrow-band power estimate exceeds a narrow-band threshold, corresponding to that VGA (302), plus a hysteresis value, in which case that VGA (302) is set to low gain; or whether the narrow-band energy estimate is less than the narrow-band threshold minus a hysteresis value, in which case that VGA (302) is set to high gain.

Abstract: A method of controlling a pre-charge process of a data line (21, 22) in an integrated circuit (100) comprises the step of monitoring a rate of change of a voltage applied to the data line (21, 22) for enhancing the security. Further a respective integrated circuit (100) is disclosed.

Abstract: I2C clock generators are implemented using a variety of methods. Using one such method, a method is implemented using logic circuitry arranged in a state machine to control the clock signal (110) on the I2C bus. A first state (202) of the state machine determines whether to effect a clock stretching delay. A second state (206) of the state machine determines whether the I2C bus is configured to run in a standard clock mode or in another one of multiple faster clock modes. A third state (210) of the state machine drives the clock signal in one binary logic state for more than about 0.5 microseconds before allowing the clock signal (110) to be driven in the other binary logic state and allowing the clock signal to remain in the other binary logic state for more than about 0.5 microseconds.