Abstract: The present invention provides a capacitive MEMS device comprising a first electrode lying in a plane, and a second electrode suspended above the first electrode and movable with respect to the first electrode. The first electrode functions as an actuation electrode. A gap is present between the first electrode and the second electrode. A third electrode is placed intermediate the first and second electrode with the gap between the third electrode and the second electrode. The third electrode has one or a plurality of holes therein, preferably in an orderly or irregular array. An aspect of the present invention integration of a conductive, e.g. metallic grating as a middle (or third) electrode. An advantage of the present invention is that it can reduce at least one problem of the prior art. This advantage allows an independent control over the pull-in and release voltage of a switch.

Abstract: A communications network comprising a plurality of nodes, each comprising a network device and a network interface, at least one of the nodes having a first local power manager associated therewith and adapted to control power to the network device.

Abstract: A system, apparatus, and method are provided for a video detector that computes a measure of how much a given video content resembles one of a de-interlaced video content or a progressive video content. More particularly, the present invention determines the position of original and interpolated lines and the scaling factor of an input content whenever that content was scaled after de-interlacing.

Abstract: A circuit for monitoring capacitive signal sources, and particularly detecting changes in capacitance of a variable capacitor, comprises the capacitive signal source and a differential analogue to digital converter. A voltage source provides a DC voltage to a first terminal of the differential analogue to digital converter, and the capacitive signal source is connected to the other terminal of the differential analogue to digital converter. A feedback path low pass filters the output of the differential analogue to digital converter to derive a DC offset value and couples the DC offset value to the other terminal of the differential analogue to digital converter.

Abstract: A MEMS microphone has a support surface, a microphone substrate over the support surface and an assembly of a microphone membrane and spaced back electrode supported over the substrate. The substrate has an opening beneath the assembly. The interface between the support surface and the substrate comprises a plurality of discrete spaced portions. This structure provides some resilience to differential expansion and contraction that can arise during processing. The support surface can then be a different material to the substrate, for example a PCB laminate as the support surface and silicon as the substrate.

Abstract: A male connection component (120) for connection with a correspondingly configured female connection component (140) having a recess (144) extending into a main surface (170) of a female Substrate (142) of the female connection component (140), wherein the female connection component (140) comprises a plurality of electrically conductive female contacts (146) which are electrically decoupled from one another and are arranged at different height levels with regard to the main surface (170) of the female Substrate (142), the male connection component (120) comprising a male Substrate (102), a Protrusion (104) protruding from a main surface (160) of the male Substrate (102) and comprising a plurality of electrically conductive male contacts (106) which are electrically decoupled from one another and are arranged at different height levels with regard to the main surface (160) of the male Substrate (102), wherein the male connection component (120) is adapted for connection with the female connection component (1

Abstract: The present invention relates to a method for fabricating an electronic component, comprising fabricating, on a substrate (102) at least one integrated MIM capacitor (114) having a top capacitor electrode (118) and a bottom capacitor electrode (112) at a smaller distance from the substrate than the top capacitor electrode; fabricating an electrically insulating first cover layer (120) on the top capacitor electrode, which first cover layer partly or fully covers the top capacitor electrode and is made of a lead-containing dielectric material; thinning the first cover layer; fabricating an electrically insulating second cover layer (124) on the first cover layer, which second cover layer partly or fully covers the first cover layer and has a dielectric permittivity smaller than that of the first cover layer; and fabricating an electrically conductive resistor layer (126) on the second cover layer, which resistor layer has a defined ohmic resistance.

Abstract: An electronic device includes a metal-insulator-metal capacitive device. In connection with an example embodiment, a metal-insulator-metal (MIM) capacitor device is in a substrate having a surface and a three dimensional structure with high aspect ratio sidewalls. The MIM capacitor device includes a first capacitor electrode including a platinum group metal (PGM)-based layer and a Ta-based layer that is between the PGM-based layer and one of the sidewalls. The MIM capacitor also includes a second capacitor electrode and an insulator material between the first and second electrodes.

Abstract: A MEMS device comprises first and second opposing electrode arrangements (22,28), wherein the second electrode arrangement (28) is electrically movable to vary the electrode spacing between facing sides of the first and second electrode arrangements. At least one of the facing sides has a non-flat surface with at least one peak and at least one trough. The height of the peak and depth of the trough is between 0.01t and 0.1t where t is the thickness of the movable electrode.

Abstract: A symmetrical inductor having at least one inductor turn. Each inductor turn has a plurality of separate conductive paths having substantially equal inductance. The inductor also comprises a plurality of crossing points. At each crossing point, some of the conductive paths within a given inductor turn cross over each other to change the order in which they appear within the inductor turn.

Abstract: Test vectors for structural testing of an analog circuit are selected by first selecting an initial set of test input vectors for the analog circuit. A set of faults is selected, comprising faults that each correspond to a respective node in the analog circuit and corresponding fault voltage value for that node. A measure of overlap is computed between probability distributions of test output signal values for the analog circuit in response to the test input vectors in the presence and absence of each of the faults from said set of faults respectively, as a function of estimated statistical spread of component and/or process parameter values in the analog circuit. Test input vectors are selected from the initial set of test input vectors for use in testing on the basis of whether the measure of overlap for at least one if the faults is below a threshold value in response to the selected test input vector under control of the test selection computer.

Abstract: The semiconductor device (100) comprises at least one semiconductor element (20), a metallization structure comprising a first (31) and a second line (32) and extending thereon a resistor. An electrically insulating protection layer (36) is present on the resistor (35) and is defined in a pattern that is substantially identical to the resistor pattern and has a temperature stability up to a temperature that is at least equal to a deposition temperature of a passivation layer (37) to be deposited thereon so as to cover the metallization structure. Both the resistor (35) and the protection layer (36) are deposited conformally on the metallization structure and any underlying substrate.

Abstract: An integrated array of non volatile magnetic memory devices, each having a first magnetic layer (10) with a fixed magnetization direction; a free magnetic layer (20) with a changeable magnetization direction; a spacer layer (30) separating the first magnetic layer and the free magnetic layer, and a switch (40) for selecting the device, the layers and at least part of the switch being formed as a columnar structure such as a nanowire. The switch is preferably formed integrally with the columnar nano-structure. By incorporating the switch in the columnar structure with the magnetic layers, the device can be made smaller to enable greater integration. This can be applied to magnetic devices using external fields or those using only fields generated in the columnar structure. A write current can be coupled along the columnar structure in a forward or reverse direction to alter the direction of magnetization of the free magnetic layer according to the direction of the current.

Abstract: Packaged semiconductor electronic device to be individually positioned and coupled to peripheral electronic devices, the package comprising a light emitting semiconductor device, and a switch for controlling the light emitting semiconductor device.

Abstract: A control circuit for a transistor arrangement comprises a monitoring arrangement (60) for monitoring the current flow and voltage across the transistor arrangement (50) and means (62) for determining if the current and voltage values define an operating point which falls within a stable operating region. The stable operating region comprises a region having a boundary (30) which comprises an electro-thermal instability line.

Abstract: Various embodiments relate to the production of erasure flags to indicate errors resulting from decoding of convolutional codes. A Viterbi decoder may use a register exchange method to produce a plurality of survivor codes. At a defined index, a majority vote may take place comparing values of bits in each of the survivor codes. This majority vote may involve obtaining both the quantity of high-order bits and the quantity of low-order bits and obtaining the difference of the two quantities. The absolute value of the difference of high-order bits to low-order bits may be compared to a defined threshold. When the absolute value difference is below the defined quantity, an erasure flag may be produced and associated with the bits of the defined index, indicating that they are eligible for erasure. In some embodiments, a Reed-Solomon decoder may use the erasure flag to target specific survivor bits or survivor bytes for error-correction through erasure.

Abstract: A method and system for responding to a request received at an object with a radio frequency identification (RFID) device is described. In one embodiment, a method for responding to a request received at an object with an RFID device is described. The method for responding to a request received at an object with an RFID device involves receiving a request at an RFID device, providing the request from the RFID device to a component of the object, and processing the request at the component of the object. Other embodiments are also described.

Abstract: The invention relates to a method for saving power especially for tag talks first data transmission in radio frequency identification (RFID) systems including a tag containing a non-volatile memory, a digital block and an analogue block and a static random access, wherein the data of the non-volatile memory are prefetched from the non-volatile memory into the digital block and the tag talks first data will be stored in the static random access memory embedded in the digital block.

Abstract: In time varying OFDM systems, the effect of a non-ideal time synchronization may lead to a poor performance in terms of decoded average bit error rate versus the signal-to-noise ratio. The receiver apparatus (3) of the transmission system (1) estimates a subcarrier-dependent channel frequency response and determines an intercarrier interference spreading on the basis of a cyclic shift in symbols carried by the subcarriers. Therewith, an intercarrier interference included in an OFDM signal can be canceled, even in case of a non-ideal time synchronization.

Abstract: A low power, high dynamic range sigma-delta modulator comprises a quantizer followed by a digital integrator for generating an integrated digital signal from a quantized signal. The output of the digital integrator is coupled to a digital-to-analog converter in the feedback loop of the sigma-delta modulator.