Abstract: An energy storage cell arrangement has a shared inductor (60). A switching arrangement (62) is controllable such that it is able to couple one side of the inductor to any one of a first set of cell terminals, and to couple the other side of the inductor to any one of a second set of cell terminals, wherein the first and second sets of cell terminals together comprise all cell terminals of the series arrangement. In this way, energy can be transferred between cells in a configurable way, using a shared inductor.

Abstract: A sub-stage (212) for a charge pump (200) having a first and second phase of operation. The sub-stage (212) comprising a dc input pin (222); a dc output pin (220); a first rf input pin (202) configured to receive a first differential signal; and a second rf input pin (204) configured to receive a second differential signal. The sub-stage (212) further comprising a first transistor (224) having a first, second and third terminal, wherein a current channel is provided between the first and second terminal of the transistor (224); and a second transistor (226) having a first, second and third terminal, wherein a current channel is provided between the first and second terminal of the transistor (226). The first terminal of the first transistor (224) is connected to the dc input pin (222), the second terminal of the first transistor (224) is connected to the first terminal of the second transistor (226), and the second terminal of the second transistor (226) is connected to the dc output pin (220).

Abstract: An analog silicon photomultiplier system includes at least one analog pixel comprising a plurality of analog photodiodes (APDs), and a capacitor, a signal generator, a phase detector, and a compensation network. The signal generator is configured to generate and propagate a sinusoidal signal concurrently along first and second transmission lines. A capacitor is loaded on the first transmission line when an APD corresponding to the capacitor detects a photon. The phase detector is coupled with the first and second transmission lines, determines a phase difference between the first transmission line and the second transmission line and calculates a number of APDs that have fired from the phase difference. The compensation network is coupled with the second transmission line and the phase detector, and comprises a plurality of compensation capacitors, wherein the compensation capacitors are loaded on the second transmission line in proportion to the number of APDs that have fired.

Abstract: A power conversion controller for controlling the operation of a switch in a power conversion circuit. The switch having a “time-on” property and a “clamping frequency” property, in use. The power conversion controller comprises a detector configured to detect one or more operational parameter values of the power conversion circuit, and a clamping frequency adjuster configured to adjust the clamping frequency of the switch in accordance with the one or more detected parameter values in order to maintain the “time-on” property of the switch above a minimum threshold value.

Abstract: A circuit for a switch mode power supply is presented. The circuit comprises a transient detection portion adapted to delay an analogue error signal (Vdiff) derived from the output voltage (Vout) of the switch mode power supply and to detect whether the difference between the output voltage and the delayed analogue error signal (Vdel) is within a predetermined range.

Abstract: A method of manufacturing a Bulk Acoustic Wave device by providing an active layer formed of an electro-mechanical transducer material, providing a first electrode on the active layer, defining a first electrode portion of the device, whereby a remaining portion of the device is defined around the first electrode, providing a stop-layer on the first electrode, depositing a first dielectric layer on the resultant structure, and planarizing the first dielectric layer until the stop-layer on the first electrode is exposed.

Abstract: A multi-channel receiver comprising an ADC and a multi-band, multi-channel selector. The ADC converts a broad-band multi-channel signal into a digital signal. The digital signal is then broken into sub-bands each containing a plurality of channels. A channel selector selects desired channels from the appropriate sub-band. The multi-channel receiver may deliver simultaneous channels equal to the number of channel selectors that have been implemented. The multi-channel receiver may be implemented on a single integrated circuit.

Abstract: The present invention relates to a polar transmission method and a polar transmitter for transmitting phase and amplitude components derived from in-phase (I) and quadrature-phase (Q) components of an input signal. A first conversion is provided for converting the in-phase (I) and quadrature-phase (Q) components into the phase and amplitude components at a first sampling rate. Additionally, a second conversion is provided for converting the phase component into a frequency component, wherein the second conversion comprises a rate conversion for converting the first sampling rate into a lower second sampling rate at which the frequency component is provided. Thereby, the second sampling rate can be used as a lower update rate in a digitally controlled oscillator in order to save power or because of speed limitations, while the surplus phase samples obtain due to the higher first sampling rate enable better approximation of the phase component after the digitally controlled oscillator.

Abstract: The invention relates to a semiconductor device (10) comprising a semiconductor body (1) with a high-ohmic semi-conductor substrate (2) which is covered with a dielectric layer (3, 4) containing charges, on which dielectric layer one or more passive electronic components (20) comprising conductor tracks (20) are provided, wherein, at the location of the passive elements (20), a region (5) is present at the interface between the semiconductor substrate (2) and the dielectric layer (3, 4), as a result of which the conductivity of an electrically conducting channel induced in the device (10) by the charges is limited at the location of the region (5). According to the invention, the region (5) is formed by deposition and comprises a semi-insulating material. As a result, the device (10) has a very low high-frequency power loss because the inversion channel is formed in the semi-insulating region (5).

Abstract: A phase detection system (100) comprises an input terminal (101), first and second peak detectors (103, 113), an averaging unit (107), an offset unit (122), and a comparator (126). Input terminal (101) is coupled to the first and to the second peak detectors (103, 113) and provides an input signal to phase detection system (100). Averaging unit (107) is coupled between offset unit (122) and both the first peak detector and the second peak detector (103, 113), and generates an intermediate signal. Offset unit (122) is coupled to input terminal (101) and generates two comparable signals by applying a predetermined offset in signal strength to the input signal or the intermediate signal. The comparator (126) is coupled to the offset unit (122) and generates an output signal by comparing the two comparable signals which is indicative of the phase of the input signal.

Abstract: The present application relates to a method for processing data in a vector processor. The present application relates also to a vector processor for performing said method and a cellular communication device comprising said vector processor. The method for processing data in a vector processor comprises executing segmented operations on a segment of a vector for generating results, collecting the results of the segmented operations, and delivering the results in a result vector in such a way that subsequent operations remain processing in vector mode.

Abstract: A micro-electromechanical resonator suspended from an anchor. The resonator has: a length; a first width at a first distance from the anchor; and a second width at a second, greater distance from the anchor. The second width is greater than the first width, and the width of the resonator tapers gradually along at least part of its length from the second width to the first width.

Abstract: In the field of cryptography there is a need to reduce the time taken to cryptographically transform data text while maintaining the low memory requirements associated with conventional square-and-multiply modular exponentiation. A method of cryptographically transforming data text c comprises the step of generating an integer representation m of the data text c according to m=cd where d is a predetermined exponent. The step of generating the integer representation m includes generating a sequence of intermediate numbers, each intermediate number being based on two or fewer earlier numbers in the sequence. Generating a sequence of intermediate numbers includes retrieving a pre-stored instruction to determine which two or fewer earlier numbers in the sequence a given intermediate number is based on and the functional manipulation of the or each earlier number required to generate the given intermediate number.

Abstract: The invention relates to a method of manufacturing a semiconductor device (1), the method comprising: i) providing a substrate (10); ii) providing a photoresist layer (15) on the substrate (10), the photoresist layer (15) comprising an opening (16) having pre-shaped sidewalls (18); iii) filling the opening (16) with an electrically conductive material (20) for defining a contact pad (22) having further sidewalls (23, 26) corresponding with the pre-shaped sidewalls (18).

Abstract: The present invention relates to a semiconductor component that has a substrate and a projecting electrode. The projecting electrode has a substrate face, which faces the substrate and which comprises a first substrate-face section separated from the substrate by a gap. The gap allows a stress-compensating deformation of the projecting electrode relative to the substrate. The substrate face of the projecting electrode further comprises a second substrate-face section, which is in fixed mechanical and electrical connection with the substrate. Due to a smaller footprint of mechanical connection between the projecting electrode and the substrate, the projecting electrode can comply in three dimensions to mechanical stress exerted, without passing the same amount of stress on to the substrate, or to an external substrate in an assembly. This results in an improved lifetime of an assembly, in which the semiconductor component is connected to an external substrate by the projecting electrode.

Abstract: The invention describes a method for the monitoring and management of data traffic in a communication system with several communication nodes which communicate via interfaces monitored by a bus monitor, comprising the following steps: a) provision of a predefined communication time schedule for all communication nodes, b) initialization of the bus monitor, c) synchronization of the communication time schedule of the bus monitor with the predefined communication time schedule executed by the communication nodes in a distributed arrangement, the synchronization taking place on the basis of activities observed at the interfaces, d) monitoring of the activities of the communication nodes by the bus monitor, e) comparison of the activities with the predefined communication time schedule, and f) deactivation of the interface for any communication node for which an activity not compatible with the predefined communication time schedule has been detected. A circuit arrangement and its use are also described.

Abstract: A moisture sensor includes interdigitated first and second electrodes formed in trenches A porous low-k dielectric is provided between the electrodes. The electrodes are of Cu surrounded by a barrier layer to protect the Cu from corrosion. TiN may be used as barrier layer and selectively deposited barrier material such as CoWB, MoWB or NiMoP as barrier layer.

Abstract: A circuit comprises an array of memory cells (10). A plurality of sensing circuits (20), are coupled to the output (14) of respective memory cells (10), for comparing the output signal of the respective one of the memory cells (10) with a reference signal to form a data signal from the output signal from the respective one of the memory cells (10). A reference generator circuit (24, 26) forms the reference signal from a sum wherein each respective one of the memory cells (10) of the addressed group contributes a contribution that is a function of the output signal of the respective one of the memory cells (10). The contributions are equalized for output signal values at more than a saturating distance above the reference signal, and the contributions are equalized for output signal values at more than the saturating distance below the reference signal.

Abstract: A system, apparatus and methods are described that select a guard interval length (345) for a multi-path communications channel. In one embodiment, the guard interval length is selected based on a relationship between a selected coherence bandwidth (335) and a RMS delay (340) of the communication channel.

Abstract: A device (100) for processing data, the device (100) comprising an integrator unit (103, 104) adapted for integrating an input signal (V1) and a correction unit (101, 102) adapted for correcting a clipping integrator unit (103, 104) by forcing a zero-crossing of an output signal (V1, V2) of the integrator unit (103, 104).