Patents Assigned to NXP
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Publication number: 20110091038Abstract: Transponder (180) having stored a fixed identification number, which expands said identification number with a random number, encrypts said expanded number with a key, and sends it to a reader (160) on its request. Reader (160), which on request receives an encrypted number from a transponder (180), decrypts a received encrypted number with a key, which was also used by the transponder (180), and extracts a fixed identification number associated with the transponder (180).Type: ApplicationFiled: May 12, 2009Publication date: April 21, 2011Applicant: NXP B.V.Inventor: Peter Thueringer
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Publication number: 20110093661Abstract: A multiprocessor system has a background memory and a plurality of processing elements (10), each comprising a processor core (100) and a cache circuit (102). The processor cores (100) execute programs of instructions and the cache circuits (102) cache background memory data accessed by the programs. A write back monitor circuit (14) is used to buffer write addresses used for writing data by at least part of the processor cores (100). The programs contain commands to read the buffered write back addresses from the write back monitor circuit (14) and commands from the programs to invalidate cached data for the write back addresses read by the commands to read the buffered write back addresses. Thus cache management is performed partly by hardware and partly by the program that uses the cache. The processing core may be a VLIW core, in which case instruction slots that are not used by the program can be made useful to include instructions for cache management.Type: ApplicationFiled: June 9, 2009Publication date: April 21, 2011Applicant: NXP B.V.Inventors: Jan Hoogerbrugge, Andrei Sergeevich Terechko
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Publication number: 20110093751Abstract: An electronic circuit having a boundary scan test circuit receives, though one pin, an embedded clock encoded test signal having an encoded bit stream having occurrences of a first header followed by at least one encoded boundary scan mode bit and an encoded second header followed by at least one boundary scan test input bit. The bit stream and the clock are extracted and occurrences of the first header and second header are detected. Based on the detected occurrences the boundary scan mode bits and boundary scan input bits are identified and distributed to the electronic circuit, along with the extracted clock, and boundary scan test is performed.Type: ApplicationFiled: October 19, 2009Publication date: April 21, 2011Applicant: NXP B.V.Inventors: Henk Boezen, Leon Van de Logt, Liquan Fang
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Publication number: 20110089506Abstract: The invention relates to a integrated circuit comprising an electronic circuit integrated on a substrate (5), and further comprising protections means for protection of the electronic circuit (25). The protection means comprise: i) a first strained encapsulation layer (10) being provided on a first side of the substrate (5), wherein the first strained encapsulation layer (10) has a strain (S1) in a direction parallel to the substrate (5), and ii) disabling means (20) arranged for at least partially disabling the electronic circuit (25) under control of a strain change in the substrate (5). The invention further relates to a method of manufacturing such integrated circuit, and to a system comprising such integrated circuit. Such system is selected from a group comprising: a bank-card, a smart-card, a contact-less card and an RFID.Type: ApplicationFiled: May 26, 2009Publication date: April 21, 2011Applicant: NXP B.V.Inventors: Romano Hoofman, Remco Henricus Wilhelmus Pijnenburg, Youri Victorovitch Ponomarev
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Publication number: 20110091057Abstract: An apparatus implements directional sound detection. The apparatus includes a portable hearing aid device, a plurality of sound detectors, and electronic circuitry. The sound detectors are coupled to the portable hearing aid device. The sound detectors are arranged in a substantially planar array which is located in approximately a two-dimensional plane which extends through both a listener position and a sound generator position. The electronic circuitry is electronically coupled to the plurality of sound detectors. The electronic circuitry generates a reproduced sound signal based on sound signals from at least a subset of the plurality of sound detectors. The subset includes at least two sound detectors in a one-dimensional line and at least one sound detector located within the two-dimensional plane other than along the one-dimensional line.Type: ApplicationFiled: October 16, 2009Publication date: April 21, 2011Applicant: NXP B.V.Inventor: RENE MARTINUS MARIA DERKX
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Publication number: 20110090022Abstract: An RF switch for an RF splitter is disclosed, in which the bias voltage for the RF switching elements can be supplied, by means of an RF to DC translator, from the RF signal on the input side to the switch. By means of a native NMOS switch, routing of the RF signal is thus enabled without the necessity for an external power supply.Type: ApplicationFiled: June 11, 2009Publication date: April 21, 2011Applicant: NXP B.V.Inventor: Frederic Francois Villain
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Publication number: 20110093763Abstract: Electrical circuit comprising: A Dynamic Random Access Memory comprising a plurality of memory cells; An associated device connected to said memory via a data bus; Memory cell refresh means, in which: A refresh access is employed to refresh stored data in a memory cell, with the aid of said refresh means; A data access is employed to exchange data between the associated device and a memory cell via said data bus, said data access comprising a read access or a write access, wherein: The circuit comprises conflict check means that, for a given memory cell, detect and communicate a conflict between a requested access of a first type to said cell, said first type being one of a data access and a refresh access, and an ongoing access of a second type to said cell, said second type being the other of a data access and a refresh access.Type: ApplicationFiled: June 17, 2009Publication date: April 21, 2011Applicant: NXP B.V.Inventor: Roelof Herman Willem Salters
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Publication number: 20110090722Abstract: A switched capacitor DC-DC voltage converter comprising: a first circuit (21) having a plurality of switches (M1-M4); and a second circuit (22) having a plurality of capacitors (C1, C2, C3), each capacitor connected to one or more of the plurality of switches, wherein the first and second circuits are provided on respective first and second dies on a common substrate.Type: ApplicationFiled: June 11, 2009Publication date: April 21, 2011Applicant: NXP B.V.Inventor: Leo Warmerdam
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Patent number: 7930127Abstract: A system and method for synchronizing otherwise independent oscillators private to I2C Bus slave devices. An I2C Bus master device is capable of issuing two new general call commands, MEASURE PULSE and RESET PRESCALE. The I2C Bus slave devices respond to the MEASURE PULSE command by returning a digital count related to the number of ticks its local, private oscillator cycles through during a signal pulse on the I2C Bus. All such I2C Bus slave devices measure the same signal pulse on the I2C Bus, so the differences in the digital measurements returned during the MEASURE PULSE command are proportional to their respective oscillator frequencies. The various digital measurements returned are used to calculate appropriate oscillator prescale factors that will harmonize the final product frequencies of all of the local oscillators on all of the I2C Bus slave devices in the system.Type: GrantFiled: November 11, 2008Date of Patent: April 19, 2011Assignee: NXP B.V.Inventors: Jay Richard Lory, Alma Stephenson Anderson
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Patent number: 7928006Abstract: There is described a method of manufacturing a damascene interconnect (1) for a semiconductor device. A non conductive diffusion barrier (10) is formed over the wall(s) of a passage (7) defined by a porous low K di-electric material (6) and over the surface of a copper region (3) that closes one end of the passage (7). The non-conductive barrier layer (10) is plasma treated to transform an upper portion thereof (10b) into a conductive layer, while a low portion thereof (10a) comprising material that has penetrated pores of the di-electric material remains non-conductive. The passage (7) is then filled with a second copper region (13) forming an electrical interconnect with the first copper region (3) via the now conductive upper portion (1Ob) of the barrier (10). As a person skilled in the art will know, all embodiments of the invention described and claimed in this document may be combined without departing from the scope of the invention.Type: GrantFiled: September 8, 2006Date of Patent: April 19, 2011Assignee: NXP B.V.Inventor: Wim Besling
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Patent number: 7928760Abstract: An input and/or output pad is dedicated to an integrated circuit comprising a core with input and/or output pins. This pad comprises a pad cell comprising a pad block connected to an input buffer and/or an output buffer and arranged to be connected to one of the core input and/or output pins. The pad also comprises a pad logic module comprising a first and/or a second boundary scan cell, connected to the pad block through the input buffer and/or output buffer and arranged to feed input signals to and/or deliver output signals from the pad block, and control means connected to the first and/or second boundary scan cell(s) and adapted to receive control signals for controlling access to the first and/or second boundary scan cell(s) and feeding the first boundary scan cell with the input signals and/or outputting the output signals delivered by the first boundary scan cell.Type: GrantFiled: September 5, 2005Date of Patent: April 19, 2011Assignee: NXP B.V.Inventors: Eric Bernasconi, Emmanuel Solari
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Patent number: 7926168Abstract: A method of manufacturing a coil having a cross section differing from a circular ring cross section. In this method a circular cylindrical coil with a circular ring cross section is first wound and then reshaped into a coil with a cross section differing from the circular ring cross section. At least two axially parallel fingers of an expander are temporarily inserted into the coil interior for reshaping the wound circular cylindrical coil and are displaced in a diverging relative movement after the insertion and while doing so expand the initially circular cylindrical coil into the coil having the different cross section.Type: GrantFiled: August 16, 2005Date of Patent: April 19, 2011Assignee: NXP B.V.Inventor: Heinz Nierlich
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Patent number: 7929265Abstract: A radio frequency interface circuit (11) for a radio frequency identification tag comprising—at least two input terminals (RF+, RF?) for connecting the circuit (10) with an antenna structure of the radio frequency identification tag, —one or more variable resistive loads (14) coupled across pairs of the input terminals (RF+, RF?)—one or more rectifiers (15) each connected on its input side to a pair of input terminals (RF+, RF?) and on its output side to a parallel connection of voltage control means (16) and modulation control means (17), wherein combiner means (18) are provided which are adapted to receive an output signal (19, 20) from the voltage control means (16) and the modulation control means (17), respectively, and to generate a control signal (21) for controlling each variable resistive load (14) depending on the received signals (19, 20) in such a way that each variable resistive load (14) serves as a modulation and voltage regulation circuit, and wherein each variable resistive load is adapted toType: GrantFiled: December 14, 2006Date of Patent: April 19, 2011Assignee: NXP B.V.Inventors: Roland Brandl, Ewald Bergler, Robert Spindler
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Patent number: 7926719Abstract: An electronic circuit (12, 12?) for a reader device (10, 10?) for contactless communication with a transponder (20) is disclosed. The electronic circuit (12, 12?) comprises a connection (13a, 13b) to an antenna (11) of said reader device (10, 10?), which antenna (11) is designed for receiving a radio signal (TRS) from said transponder (20). Furthermore, it comprises a receiving module (14), which is connected to the antenna connection (13a, 13b) and arranged for processing an input voltage (VI) from said antenna (11) representing said radio signal (TRS). To provide satisfactory operation of the receiving module (14) and to compensate a bad matching of the antenna circuit to the electronic circuit (12, 12?) and/or bad environmental conditions where the reader device (10, 10?) is operated, the electronic circuit furthermore comprises a control module (15, 15?).Type: GrantFiled: October 16, 2006Date of Patent: April 19, 2011Assignee: NXP B.V.Inventors: Bernhard Spiess, Pamir Erdeniz, Michael Zenz
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Patent number: 7928567Abstract: A power supply network (2) for an integrated circuit is provided, the power supply network (2) comprising a supply grid (4); a plurality of supply pads (6), each supply pad (6) being in electrical contact with an edge of the supply grid (4); a current spreader (8) for at least one of the plurality of supply pads (6), each current spreader (8) being in electrical contact with a respective supply pad (6) and the supply grid (4), each current spreader (8) being sized so that it overlaps with a respective portion of the supply grid (4); and each current spreader (8) having a lower electrical resistance than the supply grid (4). Further embodiments provide an integrated circuit with a power supply network as described above.Type: GrantFiled: June 19, 2007Date of Patent: April 19, 2011Assignee: NXP B.V.Inventors: Petrus J. A. M. Van De Weil, Andrew T. Appleby
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Patent number: 7927894Abstract: The present invention relates to an apparatus (10) for aligning an optical device with an object. The apparatus comprises, a frame (12), a support unit (16) for supporting said optical device or said object and a transportation device (14) arranged to at least tilt the support unit in relation to the frame, wherein a segment of a sphere (18, 22) is provided, which segment defines a spherical surface (20), and the tilting movement of the support unit is controlled by said spherical surface. The apparatus according to the invention allows for a tilting movement between said optical device and said object, while such movement does not lead to a shift in focus. Furthermore the invention relates to an optical instrument and a semiconductor process system comprising said apparatus.Type: GrantFiled: February 1, 2007Date of Patent: April 19, 2011Assignee: NXP B.V.Inventors: Job Vianen, Jozef P. W. Stokkermans
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Patent number: 7927966Abstract: The invention relates to a method of manufacturing openings in a substrate (5), the method comprising steps of: providing the substrate (5) with a masking layer (40) on a surface thereof; forming a first opening (10), a second opening (30), and a channel (20) in between the first opening (10) and the second opening (30) in the masking layer (40), the channel (20) connecting the first opening (10) with the second opening (30), the second opening (30) having an area (A2) that is larger than the area (A1) of the first opening (10); forming trenches (11, 21, 31) in the substrate (5) located at the first opening (10), the second opening (30), and at the channel (20) under masking of the masking layer (40) by means of anisotropic dry etching, and sealing off the trench (21) located at the channel (20) for forming the openings in the substrate (5). The method of the invention enables formation of a deeper first opening (10) than what is possible with the known methods.Type: GrantFiled: December 10, 2007Date of Patent: April 19, 2011Assignee: NXP B.V.Inventors: Viet Nguyen Hoang, Martinus T. Bennebroek
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Patent number: 7928517Abstract: An RF field effect transistor has a gate electrode, and comb shaped drain and source electrodes, fingers of the comb shaped drain being arranged to be interleaved with fingers of the source electrode, the source and drain electrodes having multiple layers (110,120,130,140). An amount of the interleaving is different in each layer, to enable optimization, particularly for low parasitic capacitance without losing all the advantage of low current density provided by the multiple layers. The interleaving is reduced for layers further from the gate electrode by having shorter fingers. The reduction in interleaving can be optimized for minimum capacitance, by a steeper reduction in interleaving, or for minimum lateral current densities in source and drain fingers, by a more gradual reduction in interleaving. This can enable operation at higher temperatures or at higher input bias currents, while still meeting the requirements of electro-migration rules.Type: GrantFiled: June 22, 2005Date of Patent: April 19, 2011Assignee: NXP B.V.Inventor: Lukas Frederik Tiemeijer
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Patent number: 7929456Abstract: A circuit (3) for a communication device (1), which communication device (1) comprises a transmission coil (2) that is provided for communicating with a further device (1?), comprises a transmitter (4), which transmitter (4) is designed to receive transmission data (TD) and to cooperate with the transmission coil (2) and to release to the transmission coil (2) a transmission data signal (TDS) that represents the transmission data (TD), and further comprises a receiver (5), which receiver is designed to cooperate with the transmission coil (2) and to receive from the transmission coil (2) a reception data signal (RDS) and to provide reception data (RD) that represent the reception data signal (RDS), and further comprises a control stage (7), which control stage (7) is designed to control the transmitter (4) for releasing the transmission data signal (TDS) simultaneous to the receiving of the reception data signal (RDS) by means of the receiver (5).Type: GrantFiled: April 25, 2006Date of Patent: April 19, 2011Assignee: NXP B.V.Inventor: Klemens Breitfuss
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Patent number: 7928882Abstract: An integrated circuit comprises a plurality of sensing circuits (12), each for detecting whether a respective physical operating parameter is above or below a respective reference value. The integrated circuit contains a serial shift register (11) for shifting digital data signals that represent the respective reference values from a successive approximation update circuit (14) to the sensing circuits (12) and back to the successive approximation update circuit (14). Detection results of the sensing circuits (12) are shifted to the successive approximation update circuit (14) with the digital data signals. The successive approximation update circuit (14) is used to form the digital data so that the reference values form successive approximations of the physical operating parameter values during an analog to digital conversion process. In this way the successive approximation update circuit (14) is shared by a plurality of sensing circuits (12).Type: GrantFiled: November 7, 2005Date of Patent: April 19, 2011Assignee: NXP B.V.Inventors: Hendricus J M Veendrick, Marcel Pelgrom, Violeta Petrescu