Abstract: A method of forming a metal-insulator-metal capacitor having top and bottom plates separated by a dielectric layer, one of the top and bottom plates having at least one protrusion extending into a corresponding cavity in the other of the top and bottom plates, the method including the steps of growing one or more nanofibers on a base surface.

Abstract: A DC-DC converter for driving one or more LED (38), which converter comprises an integrated circuit (12) having a switch mode power circuit (24) and a 5 temperature sensing circuit (40) for providing an output indicating a temperature of said integrated circuit (12), the arrangement being such that, in use, said integrated circuit consumes power, some of which power is dissipated in said integrated circuit as heat causing a rise in said internal temperature, and wherein a change in said output from said temperature sensing circuit (40) is used by said integrated circuit to 10 adjust said consumed power whereby said internal temperature may be controlled

Abstract: A transceiver comprising a transmit pin configured to receive a signal from a microcontroller, a receive pin configured to transmit a signal to a microcontroller and a bus pin configured to transmit and receive signalling to/from a network.

Abstract: A method of designing a power switch block (200) for an integrated circuit layout in a predefined integrated circuit technology is disclosed. The power switch block (200) includes a segment (710) comprising a plurality of spaced parallel conductors (110, 120, 130, 140) each having a predefined height in said technology, a stack of a first power switch (115) of a first conductivity type and a pair of drivers (152; 154) for respectively driving the first power switch (115) and a second power switch (135), said drivers having predefined dimensions in said technology, and the second switch (135) of a second conductivity type.

Abstract: A field effect transistor semiconductor device configuration is described, which is particularly suitable for use in DC: DC converters associated with logic circuitry. The device includes a first gate electrode (18) which extends adjacent to its channel-accommodating region (14) and a second, dummy gate electrode (30) which extends adjacent to the drain drift region (12). The second gate electrode is electrically connected to the first gate electrode and serves to reduce the on-resistance of the device and improve its reliability by reducing hot carrier degradation.

Abstract: The present invention relates to a phase change memory device comprising a plurality of phase change memory cells, each cell comprising a phase change material (50) conductively coupled between a first electrode (44) and a second electrode (42) for applying a reset current pulse having a predefined polarity to the phase change material in a programming cycle of the phase change memory device; and a controller (70) coupled to the first electrode and the second electrode for reversing the polarity of the reset current pulse to be applied in a next number of programming cycles to the corresponding cell after the application of a first number of programming cycles to the corresponding cell. The present invention further relates to a method for controlling such a memory device.

Abstract: A FinFET and methods for its manufacture are provided. The method of the invention provides an elegant process for manufacturing FinFETs with separated gates. It is compatible with a wide range of dielectric materials and gate electrode materials, providing that the gate electrode material(s) can be deposited conformally. Provision of at least one upstanding structure (or “dummy fin”) (40) on each side of the fin (4) serves to locally increase the thickness of the gate electrode material layer (70). In particular, as the shortest distance between each upstanding structure (40) and the respective side of the fin (4) is arranged in accordance with the invention to be less than twice the thickness of the conformal layer, the thickness of the gate electrode material layer (70) all the way across this distance between each upstanding structure (40) and the fin (4) is increased relative to that over planar regions of the substrate (2).

Abstract: A radio frequency power amplifier has first and second amplifier stages coupled in series, one of which is operated in class F and the other is operated in inverse class F; an envelope detector adapted to detect an envelope of the input signal; a power supply coupled to supply an electrical supply voltage to the first and second amplifier stages, wherein the electrical supply voltage is controlled to follow the envelope of the input signal. Such amplifier makes it possible to maintain class F and inverse class F operation, respectively, of the first and second amplifier stages independent on the input signal. Preferably, this is done by controlling the electrical supply voltage so that the saturation levels of the first and second amplifier stages follow the envelope of the input signal.

Abstract: The invention relates to a filter device (341, 342) for detecting and/or removing erroneous components like noise, deformations, glitch components or other errors in and/or from a signal, to a demodulation device using the filter device, to an information transmission system using the demodulation device and to a method for detecting a noise impulse in an input signal (C?(t), C?[k]). The filter device includes a summing element (510-51N, 610) connected to a correction element (540, 640). The summing element (510-51N, 610) sums the input signal (C?(t), C?[k]) within a reference interval (N) and the correction element (540, 640) verifies the summed input signal (IS[k]) with at least one signal condition (0, N+1, ?C?[k]). Finally, the correction element (540, 640) outputs a predetermined signal (C??[k]) based on the result of the verification between the summed input signal (IS[k]) with at least one signal condition (0, N+1, ?C?[k]). The foregoing filter device is able to remove noise from an input signal.

Abstract: It is an object of the invention to provide a memory architecture that can handle data interleaving efficiently. This and other objects are achieved by the system according to the invention. The data handling system, is configured for receiving at an input a plurality of commands. The system comprises: a plurality of memory banks; a distributor connected to the input and having a plurality of distributor outputs. Each specific one of the plurality of memory banks (106) is connected to a specific one of the plurality of distributor outputs. The distributor comprises a permutator for designating for each specific command a specific distributor output. The distributor distributes the specific command to the specific designated distributor output. The permutator has a control input and the designating is reconfigurable under the control of reconfiguration data received at the control input.

Abstract: A computer architecture (100) and a method for adapting and executing (200) a computer program therefore, is provided. A value is computed by processing the instructions comprised in a basic block of the program in accordance with a first mathematical function (208). An instruction comprising an original address is modified, using a second mathematical function (214) taking the value as input, to comprise a modified address. In this manner, a fault attack during execution of the computer program will cause a disturbance of the control flow, thereby making such an attack unlikely to succeed.

Abstract: Reader (420) for determining the validity of a connection to a transponder (440), designed to measure a response time of a transponder (440) and to authenticate the transponder (440) in two separate steps. Transponder (440) for determining the validity of a connection to a reader (420), wherein the transponder (440) is designed to provide information for response time measurement to said reader (420) and to provide information for authentication to said reader (420) in two separate steps, wherein at least a part of data used for the authentication is included in a communication message transmitted between the reader (420) and the transponder (440) during the measuring of the response time.

Abstract: An LDMOS transistor (100) on a substrate (70a, 70b) of a first conductivity type, comprises a source region (10) with a source portion (73) and a drain region (12). The source portion and drain region are of a second conductivity type opposite to the first conductivity type and are mutually connected through a channel region (28) in the substrate over which a gate electrode (14) extends. The drain region comprises a drain contact region (16) and a drain extension region (15) which extends from the channel region (28) towards the drain contact region. The drain contact region is electrically connected to a top metal layer (22) by a drain contact (20), and a poly-Si drain contact layer (80) is arranged as a first contact material in between the drain contact region and the drain contact in a contact opening (51) of a first dielectric layer (52) deposited on the surface of the drain region.

Abstract: The invention relates to a sensor (100) for determining humidity, the sensor comprising a system (10) of layers arranged superpositioned on each other. For rendering a sensor (10) available which allows of the measuring of integral variables necessary for determining the humidity, the invention proposes that the system (10) comprises a diffusion barrier (11) in the form of a water-permeable layer and a storage layer in the form of a water-absorbing and irreversibly water-binding layer, where the diffusion barrier (11) and the storage layer (12) are in direct contact with each other and the diffusion barrier (11) has a temperature-dependent permeability (16).

Abstract: A data processing system comprises a memory, a memory protection unit, and one or more IP units connected to the memory via the memory protection unit. The memory protection unit is arranged to logically partition the memory into different regions, to maintain a policy for each region, the policy defining access rights to the respective region and defining the safety status of data written in the respective region, to check access requests writing data from a first region to a second region, and to refuse the access request if the safety status, according to the respective policy, of the written data in the second region is not maintained.

Abstract: A method of recording a video telephony call, the method comprising: setting up a call between a first terminal (110) and a second terminal (120); sending a recording consent request (140) from the first terminal to the second terminal; receiving a recording consent response (150) at the first terminal from the second terminal; and recording outgoing and incoming audio and video data frames from the first terminal.

Abstract: An input device for an electronic device is disclosed comprising a source of light (2) emitting a light beam in a first direction, a reflecting member (4) for reflecting said light beam, means for allowing tilting of the reflecting member (4) around at least one axis transverse to said first direction, at least one detector (6,7,8,9) detecting the reflected light beam and outputting an electric signal corresponding to light intensity of the detected light beam in a second direction, in which the light beam is reflected, and an electronic circuit deriving a position signal from the at least one electric signal. Said means for allowing tilting of the reflecting member (4) comprise a first bearing (12) having at least one convex surface and at least one concave surface cooperating with each other in a sliding relationship thus enabling said tilting of said reflecting member (4).

Abstract: Electronic device comprising an integrated circuit (1) embedded into a substrate, wherein the substrate has at least a first (3) and a second (9) conductive structure arranged on opposite sides of the integrated circuit (1) and the electrical connections (10,11,12,13) between the first (3) and the second (9) conductive structure and/or with the integrated circuit 5 (1) are established by means of holes (8) in the substrate.

Abstract: A method of fabricating a trench capacitor, and a trench capacitor fabricated thereby, are disclosed. The method involves the use of a vacuum impregnation process for a sol-gel film, to facilitate effective deposition of high-permittivity materials within a trench in a semiconductor substrate, to provide a trench capacitor having a high capacitance whilst being efficient in utilisation of semiconductor real estate.

Abstract: To enable a method and a base chip (200) for monitoring, by means of at least one base chip (200), the operation of at least one microcontroller unit (300) that is intended for at least one application and is associated with a system (100) to be further developed in such a way a reset of the microcontroller unit (300) only takes place under defined conditions, it is proposed that a reset (R) of the microcontroller unit (300) is caused if at least one special sequence, and particularly at least one drive or access sequence assigned to the reset operation (R), is applied to the base chip (200).