Patents Assigned to NXP
  • Publication number: 20110025128
    Abstract: A method and system for power management is provided. To control power supplied to a second electronic device (106), an electronic system (100) comprises a power management subsystem (110), a first electronic device (102); The power management subsystem (110) monitors the power consumed by the first electronic device (102) to control the power supplied to the second electronic device (106). A method for power management of a second electronic device (106) is provided. A power management subsystem (110) is provided.
    Type: Application
    Filed: April 9, 2009
    Publication date: February 3, 2011
    Applicant: NXP B.V.
    Inventors: Artur Tadeusz Burchard, Kees Gerard Willem Goossens, Aleksandar Milutinovic, Anca Mariana Molnos, Elisabeth Francisca Maria Steffens
  • Publication number: 20110026580
    Abstract: A driver for driving an LED uses PWM in a sequence of the periods. The driver has a modulo counter, that is reset after each period. The driver has a first adder for combining the count value with a quantity indicative of a shift of the LED's control pulse relative to the start of the period; a second adder for combining the count value with a width quantity indicative of a width of the control pulse; and a logic gate receiving the MSBs at the outputs of the adders and supplying the control pulse.
    Type: Application
    Filed: April 14, 2009
    Publication date: February 3, 2011
    Applicant: NXP B.V.
    Inventors: Peter Hubertus Franciscus Deurenberg, Joannes Wilhemus Gertrudis Marie Jacobs
  • Publication number: 20110029803
    Abstract: A method and a receiver for recovering clock timing information from a serial data signal by determining data symbol transition times. The method comprises determining data symbol transition times of the serial data according to a first determination scheme, and further data symbol transition times of the serial data according to a second determination scheme. The transition times are then combined by a voting process, wherein the first determination scheme votes for the transition times that it determined, and wherein the second determination scheme votes for the transition times that it determined. The actual transition times are then determined as being the times that have the most votes.
    Type: Application
    Filed: April 2, 2009
    Publication date: February 3, 2011
    Applicant: NXP B.V.
    Inventor: William Redman-White
  • Publication number: 20110027128
    Abstract: A sensor chip (100) for detecting particles, the sensor chip (100) comprising a substrate (102), an electric connection structure (104) arranged in a surface portion of the substrate (102) and adapted for an electric connection to an electric connection element (106), a sensor active region (108) arranged in another surface portion of the substrate (102) and being sensitive to the presence of the particles to be detected, and a continuous dielectric layer (110) covering the substrate (102) including covering the electric connection structure (104) and the sensor active region (108).
    Type: Application
    Filed: March 19, 2009
    Publication date: February 3, 2011
    Applicant: NXP B.V.
    Inventors: Evelyne Gridelet, Franciscus Widdershoven, Pablo Garcia Tello, Magali Lambert
  • Publication number: 20110025661
    Abstract: A light sensor arrangement is used to detect ambient light conditions. According to an example embodiment, a light detector arrangement (e.g., 110) generates an output in response to light incident thereupon. An averaging-type circuit (e.g., 160) samples the generated output for overlapping time intervals, and combines the sampled output to form a new output that characterizes the incident light. The overlapping time intervals 5 (e.g., 221-261) are chosen such that the new output is generally flicker-free for incident light generated using one of at least two different power supply frequencies.
    Type: Application
    Filed: March 20, 2009
    Publication date: February 3, 2011
    Applicant: NXP B.V.
    Inventors: Rob Van Dalen, Sergio Masferrer Oncala
  • Publication number: 20110025382
    Abstract: A frequency divider (200; 300; 400) configured to receive a plurality of oscillating signals (202; 302; 402) and generate output signalling (204; 310; 410). The frequency divider comprises an enable signalling generator (206) configured to process the plurality of oscillating signals (202; 302; 402) and generate enable signalling (210; 314) representative of which of the oscillating signals (202; 302; 402) is to be used to derive the output signalling (204; 310; 410). The frequency divider also comprises an output signal selector (208; 308; 408) configured to process one or more of the oscillating signals (202; 302; 402) and the enable signalling (210; 314) such that an oscillating signal (202; 302; 402) is provided as the output signalling (204; 310; 410) of the frequency divider in accordance with the enable signalling (210; 314).
    Type: Application
    Filed: July 26, 2010
    Publication date: February 3, 2011
    Applicant: NXP B.V.
    Inventors: Arnoud van der Wel, Gerrit Willem den Besten, Erwin Janssen
  • Patent number: 7880536
    Abstract: Circuits, methods and devices for providing low-pass filtering are implemented according to a number of different embodiments. In one such embodiment a Sallen-Key low-pass filter circuit is implemented that comprises a first resistor and a second resistor connected in series, the first resistor being connected between the second resistor and an input of the circuit. The second resistor is directly connected between the first resistor and an output of the circuit.
    Type: Grant
    Filed: June 20, 2005
    Date of Patent: February 1, 2011
    Assignee: NXP B.V.
    Inventors: Nguyen-Trieu-Luan Le, David Le Deaut
  • Patent number: 7880587
    Abstract: In a receiving method for the contactless reception of identification information (I1,12), which is stored in a data carrier (3, 3?) and which can be received from the data carrier (3, 3) in a contactless manner in the form of information units (IU, IU?) with a communication device (2), it is envisaged that firstly an information unit (R.IU) is received and that secondly it is detected that the received information unit (R.IU) represents a collision of two different information units (IU, IU?) occurring essentially simultaneously, of which two different information units (IU, IU?) the one information unit (IU) originates from a first data carrier (3) and the other information unit (IU?) originates from a second data carrier (3?), and that thirdly a received information unit (R.IU) that represents a collision is replaced with a first replacement information unit (R.IU1) established by the communication device (2), which is used instead of the information unit (R.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: February 1, 2011
    Assignee: NXP B.V.
    Inventors: Franz Amtmann, Roland Brandl, Christian Scherabon, Hubert Watzinger
  • Patent number: 7881367
    Abstract: The present invention relates to method of coding blocks of video data for a handheld apparatus comprising a battery. Said method comprising a step of computing a residual error block from the use of a set of prediction functions having different power consumption levels. It also comprises a step of enabling or disabling a prediction function of the set depending on its associated power consumption level for a predetermined level of the battery. It finally comprises a step of selecting a prediction function among a set of enabled prediction functions to code the residual error block.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: February 1, 2011
    Assignee: NXP B.V.
    Inventor: Joël Jung
  • Patent number: 7880704
    Abstract: Method of driving a liquid crystal display by supplying selectable column voltages Gj(t) from a predetermined number of column voltages levels, selection signals to groups of mutually orthogonal p rows (p?1) for the duration of a row selection time p×nfrc during a supcrframe nfrc to generate grey scales. The column voltage is calculated depending on the grey scales of the p pixels in a column and on the mutually orthogonal selection signals Fi for the corresponding group of rows. The row selection time is subdivided in npwm sub selection time. The grey scales are coded in grey scale tables having nfrc phases with npwm. The superframes grey scales are generated using phase mixing. The change in the column voltage level defines a transition. The column voltage has always less transitions per row selection time than the number npwm of sub selection time of the row selection time.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: February 1, 2011
    Assignee: NXP B.V.
    Inventors: Christopher Rodd Speirs, Martin Lienhard
  • Patent number: 7881694
    Abstract: A wireless device (110) is provided for supporting extended battery life. A transceiver (132) is configured to receive and transmit data over a wireless link. A frame detection sensor (140) is coupled to the transceiver and configured to sense an incoming frame and generate an incoming frame sensor signal. A controller (142) is coupled to the frame detection sensor and transceiver, and configured to selectively deactivate a portion of the transceiver device based at least in part on the frame sensor signal. Advantages of the invention include the ability to extend battery life in mobile wireless devices.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: February 1, 2011
    Assignee: NXP B.V.
    Inventor: Olaf Hirsch
  • Publication number: 20110018712
    Abstract: In an object finding method for finding an object (20) provided with a contactless readable data carrier (2), descriptive data (INF) stored in the data carrier (2) are transmitted to a reading device (1) when the data carrier (2) comes into the effective area of the reading device (1). In the reading device (1) the descriptive data (INF) received from the data carrier (2) are compared with predefined profile data (PRO) in respect of the fulfillment of at least one comparison condition. Upon fulfillment of the comparison condition the reading device (1) subsequently issues a notification (TRIG).
    Type: Application
    Filed: July 26, 2010
    Publication date: January 27, 2011
    Applicant: NXP B.V.
    Inventor: Dirk Luetzelberger
  • Publication number: 20110018097
    Abstract: Disclosed is an integrated circuit (IC) comprising a substrate (10) including a plurality of circuit elements and a metallization stack (20) covering said substrate for providing interconnections between the circuit elements, wherein the top metallization layer of said stack carries a plurality of metal portions (30) embedded in an exposed porous material (40) for retaining a liquid, said porous material laterally separating said plurality of metal portions. An electronic device comprising such an IC and a method of manufacturing such an IC are also disclosed.
    Type: Application
    Filed: July 26, 2010
    Publication date: January 27, 2011
    Applicant: NXP B.V.
    Inventors: Youri Ponomarev, Aurelie Humbert, Roel Daamen
  • Publication number: 20110019866
    Abstract: A membrane for an electroacoustic transducer is disclosed having a first area, a second area, which is arranged for translatory movement in relation to said first area, and a third area, which connects said first area and said second area, wherein local, planar spring constants along a closed line within said third area encompassing said second area, are determined in such a way that local, translatory spring constants along said line in a direction of said translatory movement are substantially constant or exclusively have substantially flat, mutual changes.
    Type: Application
    Filed: September 23, 2010
    Publication date: January 27, 2011
    Applicant: NXP B.V.
    Inventors: Susanne WINDISCHBERGER, Helmut WASINGER, Josef LUTZ
  • Publication number: 20110018550
    Abstract: An integrated circuit (100) is disclosed comprising a test arrangement (110, 450) for testing a signal path (150) comprising a capacitive load (152), said test arrangement being arranged to, in a test mode, implement a method in accordance with the present invention by transferring a charge stored in the test arrangement (110, 450) to the capacitive load (152), and by deriving a test result from a voltage formed across the capacitive load (152) by said transferred charge.
    Type: Application
    Filed: March 19, 2009
    Publication date: January 27, 2011
    Applicant: NXP B.V.
    Inventors: Franciscus Geradus Maria De Jong, Alexander Sebastian Biewenga, A. Van Der Lugt, Johannes Arnthonie Josephus Van Geloven, Pieter Modderkolk
  • Publication number: 20110022926
    Abstract: A memory efficient, accelerated implementation architecture for BCJR based forward error correction algorithms. In this architecture, a memory efficiency storage scheme is adopted for the metrics and channel information to achieve high processing speed with a low memory requirement. Thus, BCJR based algorithms can be accelerated, and the implementation complexity can be 5 reduced. This scheme can be used in the BCJR based turbo decoder and LDPC decoder implementations.
    Type: Application
    Filed: March 27, 2009
    Publication date: January 27, 2011
    Applicant: NXP B.V.
    Inventors: Jianho Hu, Feng Li, Hong Wen
  • Publication number: 20110018065
    Abstract: A method of manufacturing a semiconductor device is disclosed comprising providing an insulating carrier (10) such as an oxide wafer; providing a channel structure (20) between a source structure (12) and a drain structure (14) on said carrier (10); selectively removing a part of the channel structure (20), thereby forming a recess (22) between the channel structure (20) and the carrier (10); exposing the device to an annealing step such that the channel structure (20?) obtains a substantially cylindrical shape; forming a confinement layer (40) surrounding the substantially cylindrical channel structure (20?); growing an oxide layer (50) surrounding the confinement layer (40); and forming a gate structure (60) surrounding the oxide layer (50). The substantially cylindrical channel structure 20? may comprise the semiconductor layer 30. A corresponding semiconductor device is also disclosed.
    Type: Application
    Filed: February 17, 2009
    Publication date: January 27, 2011
    Applicant: NXP B.V.
    Inventors: Gilberto Curatola, Prabhat Agarwal, Mark J. H. Van Dal, Vijayaraghavan Madakasira
  • Publication number: 20110022776
    Abstract: Among other subject matter, storage architectures are provided that store data reliably in connection with a system. The storage architecture (14) includes a first data reliability facility (32), and a second data reliability facility (34), where the second data reliability facility (34) is encoded compliant with the first data reliability facility (32). The storage architecture (14) of this example embodiment also includes a first storage medium (20), the first storage medium (20) storing the second data reliability facility (34).
    Type: Application
    Filed: March 20, 2007
    Publication date: January 27, 2011
    Applicant: NXP B.V.
    Inventors: Andries Hekstra, Sebastian Egner, Ludo Tolhuizen
  • Publication number: 20110018585
    Abstract: A variety of edge-detection related devices, methods and systems are implemented in various fashions. One implementation is directed to an edge detector circuit (100) for detecting an edge of an input signal and producing an output level-sensitive signal that is synchronous to a clock signal having an active edge corresponding to a transition from a first-signal level to a second-signal level. A first flip-flop (102) has the input signal as a clock input and produces an internal level-sensitive signal and is reset by the output level-sensitive signal. Logic passes (104) the level-sensitive signal when the clock signal is at the second-signal level and blocks the internal level-sensitive signal when the clock signal is at the first-signal level. A second flip-flop (106) is set by the passed internal level-sensitive signal to produce the output level-sensitive signal. The second flip-flop (106) is cleared in response to the output level-sensitive signal, a reset input and the clock signal.
    Type: Application
    Filed: March 16, 2009
    Publication date: January 27, 2011
    Applicant: NXP B.V.
    Inventor: Robert de Gruijl
  • Publication number: 20110018768
    Abstract: It is described an open-loop transmit coil diversity scheme, intended for communication based on magnetic induction, wherein the diversity scheme automatically aligns the transmit coil (110) of a transmitter (100) with the receive coil of a receiver without relying on feedback information from the receiver to the transmitter (100). This may be achieved by having a plurality of coils (110, 120, 130) in the transmitter (100) and/or in the receiver. Each of these coils (110, 120, 130) may be oriented orthogonally with respect to the other coil(s). The optimal coil (130) may be selected by measuring the position angle of the transmitter (100) and/or the receiver by making use of at least one inclinometer (132). For radio communication on the transmitter and/or on the receiver this coil (130) is selected, whose orientation is maximally parallel with the orientation of the corresponding coil on the other side of the radio communication link.
    Type: Application
    Filed: July 22, 2010
    Publication date: January 27, 2011
    Applicant: NXP B.V.
    Inventor: Steven Mark Thoen