Abstract: According to an example embodiment, there is an integrated circuit arrangement with at least one application circuit to be tested, and with at least one self-test circuit for testing the application circuit and generating at least one pseudo-random test sample. wherein said The pseudo-random test sample is converted into at least one test vector that is programmable and/or deterministic and is supplied to the application circuit for testing purposes via at least one logic gate and at least one signal that is applied to said logic gate. The output signal arising in dependence on the deterministic test vector is evaluated by the application circuit by at least one signature register.

Abstract: A membrane (2?) for an electroacoustic transducer (1) is disclosed having a first area (A1), a second area (A2), which is arranged for translatory movement in relation to said first area (A1), and a third area (A3), which connects said first (A1) and said second area (A2), wherein local, planar spring constants (psc) along a closed line (L) within said third area (A3) encompassing said second area (A2), are determined in such a way that local, translatory spring constants (tsc) along said line (L) in a direction (DM) of said translatory movement are substantially constant or exclusively have substantially flat, mutual changes.

Abstract: The present invention relates to emphasizing and de-emphasizing of an analog data signal. Using a main analog driver a data signal indicative of bit values of binary data is converted into a first analog data signal. A second data signal is determined by delaying the data signal a predetermined time interval and inverting the delayed data signal. Using a de-emphasis driver, the second data signal are converted into a second analog data signal, wherein the second analog data signal is additive to the first analog data signal if the data signal and the second data signal are indicative of a same bit value, and wherein the second analog data signal is subtractive to the first analog data signal if the data signal and the second data signal are indicative of an opposite bit value. The first analog data signal is emphasized or de-emphasized by superposing the first analog data signal and the second analog data signal.

Abstract: An arrangement for pulse-width modulating an analog or digital input signal is provided. The non-linear distortion generated in the pulse-width modulator is precompensated by applying a signal with reversed error to the pulse-width modulator. The signal with reversed error is generated by a further pulse-width modulator that receives the input signal and whose output signal is subtracted from twice the input signal. The arrangement may e.g. be used to drive class D audio amplifiers.

Abstract: The invention relates to a semiconductor device (10) with a substrate (11) and a semiconductor body (12) comprising a vertical bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type and the first conductivity type, wherein the collector region (3) comprises a first sub-region (3A) bordering the base region (2) and a second sub-region (3B) bordering the first sub-region (3A) which has a lower doping concentration than the second sub-region (3B), and the transistor is provided with a gate electrode (5) which laterally borders the first sub-region (3A) and by means of which the first sub-region (3A) may be depleted.

Abstract: A system, method and structures employing proportional variable resistors suitable for electrically measuring unidirectional misalignment of stitched masks in etched interconnect layers. In an example embodiment, there is a structure (10, 20) that comprises at least one proportional variable resistor (24) suitable for electrically measuring unidirectional misalignment of stitched masks in etched interconnect layers. The structure (10,20) comprises at least a first mask (10) and a second mask (20) that when superimposed comprise at least two test pads (14, 16) and interconnects (12, 22) the resistance between (24) which can be measured.

Abstract: The present invention provides an electronic circuit for measuring of an output power of a RF power amplifier. The electronic circuit comprises a current sensing transistor for sensing the RF current of the power amplifier and a voltage sensing module for sensing the voltage of the RF power amplifier. The electronic circuit further comprises a coherent detector for multiplying the sensed current and the sensed voltage in the time domain. In this way a signal is generated that is directly indicative of the power provided by the power amplifier irrespective of its actual load. Preferably, the coherent detector is implemented as a Gilbert quad and provides a differential output that effectively allows for DC offset compensation.

Abstract: A testing circuit has a shift register circuit (76) for storing instruction data for the testing of an integrated circuit core. Each stage of the shift register circuit comprises a first shift register storage element (32) for storing a signal received from a serial input (wsi) and providing it to a serial output (wso) in a scan chain mode of operation, and a second parallel register storage element (38) for storing a signal from the first shift register storage element and providing it to a parallel output in an update mode of operation. The testing circuit further comprises a multiplexer (70) for routing either a serial test input to the serial input (wsi) of the shift register circuit or an additional input (wpi[n]) into the serial input of the shift register circuit (76).

Abstract: A fast Fourier transformation is performed on a first vector of signals, and as a result a second vector of signals is provided. A feed forward equalization is performed by multiplying each of the components of said second vector with equalization parameters, and as a result a third vector of signals is provided. An inverse fast Fourier transformation is performed on said third vector, and as a result a fourth vector of signals is provided. An output signal of said first section is provided on the basis of said fourth vector of signals. In a second section a signal derived from an output signal of said second section is is filtered via linear feedback filtering and the filtered signal is added to said first section output signal, and an added signal is provided, and said second section output signal is generated by extracting samples from said added signal.

Abstract: A payment method (BV) executed by a communication facility (1, 2, 8, N) and at least one data carrier (11, 12, K) for debiting a payment value unit (BW) from the data carrier (11, 12, K), in order to pay for a performed service, wherein the following steps are executed: debit from a memory value unit (SW) stored in the data carrier (11, 12, K), of a debit value unit (AW) sufficient for payment for the maximum service to be performed, wherein a repayment limit (RL) stored in the data carrier (11, 12, K) is set to the value in essence of the debited debit value unit (AW); calculation of a credit value unit (AWE) to be credited back, wherein the payment value unit (BW) to be paid for the actually performed service is subtracted from the debited debit value unit (AWE); check by the data carrier (11, 12, K), that the credit value unit (AWE) to be credited does not exceed the stored repayment limit (RL), wherein only in this case is the credit value unit (AWE) credited to the memory value unit (SW) stored in the

Abstract: In order to improve the efficiency of a Power Factor Convertor (PFC) first stage to a AC-DC converter the switching cell is split into two smaller ones (each comprising a switched inductor with an output diode). Below a certain load only one cell is active. The second cell only becomes active, out of phase with the first, but not generally in antiphase, after a predefined load level is surpassed in such a way that above that level the first cell has a fixed on time and the second cell a variable one.

Abstract: A color image is enhanced in the following fashion. A saturation detector (SDT) detects a degree of color saturation (LC, CC) that occurs in an image area (SP). A filter arrangement (DE1, DE2, DE3) filters at least one spatial detail in the image area to a degree that depends on the degree of color saturation. This allows an improvement of perceptual quality of color images.

Abstract: The present invention relates to a headset device, an audio device and methods of receiving a radio signal via the headset device, wherein the headset device comprises at least one first conductor for supplying an audio signal to a respective ear-piece, a second conductor arranged in a loop configuration for providing a magnetic antenna, and a connector (50) having at least one respective first connecting portion (3, 4) for providing a connection to the at least one first conductor (140), a second connecting portion (1) for providing a connection to a first end of the second conductor (70), and a third connecting portion (2) for providing a connection to a second end of the second conductor (70), wherein an output of the magnetic antenna is provided between the second and third connecting portions (1, 2). At the audio device, an impedance transformer (10) is coupled to the second and third connecting portions at its primary side and to an amplifier (20) at its secondary side.

Abstract: A method of operating a resonant power converter(1, 2), having a high side switch(3) and a low side switch(4), is disclosed in which the switching is controlled to allow for improved operation at low power levels. The method involved an interruption to the part of the switching cycle in which the low side switch (4) is normally closed, by opening the switch at a particular moment in the cycle which allows the energy to be store in the resonance capacitor (5). Since, as a result, the energy is largely not resonating but stored in a single component, the time quantisation of the mode of operation is significantly reduced or eliminated.

Abstract: A proximity sensor arrangement is provided comprising at least one first and at least one second acoustic transducer and at least one comparing means. The acoustic transducers are adapted to receive acoustic signals and convert the received acoustic signals into electric signals. The comparing means are adapted to compare the spectra received by the acoustic transducers. If the device comprising the proximity sensor arrangement is held at a user's ear, the signal received by the covered microphone is low-pass filtered due to human tissue and/or the presence of the human head, resulting in a spectral difference between several microphones. Furthermore a method is provided comprising the steps of receiving an acoustic signal at least two locations distant from each other. In a second step, said received acoustic signals are converted into electric signals. Subsequently, the actual proximity and/or coverage situation is deduced from the spectral difference between the electric signals.

Abstract: A method of synchronizing a receiver to a received orthogonal frequency division multiplexing (OFDM) signal. The receiver includes a carrier frequency offset synchronizer having a carrier frequency offset detector, a frequency-locked loop having a controller. A transmitted signal having a carrier frequency is received by the receiver. A carrier frequency offset is estimated by comparing the carrier frequency of the transmitted signal and a reference frequency of a locally generated signal of the receiver. A plurality of parameters of the frequency-locked loop is determined to adjust the reference frequency to reduce the carrier frequency offset. Accordingly, the frequency-locked loop achieves frequency tracking of the OFDM signal.

Abstract: The present invention describes an ultra High-Density Capacitor design, integrated in a semiconductor substrate, preferably a Si substrate, by using both wafer sides. The capacitors are pillar-shaped and comprise electrodes (930,950) separated by a dielectric layer (940). Via connections (920) are provided in trenches that go through the whole thickness of the wafer.

Abstract: A method of operating a multi-stream reception scheme, such as DOCSIS (Data Over Cable Service Interface Specifications), comprising at least two receivers (10, 12, 14) having respective voltage controlled oscillators (16), the method including monitoring a change in local oscillator frequency in a selected one of the at least two streams and, if the frequency distance between the local oscillator frequencies is below a value likely to cause pulling or coupling between the voltage controlled oscillators of the at least two receivers, resetting the frequency planning of the selected one of the at least two streams to maximise the frequency distance of the voltage controlled oscillator of the selected stream with the voltage controlled oscillators of the or the other streams.

Abstract: An apparatus and method for supporting PCI Express is disclosed. A physical layer has a PCI Express interface for receiving data from a PCI Express compatible communication medium. The data is in the form of a packet. A data link layer (502) is disclosed for verifying a CRC value (506) and a sequence number (508) received within the packet. A transaction layer (504) is disclosed for receiving the packet from the data link layer and for processing thereof. The transaction layer (504) processes (512) at least some of the packet data in parallel to the data link layer (502).

Abstract: A method comprising receiving tasks for execution on at least one processor, and processing at least one task within one processor. To decrease the turn-around time of task processing, a method comprises parallel to processing the at least one task, verifying readiness of at least one next task assuming the currently processed task is finished, preparing a readystructure for the at least one task verified as ready, and starting the at least one task verified as ready using the ready-structure after the currently processed task is finished.