Abstract: A receiver apparatus (1) for receiving a signal over a fading channel comprises a frequency domain interpolation unit (16) with a filter unit (10), a power comparison unit (20), and a processing unit (21). The filter unit (10) comprises a first filter element (11), which is a reference filter, and a second filter element (12). The first filter element (11) is arranged as large-band filter. The power comparison unit (20) compares the power of the signal filtered with said second filter element (12) with the power of the signal filtered with said first filter element (11). The processing unit (21) determines an appropriate filter length for a third filter element (13) of the filter unit (10) on the basis of this comparison. Thereby, a trade-off is made between an additional power received due to a long echo and an additional Gaussian noise power.

Abstract: A method to discriminate a real echo peak from an aliased echo peak comprises: computing ‘a correlation between N samples of a digital data and a copy of the same N samples delayed by a time delay ?1,0 to obtain a first correlation result, time delay ?1,0 being equal to a time interval T between a first and a second distinct power peaks of an estimated channel impulse response, the first peak being the highest power peak within the temporal window, and/or computing—a correlation between the N samples and a copy of the same N samples delayed by a time delay TIFFT-?1,0 to obtain a second correlation result, and deciding whether the second peak is a real echo peak or an aliased echo peak based on the first and/or second correlation results.

Abstract: Power supplies are switched in a manner that mitigates parasitic shorts. According to an example, a control circuit (e.g., 310) operates primary and backup power supplies using the higher of the primary and backup supply voltages, for switching between the power supplies.

Abstract: A device for receiving a RF signal (1; 21) with loop-through output (16) is provided. The device comprises: an input (3) receiving a RF input signal (2); an analog-digital converter (8) converting the RF input signal (2) to a digital signal (9); a digital signal processing unit (10) digitally processing the digital signal (9); a digital-analog converter (14) converting the processed digital signal (13) to a loop-through RF signal (15) corresponding to the RF input signal (2); and a loop-through output (16) outputting the loop-through RF signal (15).

Abstract: A field transistor is divided into a number of cells (6) and includes a separate first gate line (20) connected to first transistor cells (8) and a separate second gate line (22) connected to second transistor cells (10). A drive circuit is used to drive all the cells (6) in a normal, saturated operations state but to drive only the second cells (10) in a linear operations state to reduce the number of cells used in the linear operations state.

Abstract: Reader (201) for determining the validity of a connection to a transponder (202) wherein the reader (201) is designed to measure a response time of a transponder (202) based on a time interval between sending a first binary code based on predefined numbers to said transponder (202) and receiving a second binary code from said transponder (202) in response to the first binary code and wherein the reader (201) is designed to authenticate the transponder (202) based on the received second binary code simultaneously with the measuring of the response time.

Abstract: Orthogonal frequency division multiplexing (OFDM) has become a popular transmission method for high speed wireless radio transmission, due to its potential for low complexity of transmitters and receivers. A method and apparatus are contemplated for cancelling additive sinusoidal disturbances of a known frequency in OFDM receivers which arise e.g. from clock signals that are present for frequency reference, mixer control, and A/D converter control, as well as harmonics and mixing products of those periodic signals, coupling into some point in the receiver chain and appearing as rotating complex exponentials superimposed to complex baseband receive signals. According to the inventive method and apparatus an estimation of an amplitude and phase of a disturbing superimposed tone with a known frequency is obtained and the amplitude and phase estimation is used to cancel the spurious tone preventing a degradation of receiver sensitivity while achieving low implementation complexity.

Abstract: An electronic clamp is provided for an integrated circuit having a first voltage island (1) to which an output signal (clamp out) of the clamp is applied and a second voltage island (2) operative to produce an input signal (clamp in) to the clamp, where power to the second voltage island can be switched off to save power. The clamp comprises a latch (22) which stores or retains the clamp value (0 or 1) of the input signal (clamp in) during a reset period and clamps the output signal (clamp out) to the stored or retained value in response to a clamp enable signal, (clamp in) in order to protect the first voltage island from a non-stabilised input signal.

Abstract: An electronic device (100), comprises a first electrode (101), a second electrode (102) and a convertible structure (103) connected between the first electrode (101) and the second electrode (102), which convertible structure (103) is convertible between at least two states by heating, wherein the convertible structure (103) has different electrical properties in different ones of the at least two states, wherein the convertible structure (103) is curved in a manner to increase a length of a path of an electric current propagating through the convertible structure (103) between the first electrode (101) and the second electrode (102).

Abstract: A memory apparatus has a main memory (10) that comprises a plurality of physical blocks of memory locations. The main memory (10), for example a flash memory, supports erasing of at least a physical block at a time. A chain of pointers (72, 75) that ultimately points to pointing information such as a logical address to physical address mapping table is stored in the main memory (10), each pointer (72, 75) being stored in a respective one of the blocks (70, 74), each non-final pointer (72) in the chain pointing to a respective block (74) that contains a next pointer in the chain. On start up of main memory (10) the pointing information is located by following said chain, using the pointers from the main memory. In normal operation direct pointers stored in a RAM are preferably used.

Abstract: The invention, which relates to a method for the generation of beacons by a base station in a wireless communications network, consisting of at least one base station and at least one station, the beacons being generated repeatedly at time intervals, is based on the object of specifying a method with which the generation of the beacons can be tailored to needs, achieving a reduction of the energy demand and the emissions, and an improvement in the security. According to the invention, the object is achieved in that the generation of the beacons is started with a switching on of the base station and is ended after the expiry of a wait time tw0 in the event that no station is connected to the base station, and in that the generation of the beacons is started by a receipt of a probe request from a station of the communications network and is ended after the expiry of a wait time tw1 in the event that no station is connected to the base station.

Abstract: In a power amplification circuit an output signal is generated by combining the power of a first and second signal that have been amplified separately. An input signal is received that indicates a desired amplitude and phase of the output signal. A controllable phase shift circuit adapts the phase of first and second signals dependent on the desired amplitude, so that, when the signals with the adapted phases are combined, the resulting output signal will have an envelope with the desired amplitude. A time dependent common mode phase shift is applied to both the first and second signal. A control circuit selects the time dependent common mode phase shift as a function of the desired amplitude of the output signal, to compensate for envelope amplitude dependence of a common phase shift introduced by the amplification.

Abstract: A circuit contains a shared memory (12), that is used by a plurality of processing elements (10) that contain cache circuits (102) for caching data from the shared memory (12). The processing elements perform a plurality of cooperating tasks, each task involving caching data from the shared memory (12) and sending cache message traffic. Consistency between cached data for different tasks is maintained by transmission of cache coherence requests via a communication network. Information from cache coherence requests generated for all of said tasks is buffered. One of the processing elements provides an indication signal indicating a current task stage of at least one of the processing elements. Additional cache message traffic is generated adapted dependent on the indication signal and the buffered information from the cache coherence requests. Thus conditions of cache traffic stress may be created to verify operability of the circuit, or cache message traffic may be delayed to avoid stress.

Abstract: The invention relates to a sensor, in particular for detecting attacks on at least one signal-carrying line (11), in particular of chip cards (1), said sensor having a circuit arrangement (10) which comprises a first circuit arrangement (13) for detecting an instantaneous voltage value above a first supply voltage and a second circuit arrangement (14) for detecting an instantaneous voltage value below a second supply voltage, wherein, when a voltage value outside the range between the first and second supply voltages is detected, a signal (19) is generated and can be taken as a basis for initiating a protective measure.

Abstract: A transistor device is formed of a continuous linear nanostructure having a source region, a drain region and a channel region between the source and drain regions. The source (20) and drain (26) regions are formed of nanowire ania the channel region (24) is in the form of a nanotube. An insulated gate (32) is provided adjacent to the channel region (24) for controlling conduction i ni the channel region between the source and drain regions.

Abstract: A method of manufacturing a FET gate with a plurality of materials includes depositing a dummy region 8, and then forming a plurality of metallic layers 16, 18, 20 on gate dielectric 6 by conformally depositing a layer of each metallic layer and then anisotropically etching back to leave the metallic layer on the sides 10 of the dummy region. The dummy region is then removed leaving the metallic layers 16,18, 20 as the gate over the gate dielectric 6.

Abstract: The invention relates to a semiconductor device (10) having a semiconductor body (2), comprising a field effect transistor, a first gate dielectric (6A) being formed on a first surface at the location of the channel region (5) and on it a first gate electrode (7), a sunken ion implantation (20) being executed from the first side of the semiconductor body (2) through and on both sides of the first gate electrode (7), which implantation results in a change of property of the silicon below the first gate electrode (7) compared to the silicon on both sides of the gate electrode 7) in a section of the channel region (5) remote from the first gate dielectric (6A), and on the second surface of the semiconductor body (2) a cavity (30) being provided therein by means of selective etching while use is made of the change of property of the silicon. A second gate (6B,8) is deposited in the cavity thus formed.

Abstract: The present invention relates to an electronic device for power efficient linear amplification. The electronic device includes an amplifier (RF-PA) for amplifying a phase modulated signal (PM). The amplifier (RF-PA) is adapted to be controlled by a first modulating signal (AM high) for modulating the amplitude of the phase modulated signal (PM) above a predetermined amplitude value. The electronic device is further adapted to attenuate an output signal of the amplifier (RF-PA) for providing amplitude modulation below the predetermined amplitude value.

Abstract: A semi-conductor device (100) comprises an exposed leadframe (10) with a die pad (11) and a plurality of leads (12). The die pad (11) has a substantially flat bottom surface (14) and a top surface (15). A semi-conductor die (2) is attached to a die attachment portion (31) of the top surface (15). Downbonds (5) connect the die (2) to a downbond attachment portion (32). Standard bonds (4) connect the die (2) to the leads (12). A plastic package (6) encapsulates the die (2), the standard bonds (4) and the downbonds (5). The top surface of the die pad has portions located at different levels, and step-shaped transitions between two adjacent ones of such portions. At least one of such step-shaped transition (36) is located between the die (2) and the downbonds (5). It has been found that such step-shaped transition provides good protection against downbond failure.

Abstract: The invention relates to a method of manufacturing a bipolar transistor on a semiconductor substrate (11) which is provided with a first, a second and a third layer (1,2,3) of a first, second and third semiconductor material respectively, all of a first conductivity type. A first portion of the second layer (2) is transformed into a buried isolation region (15) comprising a first electrically insulating material. A first semiconductor region (6) of the first conductivity type, comprising, for example, a collector region, is formed from a second portion of the second layer (2) adjoining the buried isolation region (15) and a portion of the first layer (1) adjoining the second portion of the second layer (2). Then a base region (7) is formed on the buried isolation region (15) and on the first semiconductor region (6) by transforming the third layer (3) into a second conductivity type, which is opposite to the first conductivity type.