Abstract: The present invention relates to a method for forming high quality oxide layers of different thickness over a first and a second semiconductor region in one processing step. The method comprises the steps of: doping the first and the second semiconductor region with a different dopant concentration, and oxidising, during the same processing step, both the first and the second semiconductor region under a temperature between 500° C. and 700° C., preferably between 500° C. and 650° C. A corresponding device is also provided. Using a low-temperature oxidation in combination with high doping levels results in an unexpected oxidation rate increase.

Abstract: Regarding an antenna configuration (1) preferably provided for a telecommunication device and comprising a first resonator structure (6) and second resonator structure (RS) being capacitive coupled with the first resonator structure (6) it is suggested to provide the antenna configuration (1) with a control electrode (2) and a switching stage (3), said control electrode (2) by means of the switching stage (3) being switchably connected to ground (G) and said switching stage (3) enabling to change capacitive coupling of the two resonator structures (6, RS) and thus to change the resonance frequency of the antenna configuration (1) and making possible to switch between a first frequency range and a second frequency range for enhancing the bandwidth and achieving improved matching of the antenna configuration (1).

Abstract: A receiver for a multi-carrier communication system receives training pilot carriers (TRPC) during a training symbol (T1, T2) which precedes data symbols (DS) which have data carriers (DC) and data pilot carriers (PC). The receiver has a correction unit (171) which supplies, under control of a control signal (CEC), a corrected signal (CDC1) which has the data carriers (DC) which are corrected for a common amplitude error and/or common phase error.

Abstract: A semiconductor device has a channel termination region for using a trench 30 filled with field oxide 32 and a channel stopper ring 18 which extends from the first major surface 8 through p-well 6 along the outer edge 36 of the trench 30, under the trench and extends passed the inner edge 34 of the trench. This asymmetric channel stopper ring provides an effective termination to the channel 10 which can extend as far as the trench 30.

Abstract: Method and arrangement for cyclically AD converting an analog signal with a sampler capacitance and an integrator capacitance, comprising the steps of generating a difference signal multiplied by the ratio of said capacitances from the analog signal and a reference signal, deriving a digital bit from said difference signal, doubling the difference signal multiplied by said ratio, shifting said doubled signal by the reference signal multiplied by said ratio and using the shifted signal as difference signal multiplied by said ratio for the next cycle.

Abstract: A resonator comprises a resonator mass (34), a first connector (30) on a first side of the mass connected between the resonator mass and a first fixed mounting and a second connector (32) on a second, opposite, side of the mass connected between the resonator mass and a second fixed mounting. Drive means drives the mass (34) into a resonant mode in which it oscillates in a sideways direction, thereby compressing one of the first and second connectors while extending the other of the first and second connectors.

Abstract: A voltage regulator is provided having one or more discharger circuits that compensate for low on-chip output capacitance and a slow loop response time. In one embodiment, the voltage regulator includes an output transistor coupled to an output voltage line, an output voltage sensing arrangement coupled to the output voltage line for producing an output feedback voltage, and an error amplifier coupled to the output feedback voltage, the output transistor, and a reference voltage for applying feedback control to the output transistor. A first discharger circuit is coupled to the output voltage line and to a reference potential, the first discharger circuit being triggered by a steep-rise overvoltage condition. In another embodiment, a combination of fast and slow discharger circuits is used to improve the load step response—i.e., to stop the output voltage from jumping too high and to pull it back to stable value very quickly, such that the load circuits are protected.

Abstract: A method for reproducing audio and/or video content on a device is provided. A position of a user is determined. Audio and/or video content to be reproduced on the device is selected based on the position of the user and is reproduced on the device. If the determined position of the user is in a first region (1), at least one first audio and/or video 5 content is selected. If the determined position of the user is in a second area (2), at least one second audio and/or video content is selected. If the determined position of the user is in an overlap region of the first and second area or in a region between the first and second area, a third audio and/or video content is generated based on at least the first and/or second audio and/or video content and the third audio and/or video content is selected to be reproduced.

Abstract: The present invention is related to line-based motion estimation and compensation in video image data. In particular, by performing the line-based motion estimation, a set of motion vectors for the line-based motion compensation is provided. By use of the provided set of motion vectors, the line-based motion compensation is performed by interpolating the image data of the current field/frame, wherein an interpolated image data of the image data of the current field/frame is provided as result of the performing of the line-based motion compensation. Then, it is checked, whether a region of the interpolated image data of the current field/frame comprises at least one pixel of the region, which was interpolated according to a motion vector from the set of motion vectors, which is indicated as being not reliable for the line-based motion compensation. If so, a blurring of the corresponding region is performed according to the present invention.

Abstract: A digital system 1 comprises receiving means (5) for receiving one or more performance indicators or parameters from software (6) controlling the execution of an application (3). Based on the performance indicators received by the receiving means (5), a tuning circuit (7) is provided for tuning the frequency (f), supply voltage (Vdd) and/or the transistor threshold voltage (Vb) of the digital system (1). In addition, pipeline configuration means (8) are provided for configuring the pipeline of the digital system (1) based on a pipeline depth determined by selecting means (10). The selecting means (10) is configured to select the pipeline depth (Pd) based on the frequency (f), supply voltage (Vdd), transistor threshold voltage (Vb), and according to whether the application requires maximum throughput or minimum latency.

Abstract: A control device (701) for controlling the output of one or more full-bridges (101, 102) is described. The control device (701) reduces the amount of electromagnetic emissions by staggering the switching the outputs from the full-bridge inverters (101, 102). This is achieved by synchronising the outputs to be symmetrical about a synchronisation pulse (305).

Abstract: A method of producing a multilayer structure is provided, wherein the method comprises forming a phase change material layer onto a substrate, forming a protective layer, forming a further layer on the protective layer, patterning the further layer in an first 5 patterning step, patterning the protective layer and the phase change material layer by a second patterning step. In particular, the first patterning step may be an etching step using chemical etchants. Moreover, electrodes may be formed on the substrate before the phase change material layer is formed, e.g. the electrodes may be formed on one level, e.g. may forma planar structure and may not form a vertically structure.

Abstract: A chip card (1) comprises a chip card controller (3), a display (6), a timing device (12), and a display driver (5) operatively coupled to the chip card controller (3) and to the display (6). The display driver (5) is configured to drive the display (6). The chip card (1) comprises a timing device (12) that is configured to wake up at least parts of the chip card (1).

Abstract: Secure wireless communication links are established between proximately-located devices, each of which includes respective audio transmitters and audio receivers. The audio transmitter of the first device can be used to transmit a device-dependent authentication key, which is received by the audio receiver of the second device. The audio transmitter of the second device can be used to transmit an acknowledgement, which is received at the audio receiver of the first device. The round-trip time from transmitting the authentication key from the first device to receiving the acknowledgement at the first device can be determined, and the decision of whether to establish the secure wireless communication link can be based on the determined round-trip time. In certain embodiments, these steps can be repeated starting with the second device to establish a two-way trust between the devices.

Abstract: This invention relates to an electrical regenerative brake (100) with a rotating brake coil (10) which is mounted on a wheel (14) of a vehicle, whereby a magnetic field (18) is fed in the coil (10). In order to allow effective regenerative braking (100) at low speeds and to provide a significant increase in power saving, this invention proposes that the permanent magnet (13) producing the magnetic field (18) is placed in the inner space of at least one additional coil (11, 12), whereby the brake has an electric circuit (22) which contains the rotating brake coil (10) and the additional coil (11, 12) as elements.

Abstract: An integrated circuit is provided with at least one processing unit (TM), a cache memory (L2 BANK) having a plurality of memory modules, and remapping means (RM) for performing an unrestricted remapping within said plurality of memory modules. Accordingly, faulty modules can be remapped without limitations in order to optimise the utilization of the memory modules by providing an even distribution of the faulty modules.

Abstract: The invention relates to a method of packaging or a device for packaging an electronic component, such as semiconductor device, whereby the component is positioned in a cavity of a foil by tweezers and is supported by means of a further foil which is attached to the foil at one side thereof. According to an example embodiment, the component is first placed into the cavity of the foil by the tweezers, and only after that is the further foil positioned adjacent thereto and attached to the foil. The tweezers are moved through the foil to pick up the component, hold it, and move it into the cavity. A feature of this embodiment is that the component may be temporarily supported by a supporting means after being positioned in the cavity and before being attached to the further foil and the foil with the component is moved in a longitudinal direction of the foil.

Abstract: A method for processing a frame of image data, wherein the image data is amplified by a gain factor determined in dependence of a number of sub-pixels within said frame of image data having a luminance above a first threshold value. The resulting gain factor allows for optimal amplification of the image data without loss of local detail. This leads to a better perceived image quality. In a preferred embodiment, the gain factor is simultaneously used for reducing the backlight intensity in a backlit LCD device. Thereby, the perceived image quality is similar to that of the unprocessed image data, however the power consumption of the LCD backlight is reduced substantially.

Abstract: Receivers (1) for receiving frequency signals are, to improve their time synchronization accuracy, provided with synchronization stages (20) for performing a coarse time synchronization through autocorrelating samples of a group of preamble symbols (t1,t2,t3) and a fine time synchronization through crosscorrelating samples of a further group of preamble symbols (t10,G1) with predefined samples. The synchronization stages (20) also perform a coarse and a fine frequency synchronization through detecting and accumulating phases of samples of a yet further group of preamble symbols (t8,t9) and of another group of preamble symbols (T1,T2). The synchronization stages (20) have buffering units (21) and controlling units (22) for controlling mixing units (11) and transformating units (12) in processing stages (10). The preamble symbols have ten short preamble symbols (t1-t10), a guard interval preamble symbol (G 1) and two training symbols (T 1,T2).

Abstract: An integrated circuit (51) comprises a power distribution network having a power pad (53) and a ground pad (55) arranged at diagonally opposite corners of the integrated circuit (51). A power bus (67, 69) and a ground bus (71, 73) supply power to circuit elements on the integrated circuit, for example standard cells (61a, 61b) or standard sub-blocks (63). A plurality of decoupling cells (65) are provided on the power distribution network for maintaining a static current flow between the power pad (53) and the ground pad (55). The power bus and ground bus are configured such that the combined length of the power bus and the ground bus is made the same for all circuit elements on the integrated circuit, thereby reducing on chip voltage variation.