Abstract: A circuit portion (100) of an IC comprises a plurality of conductive tracks (130) for coupling respective circuit portion elements (150), e.g. standard logic cells, to a power supply rail (110), with the conductive tracks (130) being coupled to the power supply rail (110) via at least one enable switch (132). The circuit portion (100) further comprising an element (160) for determining a voltage gradient over the circuit portion (100) in a test mode of the integrated circuit (600), which is conductively coupled to the conductive tracks (130). The element (160) has a first end portion (164) for coupling the element (160) to the power supply terminal and a second end portion (166) for coupling the element (160) to the output (620) in the test mode. This facilitates IDDQ testing of the circuit portion (100) by means of measuring a voltage gradient over the element (160).

Abstract: The present invention includes a technique for making a dual voltage integrated circuit device. A gate dielectric layer is formed on a semiconductor substrate and a gate material layer is formed on the dielectric layer. A first region of the gate material layer is doped to a first nonzero level and a second region of the gate material level is doped to a second nonzero level greater than the first level. A first field effect transistor is defined that has a first gate formed from the first region. Also, a second field effect transistor is defined that has a second gate formed from the second region. The first transistor is operable at a gate threshold voltage greater than the second transistor in accordance with a difference between the first level and the second level.

Abstract: A sensor for sensing magnetic field strength has a sensor element, and detection circuitry for detecting a level of resistance of the sensor element, the level of resistance varying with magnetic field under test and having hysteresis, so that upon electromagnetic excitation the resistance can switch between two or more stable levels as the magnetic field under test varies. The sensor outputs a digital signal according to the level of resistance. The sensor output may further be interpreted in terms of a change-of-state upon electromagnetic excitation. As the sensor no longer needs a different characteristic from magnetic memory cells, it can be much easier to construct and to integrate with magnetic memory cells than an analog sensor. An excitation signal varies a threshold for the magnetic field under test at which the resistance switches, to enable multiple measurements with different thresholds. Multiple sensor elements can have different thresholds, by having differing geometry or size.

Abstract: An integrated circuit die comprises a plurality of interconnects including a first test data input (142), a second test data input (144) and a test data output (152), and a test arrangement (100) for testing the integrated circuit die. The test arrangement (100) comprises a further multiplexer (150) coupled to the test data output (152), a multiplexer (140) coupled to the first test data input (142) and the second test data input (144), a plurality of shift registers (102, 104, 106, 108) including an instruction register (108), each of the shift registers being coupled between the multiplexer (140) and the further multiplexer (150) and a controller (110) for controlling the multiplexer (140) and the further multiplexer (150) in response to the instruction register (108).

Abstract: Conventional modulation envelope demodulators for amplitude modulated signals (e.g. ASK coded signals RX) contain rectifier elements which extract a baseband signal BB. Disadvantageously, due to a non-linear characteristic of the rectifier elements, an amplitude of the baseband signal BB depends on an amplitude of the high-frequent carrier signal. The present invention discloses an improved demodulation circuit for demodulating of ASK coded or amplitude modulated signals. This is achieved by using a sampling mixer 4 and a phase adjusting regulation loop (5) by means of which the sampling of the ASK coded signal RX at its maxima is performed with high accuracy. Due to the absence of any rectifying elements, the baseband signal BB can be fully extracted from the ASK coded signals RX.

Abstract: The invention relates to a method of photolithography comprising the steps of: providing a substrate and forming a layer of a photoresist (100) on the substrate, performing a first exposure (120) in which a predetermined part of the layer of photoresist is irradiated through a mask having a pattern for forming a latent image of said pattern in the layer of the photoresist, performing a pretreatment (130) on the layer of the photoresist to remove a predetermined part of the latent image before performing the fixation (140). The method provides an improved process window. The invention further relates to a photoresist for use within the method of the invention.

Abstract: A device (1) for producing sound samples from sound parameters representing sound components comprises a transient synthesis unit (14) for synthesizing transient sound components from transient sound parameters contained in each frame. To increase the efficiency of the synthesis, a transient selection unit (11) is arranged for selecting only a single transient sound component per frame. Additionally, the device may be arranged for producing fewer sinusoidal sound components if a transient is produced. Transform domain coefficients may be convolved with a transform domain representation of a time window representation, the number of resulting transform domain coefficients being controlled to further enhance the efficiency of the synthesis.

Abstract: A supply circuit (1) comprising an inductor (2) coupled to switching means (7) and comprising a capacitor (4) is provided with an impedance (3) located between the inductor (2) and the capacitor (4), with a current injector (5) and with a feedback loop comprising a converter (6) for controlling the current injector (5) for compensating a ripple in an output voltage across the capacitor (4). The impedance (3) allows injection of a compensating current at a location different from an output location. This increases a number of possible detections of ripples in the output voltage and allows a ripple in an output voltage to be detected even in case of loads introducing much noise across the capacitor (4). The converter (6) detects a detection signal via the impedance (3) by measuring a voltage across the impedance (3) or across a serial circuit comprising the impedance (3) and the capacitor (4). The impedance (3) comprises a resistor or a further inductor.

Abstract: A receiver has an input amplifier (RFAMP) that comprises a signal-voltage amplifier (SVA) and a feedback path (FBP). The signal-voltage amplifier (SVA) provides a voltage gain (VG) from an input node (SESf) to an output node (SON). The voltage gain (VG) is controllable. The feedback path (FBP) provides a transadmittance (GM) from the output node (SON) to the input node (SIN). The transadmittance (GM) is controllable.

Abstract: A receiver circuit has a chain of stream processing circuits (10a-c)—having control parameter inputs for receiving control parameter values. To facilitate design of circuits that receive data with a variable block size, an included control circuit (14) selects block sizes of blocks of samples in the respective streams of a plurality of the stream processing circuits (10a-c), a control parameter value for each particular block. The control circuit transmits instructions specifying the selected block sizes and control parameter values to local control circuits (11). Each local control circuit is coupled to the control circuit (14) and the control input of a respective corresponding stream processing circuit (10a-c). Each local control circuit (11) receives at least part of the instructions and applies parameter values from the instructions to its corresponding stream processing circuit (10a-c). The local control circuit (11) controls timing of control parameter updates using block sizes from the instructions.

Abstract: A method is described for forming gate structures with different metals on a single substrate. A thin semiconductor cap (26) is formed over gate dielectric (24) and patterned to be present in a first region (16) not a second region (18). Then, metal (30) and a second cap (34) is deposited and patterned to be present in the second region not the first. A thick selectively etchable layer for example of SIGe is deposited, the gates are patterned in both first and second regions, and the selectively etchable layer is removed. A metal layer is deposited and reacted with the first and second caps to form fully suicided or fully germanided layers.

Abstract: A method is described for forming gate structures with different metals on a single substrate. A thin semiconductor layer (26) is formed over gate dielectric (24) and patterned to be present in a first region (16) not a second region (18). Then, metal (30) is deposited and patterned to be present in the second region not the first. Then, a fully suicided gate process is carried out to result in a fully suicided gate structure in the first region and a gate structure in the second region including the fully suicided gate structure above the deposited metal (30).

Abstract: A method of manufacturing a semiconductor device includes forming trenches (22), and then selectively etching a buried layer (14) to form a cavity. An insulator is then deposited on the sidewalls of the trenches (22), not covering the cavity, and the cavity is then used to form a conductive region (28) in the cavity. The trench (22) can then be filled with insulator (40), in which case the conductive region (28) may form a precisely located doped region, or with conductor to form a contact to the conductive region (28).

Abstract: An analog-to-digital converter (ADC1) of the Sigma Delta type provides a stream of digital output samples (OUT) in response to an analog input signal (IN). The analog-to-digital converter (ADC1) comprises a quantizer (QNT) that has a dead zone. The quantizer (QNT) provides a digital output sample that has a neutral value when the quantizer (QNT) receives an input signal whose amplitude is within the dead zone. A feedback path (DAC) within the analog-to-digital converter (ADC1) provides a feedback action only in response to a digital output sample that has a value other than the neutral value.

Abstract: A semiconductor device has a trench (42) adjacent to a cell (18). The cell includes source and drain contact regions (26, 28), and a central body (40) of opposite conductivity type. The device is bidirectional and controls current in either direction with a relatively low on-resistance. Preferred embodiments include potential plates (60) that act together with source and drain drift regions (30, 32) to create a RESURF effect.

Abstract: A circuit arrangement and method facilitate the direct streaming of data between producer and consumer circuits (12P, 12C) that are otherwise configured to communicate over an address-based network (18). Sync signals (46, 56) are generated for each of producer and consumer circuits (12P, 12C) from the address information encoded into requests that communicate the data streams output by the producer circuit (12P) and expected by the consumer circuit (12C). The sync signals (46, 56) for the producer and consumer circuits (12C) are then used to selectively modify the data stream output by the producer circuit (12P) to a format expected by the consumer circuit (12C). Typically, such modification takes the form of inserting data into the data stream when the consumer circuit (12C) expects more data than output by the producer circuit (12P), and discarding data communicated by the producer circuit (12P) when the consumer expects less data than that output by the producer circuit (12P).

Abstract: In a method of producing a transponder (1) an integrated circuit (2, 72, 82) is produced. The integrated circuit (2, 72, 82) is produced by applying a photoresist layer (11) on a surface (8) of a semiconductor device (4), generating a patterned mask (14) by lithographically patterning the photoresist layer (11) so that the photoresist layer (11) comprises at least one aperture (12, 13), and filling the aperture (12, 13) with a bump (15, 16, 75, 76) by depositing the bump (15, 16, 75, 76) on the surface (8) utilizing the patterned mask (14). Finally, the integrated circuit (2, 72, 82), with the patterned mask (14), is attached to a substrate (3), which comprises an antenna structure (18). The bump (15, 16, 75, 76) is connected electrically to the antenna structure (18).

Abstract: The invention relates to a method for creating an interpolated image between a previous image and a current image in a video stream. The invention also relates to an image processing system for creating an interpolated image between a previous image and a current image in a video stream. The invention is based on the following principle: a motion estimator generates at least two vector fields, one at a temporal position smaller then 1 A, and another at a temporal position greater than 1 A. Then occlusion detection is done to detect covering and uncovering areas. A first vector is fetched from the first vector field and a second vector is motion vector fetched from the second vector field. If there is covering, the up-conversion vector is the second vector; if there is uncovering, the up-conversion vector is the first vector; if there is no uncovering-covering, the up-conversion may be either the first vector or the second vector.

Abstract: A computer-based software task management system includes an index register configured to store a data register pointer for pointing to a data register. A Task ID register is coupled to the index register and configured to store a Task ID keyed to the index register. A Task ID memory is coupled to the Task ID register and configured to store a flag indicating whether the Task ID is available. A state machine is coupled to the Task ID memory and configured to allocate Task IDs on an available basis using a task ID memory.

Abstract: The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (1) and a semiconductor body (11) which comprises at least one semiconductor element, wherein, after formation of the element, a layer structure is formed which comprises at least one electrically insulating layer (2) or an electrically conductive layer (3), wherein an opening is formed in the layer structure with the aid of a patterned photoresist layer (4) and an etching process, wherein residues are formed on the surface of the semiconductor body (11) during the etching process, and wherein the photoresist layer (4) is ashed, after the etching process, by means of a treatment with an oxygen-containing compound, after which the surface is subjected to a cleaning operation using a cleaning agent comprising a diluted solution of an acid in water and being heated to a temperature above room temperature, thereby causing the residues formed to be removed.