Abstract: Described is a method of monitoring the communication in a group of data processing units, wherein a data processing unit transmits data signals to other data processing units for carrying out certain operations. The remarkable thing about the invention is that, upon reception of a data signal from the transmitting data processing unit, every other data processing unit answers both the transmitting data processing unit and the other data processing units by way of an appropriate acknowledgement.

Abstract: A data processing apparatus receives a message containing a sync break interval with a unique bit pattern and a sync field interval identified by the sync break interval. A timing property of the sync field interval specifies the length of bit periods of the message. A clock source circuit supplies a sampling clock signal to define time points for sampling bits from the message. The clock source circuit adapts a frequency of the sampling clock signal to the timing property of the sync field interval.

Abstract: The invention provides a method for fabricating a heterojunction bipolar transistor with a base connecting region (23), which is formed self-aligned to a base region (7) without applying photolithographic techniques. Further, a collector connecting region (31) and an emitter region (29) are formed simultaneously and self-aligned to the base connecting region (23) without applying photolithographic techniques.

Abstract: A sensor for contactlessly detecting currents, has a sensor element having a magnetic tunnel junction (MTJ), and detection circuitry, the sensor element having a resistance which varies with the magnetic field, and the detection circuitry is arranged to detect a tunnel current flowing through the tunnel junction. The sensor element may share an MTJ stack with memory elements. Also it can provide easy integration with next generation CMOS processes, including MRAM technology, be more compact, and use less power. Solutions for increasing sensitivity of the sensor, such as providing a flux concentrator, and for generating higher magnetic fields with a same current, such as forming L-shaped conductor elements, are given. The greater sensitivity enables less post processing to be used, to save power for applications such as mobile devices. Applications include current sensors, built-in current sensors, and IDDQ and IDDT testing, even for next generation CMOS processes.

Abstract: The invention relates to a cluster coupler in a time triggered network for connecting clusters operating on the same protocol. Further, it relates to a network having a plurality of clusters, which are coupled via a cluster coupler. It also relates to a method for communicating between different clusters.

Abstract: Magnetic field sensors (1) comprising field detectors (10) for detecting magnetic fields are provided with environment detectors (11) for detecting environments and with processors (12) for, in response to detected environments, performing processes such as loading calibration parameter sets and (re)calibrations for the field detectors (10), to allow the magnetic field sensors (1) to be used in different subsequent environments. The environment detectors (11) may comprise code detectors for detecting codes indicative for environments and may comprise user interfaces (13) for, in response to detected environments and via user interactions, selecting processes to be performed by the processors (12). Devices (2) comprise magnetic field sensors (1). Apparatuses (3) such as cradles removably fix the devices (2) and may comprise code generators (30) for generating the codes indicative for the environments.

Abstract: A method for identifying weak points in the geometry of an integrated circuit, and the critical process condition at which the weak point is likely to fail. The simulation means of the OPC process is used to generate the simulated wafer structure, not only in ideal process conditions, but also at other, non-ideal process conditions. The difference in aerial image intensity of the non-ideal simulations is indicative of the presence and extent of a weak point. The edge-placement error between the ideal simulation and the simulation in which a weak point has been identified is used to determine the location of the weak point in the design.

Abstract: In a method of checking the integrity of an antenna arrangement (2) of a transmitter (1), which transmitter (1) comprises a transmitter driving stage (4) for driving the antenna arrangement (2) with a driving current (is), a first value (Isupply) indicative of the driving current (is) is determined. After that, it is detected whether the driving current (i) is outside a predefined current range by comparing the first value (Isupply) with a predefined first value range. If the first value (Isupply) is outside the first value range, then it is indicated that the antenna arrangement (2) is not in sound condition. The antenna arrangement (2) is comprised of an antenna (5) and a tuning network (6) connected between the antenna (5) and the transmitter driving stage (4).

Abstract: A method and apparatus are discloses for wirebonding leads of a plurality of lead frames being part of a lead frame assembly by a wirebonding tool to semiconductor products mounted on the respective lead frames. The semiconductor products are clamped by a clamping mechanism comprising a stationary clamp and a movable clamp. The movable clamp follows the indexing movement of the lead frame assembly during wirebonding of the semiconductor products clamped by the movable clamp. The wirebonding process does not need to be interrupted for the indexing.

Abstract: The memory circuit comprises at least one memory element (T1), a sense amplifier (SA) for sensing a state of the memory element (T1), a switching device (T2) for selectively coupling the sense amplifier (SA) to the memory element (T1), The sense amplifier (SA) comprises a first module (M1) and a second module (M2). The first module (M1) provides a first current limited to a maximum value (Iref+Ibias). The second module (M2) provides a second current which decreases from a value higher than the maximum value at the start of a sensing operation until a value lower than the maximum value at the end of the sensing operation. The memory circuit has a third module (CS2) for sinking a third current (Ibias) at a side of the switching device (T2) coupled to the memory element (T1).

Abstract: A flash memory device is presented. The device includes a flash memory, which has a temporary storage portion, a main storage portion and a controller. The temporary storage portion is provided for buffering data and addresses. The buffered addresses are indicative of the destination of the buffered data in the main storage portion. The controller is configured for selectively accessing the main storage portion or the temporary storage portion or a combination thereof for receiving and/or outputting the data from the memory. The controller is further configured for enabling communication of data between the two portions. Because non-volatile flash memory is used for the temporary storage, no other memory components are needed and, in case of an unexpected power failure, the data in the temporary area is not lost.

Abstract: The invention relates to a network operating on a time triggered protocol using time slots, wherein at least two clusters are included in the network, each cluster includes at least a node. Further, it relates to a method for clock synchronization within a time triggered network.

Abstract: In a motion-compensated processing of images, input images are down-scaled (scl) to obtain down-scaled images, the down-scaled images are subjected to motion-compensated processing (ME UPC) to obtain motion-compensated images, the motion-compensated images are up-scaled (sc2) to obtain up-scaled motion-compensated images; and the up-scaled motion-compensated images are combined (M) with the input images to obtain output images.

Abstract: A device (1) for producing spectrally shaped noise comprises a filter unit (13) for filtering input noise samples using filter coefficients representing a spectral envelope. The filter coefficients are determined for use at a first sampling frequency, while the spectrally shaped noise is reproduced using the same filter coefficients at a second, different sampling frequency. The noise spectrum may further be altered by an upsampling unit (14).

Abstract: The present invention relates to a data pipeline management system and more particularly to a minimum memory solution for unidirectional data pipeline management in a situation where both the Producer and Consumer need asynchronous access to the pipeline, data is non-atomic, and only the last complete (and validated) received message is relevant and once a data read from/write to the pipeline is initiated, that data must be completely processed. The data pipeline management system according to the invention can be implemented as a circular queue of as little as three entries and an additional handshake mechanism, implemented as a set of indices that can fit in a minimum of six bits (2×2+2×1). Both the Producer and Consumer will have a 2 bit index indicating where they are in the queue, and a 1 bit binary value indicating a special situation. Both parties can read all the indices but can only write their own, i.e. P and wrapP for the Producer and C and wrapC for the Consumer.

Abstract: The present invention relates to an electronic device for providing improved heat transporting capability for protecting heat sensitive electronics and a method for producing the same. The present invention also relates to uses of the electronic device for various applications such as in LED lamps for signalizing, signage, automative and illumination applications or a display apparatus or any combinations thereof.

Abstract: The present invention provides a quadrature-sampling clock signals generation method and apparatus for use in a receiver The apparatus firstly obtains an initial clock signal whose frequency is lower than twice of the carrier frequency of an input signal, then divides the frequency of the initial clock signal by two to obtain two quadrature intermediate clock signals, and finally divides the frequency of the two intermediate clock signals respectively to output two quadrature sampling clock signals. With the clock signal generation method and apparatus of the present invention, it is possible to operate a VCO at a relative low frequency, which will not only reduce the cost of the VCO, but also decrease the power consumption thereof.

Abstract: Method of manufacturing a MEMS device integrated in a silicon substrate. In parallel to the manufacturing of the MEMS device passive components as trench capacitors with a high capacitance density can be processed. The method is especially suited for MEMS resonators with resonance frequencies in the range of 10 MHz.

Abstract: A demodulator (6) for demodulating a modulated signal (3) comprises a Hubert transformer (7) for generating a Hubert transformed modulated signal (18) of the modulated signal (3). The Hubert transformed modulated signal (18) comprises modulated (5) and unmodulated signal sequences (4) and originates from an unmodulated signal. The demodulator (6) further comprises a comparing device (14) for comparing the Hubert transformed modulated signal (18) with a reference signal (15), which corresponds to the Hubert transformed unmodulated signal. The demodulator (6) is further configured to identify the modulated and unmodulated signal sequences (4, 5) based on the comparison.

Abstract: A double gate transistor on a semiconductor substrate (2) includes a first diffusion region (S2), a second diffusion region (S3), and a double gate (FG, CG). The first and second diffusion regions (S2, S3) are arranged in the substrate spaced by a channel region (CR). The double gate includes a first gate electrode (FG) and a second gate electrode (CG). The first gate electrode is separated from the second gate electrode by an interpoly dielectric layer (IPD). The first gate electrode is arranged above the channel region and is separated from the channel region by a gate oxide layer (G). The second gate electrode is shaped as a central body. The interpoly dielectric layer is arranged as a conduit-shaped layer surrounding an external surface (A1) of the body of the second gate electrode. The interpoly dielectric layer is surrounded by the first gate electrode.