Abstract: The present invention relates to a system for distributing multimedia content to at least one client device over a network. Said system comprises: a slicer (SLI) for slicing the multimedia content into a set of slices; a coder (ALC) for coding a slice according to an asynchronous layer coding technique such that N coded symbols including K source symbols and N?K error symbols are generated; -a content server (SER) for storing and transmitting said coded slices upon request of the client device; a client device (CLD) comprising means for receiving said coded slices and a decoder (DEC) for decoding a coded slice as soon as K coded symbols of said slice have been received.
Abstract: A loudspeaker (13, 16) comprises an electro dynamic transducer (1) and a bass reflex enclosure (14, 17), in which the electro dynamic transducer (1) is mounted. The diaphragm (2) of the transducer, when driven, vibrates in a rocking mode with a rocking frequency and the bass reflex enclosure (14, 17) is tuned to the rocking frequency.
Abstract: A FinFET and methods for its manufacture are provided. The method of the invention provides an elegant process for manufacturing FinFETs with separated gates. It is compatible with a wide range of dielectric materials and gate electrode materials, providing that the gate electrode material(s) can be deposited conformally. Provision of at least one upstanding structure (or “dummy fin”) (40) on each side of the fin (4) serves to locally increase the thickness of the gate electrode material layer (70). In particular, as the shortest distance between each upstanding structure (40) and the respective side of the fin (4) is arranged in accordance with the invention to be less than twice the thickness of the conformal layer, the thickness of the gate electrode material layer (70) all the way across this distance between each upstanding structure (40) and the fin (4) is increased relative to that over planar regions of the substrate (2).
Abstract: A technique is provided for use in a handheld multimedia device that uses the historical load profile statistics of a particular multimedia stream to dynamically scale the computational power of a computing engine, depending upon the complexity of the multimedia content and thereby reduce the power consumption for computationally less intensive content and consequently reduce the power consumption by a significant amount over a duration of time.
Abstract: In order to provide an electronic communication system (100), in particular an access control system for P[assive]K[eyless]E[ntry], comprising at least one base station (10) being arranged in particular on or in an object to be secured against unauthorized use and/or against unauthorized access, for example being arranged on or in a vehicle and/or on or in an access system, at least one remote device (20), in particular at least one transponder unit, which remote device (20) may in particular be carried with him by an authorized user and/or is designed to exchange data signals (12, 22) with the base station (10), in which case, by means of the data signals (12, 22) the authorization for use and/or for access can be determined and/or the base station (10) can be controlled accordingly, wherein cost and complexity of the remote device (20) are reduced, it is proposed that the remote device (20) comprises at least one recording unit (24) for recording at least part of the data signals (12, 22), in particular for
Abstract: A semiconductor device has a channel termination region for using a trench 30 filled with field oxide 32 and a channel stopper ring 18 which extends from the first major surface 8 through p-well 6 along the outer edge 36 of the trench 30, under the trench and extends passed the inner edge 34 of the trench. This asymmetric channel stopper ring provides an effective termination to the channel 10 which can extend as far as the trench 30.
Abstract: A wireless device (110) is provided for supporting extended battery life. A transceiver (132) is configured to receive and transmit data over a wireless link. A frame detection sensor (140) is coupled to the transceiver and configured to sense an incoming frame and generate an incoming frame sensor signal. A controller (142) is coupled to the frame detection sensor and transceiver, and configured to selectively deactivate a portion of the transceiver device based at least in part on the frame sensor signal. Advantages of the invention include the ability to extend battery life in mobile wireless devices.
Abstract: The present invention relates to a multi-processor computer system comprising at least two processors for parallel execution of processes, at least two cache memory units, each being associated with and connected to a separate processor, a connection bus connecting said processors and said cache memory units, and a process list unit connected to said connection line for storing a process list of processes to be available for execution by said processors.
Abstract: In a method of binarizing images containing linear structures, and particularly images of prints from the skin, areas are determined that are each distinguished by a preset approximate direction of the structures. The areas of the image that are determined are each filtered with a Gabor filter adapted to the given direction. The method according to the invention can advantageously be implemented into a system for analyzing and binarizing images containing linear structures, and particularly images of prints from the skin. Such systems can advantageously be used for identifying human individuals and are especially intended for access control and the like.
Abstract: The MOS transistor (1) of the invention comprises a gate electrode (10), a channel region (4), a drain contact region (6) and a drain extension region (7) mutually connecting the channel region (4) and the drain contact region (6). The MOS transistor (1) further comprises a shield layer (11) which extends over the drain extension region (7) wherein the distance between the shield layer (11) and the drain extension region (7) increases in a direction from the gate electrode (10) towards the drain contact region (6). In this way the lateral breakdown voltage of the MOS transistor (1) is increased to a level at which the MOS transistor (1) may fulfill the ruggedness requirement for broadcast applications for a supply voltage higher than that used in base station applications.
Type:
Grant
Filed:
December 12, 2006
Date of Patent:
August 18, 2009
Assignee:
NXP B.V.
Inventors:
Stephan Jo Cecil Henri Theeuwen, Johannes Adrianus Maria De Boet, Jos Gerjan Eusebius Klappe
Abstract: To provide a security-sensitive semiconductor product, particularly a smartcard chip, in which are produced not only electrically active structures (2, 3, 4, 5, 6) envisaged by the chip design in the form of circuit functions in and on a wafer (1), which may for example be composed of silicon, but also additional, electrically conductive parts (42, 61, 62) (tiles) of the filling structure, which are insulated from one another, are generated by means of a design program in the remaining residual areas, which greatly impedes, to the reverse engineer the analysis of the security-sensitive circuit structure situated beneath them. The contacts between the parts which are generated, which contacts are for interlinking the latter with the chance signal paths described, may be set “by hand” or by a combination of the design programs in question and a corresponding routing program.
Abstract: A data processor that addresses instructions as groups of commands which may contain more than one branch command, such as VLIW instructions that contain several commands for parallel execution. The processor selects an expected taken branch command from the branch commands in a group. The processor also selects a tentative target for the expected taken branch command and tentatively redirects control flow to a further group of commands identified by the tentative target. The processor contains an associative target memory for storing targets of previously executed branch commands. Targets are retrieved with an associative address that identifies a command in the group, the tentative target being selected on the basis of a match between the associative address associated with the tentative target and an indication of the expected taken command.
Abstract: In a wafer (1) with chips (2) and elongate separating zones (4) between the chips (2), each chip (2) comprises at least one sawing loop (6), which sawing loop (6) comprises two protecting strips (17, 18) projecting from a planar protecting layer (16) of the chip (2), wherein said protecting strips (17, 18) are widened by means of wider strip portions (26, 27, 28, 29) where they emerge from the planar protecting layer (16), and wherein the protecting strips (17, 18) and the planar protecting layer (16) are provided with weak spots (31, 32, 34) serving as envisaged breakage points.
Abstract: A sound reproduction system comprising a digital audio signal input (1), a digital audio signal processor (2, DSP) and a digital audio signal output (3) wherein the digital signal processor (2, DSP) comprises a high pass (HP) filter (21) with a high pass frequency (f), an amplifier (22) for a signal filtered by the HP filter, and a low pass (LP) filter (23) with a low pass frequency (f) for filtering the signal after amplification by the amplifier (22) and for providing an output signal, and the digital processor comprises an establisher (24, 25) for establishing the high pass frequency or the low pass frequency and a matcher (26) for matching the high pass frequency and low pass frequency of the high pass filter and low pass filter respectively to each other.
Abstract: An address-generating arrangement for a microprocessor has, in addition to its base address-generating unit, one or more address-generating expansion units, connected to the basic unity by an interface. The interface comprises one or more input data buses supplying data from the base unit to the expansion unit and an output data bus supplying data from the expansion unit to the basic unit under control of the microprocessor.
Abstract: A method for reducing the power consumption in a state retaining circuit during a standby mode is disclosed comprising, in an active state, providing a regular power supply (VDD) and a standby power supply (VDD STANDBY) to the state retaining circuit; for a transition from an active state to a standby state, decreasing the regular power supply to ground level and maintaining the standby power supply (VDD STANDBY) thus providing the circuit elements (36, 142, 78, 85) of the state retaining circuit with enough power for retaining the state during standby mode; and for a transition from the standby state to the active state, increasing the regular power supply (VDD) from its ground level to its active level.
Type:
Grant
Filed:
August 4, 2003
Date of Patent:
August 18, 2009
Assignee:
NXP B.V.
Inventors:
Manish Garg, Kiran Batni Raghavendra Rao, Jose De Jesus Pineda De Gyvez
Abstract: In a method of filtering an image with bar-shaped structures by means of Gabor filters, which are formed in the spatial domain by a two-dimensional Gaussian bell-shaped curve on which a cosine function is superimposed in a main direction, the image is divided into tiles, a predominant direction of the bar-shaped structures is determined for each tile and the filtration is undertaken in such a way that one tile at a time is rotated until the predominant direction lies at right angles to the main direction of the Gabor filter, one filtration takes place in the main direction and another filtration takes place at right angles to this, and the filtered tile is rotated back again.
Abstract: The invention relates to a semiconductor device with a substrate (11) and a semiconductor body (11) comprising a bipolar transistor with an emitter region (1), a base region (2) and a collector region (3) comprising a first, a second and a third connection conductor, which emitter region (1) comprises a mesa-shaped emitter connection region (1A) provided with spacers (4) and adjacent thereto a base connection region (2A) comprising a conductive region (2AA) of poly crystalline silicon. In a device (10) according to the invention, the base connection region (2A) comprises a further conducting region (2AB), which is positioned between the conductive region (2AA) of poly crystalline silicon and the base region (2) and which is made of a material with respect to which the conducting region (2AA) of polycrystalline silicon is selectively etchable. Such a device (10) is easy to manufacture by means of a method according to the invention and its bipolar transistor possesses excellent RF properties.
Abstract: A signal transmission system (STS) comprises a transmitter (T) with a first LC circuit comprising a first coil (C1) intended to be fed with signals having a chosen carrier frequency, and a receiver (R) with a second LC circuit comprising a second coil (C2) and coupled to a circuit front-end (FE). The first coil (C1) is arranged to transfer energy to the second coil (C2) by magnetic induction in a near-field propagation mode. The first LC circuit (C1) has an increased quality factor and is tuned to a first frequency which is shifted in a first direction from the carrier frequency by a first value, and the second LC circuit (C2) has an increased quality factor and is tuned to a second frequency which is shifted in a second direction, opposite to the first one, from the carrier frequency by a second value.
Abstract: A microcontroller (30) includes a processor (32), an embedded memory (46) operatively coupled to the processor (32), and a microcontroller test interface (34) operatively connected to the processor (32) and the memory (36). The microcontroller (30) responds to a reset signal to perform a reset initiation that causes an initial disabled state of the test interface (34) to be set and execution of initiation code with the processor (32). This code execution optionally establishes a further disabled state. The microcontroller (30) provides an enabled state of the test interface for memory (46) access through the test interlace (34) during microcontroller (30) operation subsequent to the reset initiation unless the further disabled memory (46) access state is established by execution of the initiation code.
Type:
Application
Filed:
August 22, 2006
Publication date:
August 13, 2009
Applicant:
NXP B.V.
Inventors:
Ata Khan, Greg Goodhue, Pankaj Shrivastava