Patents Assigned to NXP
  • Patent number: 11424741
    Abstract: An n-well voltage switching circuit (60) and methodology are disclosed for generating a maximum bias voltage (VMAX) at the output voltage node with cross-coupled PMOS switching transistors (63) connected to a voltage supply remapping circuit (61, 62, 64) which receives first and second power supplies (VSUP1, VSUP2) and generates first and second gate driving signals (G1, G4), wherein the first and second gate driving signals are connected, respectively, to the gates of the first and second cross-coupled PMOS transistors (P5, P6) to pull a gate for one of the cross-coupled PMOS transistors to ground so that the higher of the first and second power supplies is coupled to the output voltage node over one of the first and second cross-coupled PMOS transistors, thereby generating a maximum bias voltage at the output voltage node.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: August 23, 2022
    Assignee: NXP B.V.
    Inventors: Domenico Liberti, Andre Gunther, Jeffrey Alan Goswick
  • Patent number: 11422578
    Abstract: A low dropout regulator includes a first stage that generate a first output voltage and a second stage that generates a second output voltage different from the first output voltage. The first stage and the second stage are coupled in parallel to a node, the stages are selectively controlled respective first and second output signals based on different conditions. One condition may be operation of a load in one or more predetermined modes. Another condition may be transition between modes. Selective control of the first stage during a mode transition may reduce voltage undershoot or voltage overshoot in the load.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: August 23, 2022
    Assignee: NXP B.V.
    Inventors: Xiaoqun Liu, Madan Mohan Reddy Vemula, Mohammad Nizam Kabir
  • Patent number: 11419190
    Abstract: A thermal increase system may include re-radiators disposed in a cavity for containing a load. Microwave energy may be generated by one or more microwave generation modules, and directed toward the cavity during operation of the thermal increase system, thereby creating an electromagnetic field in the cavity. A system controller may control switches coupled between the re-radiators and corresponding ground nodes to selectively activate and de-activate the re-radiators. The system controller may control a switch coupled between a pair of re-radiators to re-distribute the electromagnetic field in the cavity. A phase shifter may be disposed between a pair of re-radiators, which may provide a phase shift to energy passed between the re-radiators. The phase shifter may be a variable shifter that applies a variable phase shift to the energy according to commands received from the system controller.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: August 16, 2022
    Assignee: NXP USA, Inc.
    Inventor: Gregory J. Durnan
  • Patent number: 11417541
    Abstract: A mold chase has first and second mold clamps having corresponding teeth and recesses configured such that, when the mold chase is closed onto a sub-assembly having an IC die mounted onto and wire-bonded to a lead frame, there are gaps between the recesses and the leads of the lead frame that allow molding compound to extend along opposing sides of proximal ends of the leads to increase the metal-to-metal distance between adjacent leads, thereby reducing the chances of, for example, tin migrating during HAST testing to form undesirable conduction paths between adjacent leads. In some embodiments, the mold clamp teeth have chamfered edges that are tapered at the mold chase cavity to form wedge-shaped gaps that allow the molding compound to extrude along the proximal ends of the leads of MaxQFP packages having two levels of “J” leads and gullwing leads.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: August 16, 2022
    Assignee: NXP USA, INC.
    Inventors: Zhigang Bai, Jinzhong Yao, Xingshou Pang
  • Patent number: 11415626
    Abstract: A method of testing a semiconductor device. An apparatus comprising a semiconductor device and a test apparatus. The semiconductor device includes an integrated circuit and a plurality of external radiating elements at a surface of the device, the radiating elements include transmit elements and receive elements. The test apparatus includes a surface for placing against the surface of the device. The test apparatus also includes at least one waveguide, which extends through the test apparatus for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the plurality of radiating elements located at the surface of the device. A spacing between the waveguide openings of each waveguide is larger than, or smaller than a spacing between the corresponding radiating elements.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: August 16, 2022
    Assignee: NXP B.V.
    Inventors: Jan-Peter Schat, Abdellatif Zanati, Henrik Asendorf, Maristella Spella, Waqas Hassan Syed, Giorgio Carluccio, Antonius Johannes Matheus de Graauw
  • Patent number: 11416378
    Abstract: An integrated circuit device is disclosed. The device includes a circuit configured to perform a function, a fault management component, at least one user register, an analog test bus component, a built-in self-test component, a safety monitor component, and gating logic. Additionally, the circuit is separated from the fault management component, the at least one user register, the analog test bus component, the built-in self-test component, the safety monitor, and the gating logic.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: August 16, 2022
    Assignee: NXP B.V.
    Inventors: Jan-Peter Schat, Xavier Hours, Andres Barrilado Gonzalez
  • Patent number: 11418188
    Abstract: In an integrated circuit, a bootstrapped switch includes a capacitor and first, second, and third transistors. The first transistor has a first current electrode coupled to a first voltage supply node and a gate electrode coupled to a first circuit node. The second transistor has a first current electrode coupled to a second voltage supply terminal, a second current electrode coupled to a top terminal of the capacitor, and a control electrode coupled to the first circuit node. The third transistor has a first current electrode coupled to the first voltage supply terminal, a control electrode coupled to the first circuit node, and a second current electrode coupled to a body terminal of the second transistor. The fourth transistor has a first current electrode coupled to the body terminal of the second transistor, and a second current electrode coupled to the top terminal of the capacitor.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: August 16, 2022
    Assignee: NXP B.V.
    Inventors: Kushagra Bhatheja, Chris C. Dao, Xiankun Jin
  • Patent number: 11418235
    Abstract: One example discloses a near-field wireless device, including: a controller configured to be coupled to a near-field antenna; wherein the near-field antenna includes, a near-field electric antenna configured to transmit and/or receive near-field electric (E) signals; and a near-field magnetic antenna configured to transmit and/or receive near-field magnetic (H) signals; a conductivity monitor configured to determine a conductivity of a medium proximate to the near-field device; wherein the controller is configured to modulate an E/H ratio of fields generated by and/or received from the near-field electric (E) antenna and the near-field magnetic (H) antenna based on the conductivity of the medium.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: August 16, 2022
    Assignee: NXP B.V.
    Inventors: Liesbeth Gommé, Anthony Kerselaers
  • Patent number: 11418190
    Abstract: A switch circuit includes a transistor stack coupled between first and second ports. The transistor stack includes a group of multiple, adjacent, series-coupled transistors, and at least one additional transistor coupled in series with the group between the first and second ports to provide a first variably-conductive path between the first and second ports. The switch circuit also includes a balancing capacitor with a first terminal coupled to an input of the group of multiple, adjacent, series-coupled transistors, and a second terminal coupled to an output of the group of multiple, adjacent, series-coupled transistors.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: August 16, 2022
    Assignee: NXP USA, Inc.
    Inventor: Venkata Naga Koushik Malladi
  • Patent number: 11418879
    Abstract: A method and apparatus are described for aligning cross-faded audio signals using beats. In an embodiment, a controller includes a cross-fade module having at least first and second audio inputs and an audio output port to provide an audio output signal to an external audio reproduction system. A control signal determines whether to provide the first or the second audio signal to the audio output, and the cross-fade module cross-fades the audio output signal from one audio signal to the other audio signal. A beat alignment module determines a delay between a first beat of the first audio signal and a second beat of the second audio signal, and a delay module delays either the first or the second audio signal to compensate for the delay into the cross-fade module.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: August 16, 2022
    Assignee: NXP B.V.
    Inventors: Joris Louis L Luyten, Temujin Gautama
  • Patent number: 11411497
    Abstract: A switching power regulator and method for recovering the regulator from an unregulated state while preventing overshoot of an output voltage is provided. The regulator includes a dropout detector, a sample-and-hold circuit, a voltage offset circuit and a soft start circuit. When the regulator enters an unregulated state, the dropout detector detects when a pulse width modulation (PWM) signal stops toggling. The sample-and-hold circuit and soft start circuit are used to effectively clamp the voltage at the output of an error amplifier. This causes the output of the error amplifier to regulate around a desired voltage so that the regulator recovers from the unregulated state with little or no overshoot of the output voltage. In another embodiment, a method for recovering from the unregulated state is provided.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: August 9, 2022
    Assignee: NXP USA, Inc.
    Inventors: Kyle James Wollschlager, John Pigott, John Ryan Goodfellow
  • Patent number: 11409973
    Abstract: In accordance with a first aspect of the present disclosure, a radio frequency identification (RFID) device is provided, comprising a first power domain, a second power domain, a first processing unit, and a second processing unit, wherein the first processing unit is configured to execute one or more first operations and the second processing unit is configured to execute one or more second operations, wherein the first operations output intermediate data which are used as input for the second operations, and wherein the first processing unit is configured to operate in the first power domain and the second processing unit is configured to operate in the second power domain, said first power domain having a larger amount of available power than the second power domain. In accordance with further aspects of the present disclosure, a corresponding method of operating a radio frequency identification (RFID) device is conceived, and a corresponding computer program is provided.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: August 9, 2022
    Assignee: NXP B.V.
    Inventors: Martin Feldhofer, Franz Amtmann, Peter Thüringer
  • Patent number: 11412373
    Abstract: Various embodiments relate to a method and system for resuming a secure communication session with a server by a device, including: sending a message to the server requesting the resumption of a secure communication session; receiving from the server a server identifier, a server nonce, and a salt; determining that the device has a shared key with the server based upon the server identifier; determining that the received salt is valid; calculating a salted identifier based upon the shared key and the salt; sending the salted identifier to the server; and resuming the secure communication session with the server.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: August 9, 2022
    Assignee: NXP B.V.
    Inventors: Marcel Medwed, Stefan Lemsitzer
  • Patent number: 11411611
    Abstract: In accordance with a first aspect of the present disclosure, a communication device is provided, comprising: a first antenna configured to receive and transmit a first set of NFC signals, wherein said first set of NFC signals relates to NFC transactions; a second antenna configured to receive and transmit a second set of NFC signals, wherein said second set of NFC signals relates to wireless charging operations; a controller; and an antenna selection unit configured to select the first antenna or the second antenna in response to a selection signal received from said controller. In accordance with a second aspect of the present disclosure, a corresponding method for operating a communication device is conceived.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: August 9, 2022
    Assignee: NXP B.V.
    Inventors: Markus Wobak, Ulrich Neffe
  • Patent number: 11411492
    Abstract: A charge pump for a Radio Frequency Identification (RFID) tag is disclosed. The charge pump includes an antenna port to receive an input AC signal, an input port to receive an input signal, and a main transistor having a gate, a source and a drain. A threshold voltage cancellation circuit is included and is coupled between one terminal of the antenna port and the input port, wherein an output of the threshold voltage cancellation circuit is configured to drive the gate of the main transistor. The threshold voltage cancellation circuit is configured to reduce the threshold voltage of the main transistor when the voltage of the input signal is below a predefined voltage level and to remove threshold voltage cancellation when the voltage of the input signal is above the predefined voltage levels.
    Type: Grant
    Filed: May 29, 2021
    Date of Patent: August 9, 2022
    Assignee: NXP B.V.
    Inventors: Thomas Pichler, Ivan Jesus Rebollo Pimentel
  • Patent number: 11411749
    Abstract: A tie cell includes a first flip-flop having a physically unclonable function (PUF), a second flip-flop that generates a PUF key value, and logic that logically combines the PUF value and the PUF key value to generate an output signal having a constant logical value. The PUF value is based on a power-up value stored in the first flip-flop, which power-up value is generated based on physical and/or electrical characteristics produced from a manufacturing process. The output value is generated to tie digital logic to the constant logical value.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: August 9, 2022
    Assignee: NXP B.V.
    Inventor: Jan-Peter Schat
  • Patent number: 11409970
    Abstract: In accordance with a first aspect of the present disclosure, an ultra-wideband (UWB) communication device is provided, comprising: a UWB communication unit being configured to establish and perform UWB radio communication with an external device, a radio frequency (RF) communication device being a radio frequency identification (RFID) tag, wherein the RF communication device is configured to receive at least one command from an external reader and to initiate a wake-up or a power-up of the UWB communication unit in response to receiving said command. In accordance with a second aspect of the present disclosure, a corresponding method of operating an ultra-wideband (UWB) communication device is conceived.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: August 9, 2022
    Assignee: NXP B.V.
    Inventors: Christian Eisendle, Ulrich Andreas Muehlmann, Michael Schober
  • Patent number: 11411599
    Abstract: A method is described synchronization in a communication system which comprises a master anchor device, a first anchor device, and a second anchor device. The method comprises: i) transmitting, by the master anchor device, a first message to the first anchor device and to the second anchor device using a first ultra-wide band (UWB) communication, wherein the first message is indicative of a master clock of the master anchor device receiving, by the first anchor device, the first message, and synchronizing a first clock of the first anchor device based on the master clock, and iii) receiving, by the second anchor device, the first message, and synchronizing a second clock of the second anchor device based on the master clock. Furthermore, a communication system and a use of UWB communication is described.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: August 9, 2022
    Assignee: NXP B.V.
    Inventors: Diwakar Subraveti, Atmaram Kota Rajaram, Nidhin Vadakkan, Hendrik Ahlendorf, Brima Babatunde Ibrahim
  • Patent number: 11408990
    Abstract: An ultra-wideband (UWB) wireless communication system comprises a first wireless transceiver that outputs a unit of data having a first preamble that includes data for performing a time-of-flight distance measurement; a second wireless transceiver that replaces the first preamble of the unit of data with a second preamble for providing a performance level required for the time-of-flight distance measurement between the first and second wireless transceivers commensurate with an environment in which the second wireless transceiver is used; and a communication link between the first and second wireless transceivers that transmits the unit of data having the first preamble from the first wireless transceiver to the second wireless transceiver, transmits the second preamble from the second wireless transceiver to the first wireless transceiver, and exchanges subsequent electronic communications between the first and second wireless transceivers using the second preamble.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: August 9, 2022
    Assignee: NXP B.V.
    Inventors: Filippo Casamassima, Wolfgang Eber
  • Patent number: 11409845
    Abstract: A method is provided for detecting copying of a machine learning model. A plurality of inputs is provided to a first machine learning model. The first machine learning model provides a plurality of output values. A sequence of bits of a master input is divided into a plurality of subsets of bits. The master input may be an image. Each subset of the plurality of subsets of bits corresponds to one of the plurality of output values. An ordered sequence of the inputs is generated based on the plurality of subsets of bits. The ordered sequence of the inputs is inputted to a second machine learning model. It is then determined if output values from the second machine learning model reproduces the predetermined master input. If the predetermined master input is reproduced, the second machine learning model is a copy of the first machine learning model.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: August 9, 2022
    Assignee: NXP B.V.
    Inventors: Nikita Veshchikov, Joppe Willem Bos, Simon Johann Friedberger