Abstract: A radar system (300) and a method of operating the radar system is disclosed, the radar system (300) comprising: a first IC (310), arranged to receive a reference clock signal (380) and configurable to generate a common local oscillator signal (400) based on the reference clock signal (380); a second IC (320), arranged to receive the common local oscillator signal (400) from the first IC (310); and a controller (350), adapted to detect a fault in the first IC (310), and configured, upon detection of a fault in the first IC (310), to send at least one signal to the second IC (320) for reconfiguring the second IC (320) from a slave mode to a master mode; wherein, when operating in the slave mode, the second IC (320) is configured to use the common local oscillator signal (400) generated by the first IC (310), and, when operating in the master mode, said second IC (320) is configured to use an internally-generated local oscillator signal.

Abstract: Systems and methods of managing variable size load units of application codes in a processing system include identifying pages of a random access memory (RAM) device to store copies of load units from an external memory device upon request by a bus master in the processing system. The RAM device is internal to an integrated circuit device that includes the bus masters, and the external memory device is external to the integrated circuit device. The bus masters execute the application codes, and each of the application codes comprise one or more load units that include executable program instructions. At least some of the load units have different sizes from one another. A page type indicator is determined for an identified page. A first page type indicates whether the identified page is a split page to store a segment of each of two different load units.

Abstract: A device for providing a random number generator is provided. The device may include a true random number generator, at least one deterministic random number generator, and an exclusive OR logic function. The TRNG has an output and the at least one DRNG has an output. The exclusive OR logic function has a first input coupled to the output of the TRNG and a second input coupled to the output of the at least one DRNG, and an output for providing a random number. The TRNG and the at least one DRNG may include separate and independent entropy sources. A method for generating a random number is also provided.

Abstract: Power amplifier (PA) packages containing peripherally-encapsulated dies are provided, as are methods for fabricating such PA packages. In embodiments, a method for fabricating a PA package includes obtaining a die-substrate assembly containing a radio frequency (RF) power die, a package substrate, and a die bond layer. The die bond layer is composed of at least one metallic constituent and electrically couples a backside of the RF power die to the package substrate. A peripheral encapsulant body is formed around the RF power die and covers at least a portion of the die bond layer, while leaving at least a majority of a frontside of the RF power die uncovered. Before or after forming the peripheral encapsulant body, terminals of the PA package are interconnected with the RF power die; and a cover piece is bonded to the die-substrate assembly to enclose a gas-containing cavity within the PA package.

Abstract: Various embodiments relate to an amplifier circuit including: a first transistor having a first and second current conducting terminals and a control terminal; a second transistor having a first and second current conducting terminals and a control terminal, in which the second current-conducting terminal of the first transistor is connected to the first current-conducting terminal of the second transistor; a first inductor with a first terminal coupled to a first current-conducting terminal of the first transistor and a second terminal coupled to an output of the amplifier circuit; a feedback circuit connected between the output and the control terminal of the second transistor, wherein the feedback circuit includes a first resistor, a second inductor, and a first capacitor; and an input of the amplifier circuit connected between the first resistor and the second inductor, wherein a second current-conducting terminal of the second transistor is connected to a first ground terminal, and wherein a control term

Abstract: In accordance with a first aspect of the present disclosure, a radio frequency identification (RFID) transponder is provided, comprising a modulator and a controller, wherein: the modulator is configured to generate a modulated signal to be transmitted to an external RFID reader; the controller is configured to increase a transmitter impedance during a first period of time; the controller is configured to decrease the transmitter impedance by enabling the modulator during a second period of time. In accordance with a second aspect of the present disclosure, a corresponding method of operating a radio frequency identification (RFID) transponder is conceived.

Abstract: A method for improving breakdown voltage of a Laterally Diffused Metal Oxide Semiconductor (LDMOS) includes biasing a first well of a Field Effect Transistor (FET) to a first voltage. The first well is laterally separated from a second well. An isolation ring is charged to a second voltage in response to the first voltage exceeding a breakdown voltage of a diode connected between the isolation ring and the first well. The isolation ring laterally surrounds the FET and contacts a buried layer (BL) extending below the first well and the second well. A substrate is biased to a third voltage being less than or equal to the first voltage. The substrate laterally extends below the BL and contacts the BL.

Abstract: The embodiments described herein provide devices and methods for image processing. Specifically, the embodiments described herein provide techniques for blending graphical layers together into an image for display. In general, these techniques utilize multiple display control units to blend together more layers than could be achieved using a single display control unit. This blending of additional layers can provide improved image quality compared to traditional techniques that use only the blending capability of a single display control unit.

Abstract: An embodiment for an integrated circuit for temperature detection includes: a closed loop circuit branch including: a first bipolar junction transistor (BJT), a first resistor coupled between a first base of the first BJT and a junction node, and an amplifier having an output coupled to the junction node and a non-inverting input coupled to a collector of the first BJT; and an open loop circuit branch including: a second BJT, a second resistor coupled between a base of the second BJT and the junction node, a third resistor coupled between the base of the second BJT and ground, and a comparator having an inverting input coupled to a collector of the second BJT and an output configured to provide a digital voltage signal that corresponds to a temperature reading.

Abstract: There is disclosed a method for facilitating transactions carried out by a mobile device, wherein: the mobile device executes a smart card application; the smart card application receives a cryptographic algorithm from a transaction server external to the mobile device; the smart card application further receives transaction data from said transaction server; the cryptographic algorithm encrypts said transaction data and stores the encrypted transaction data in a storage unit of the mobile device. Furthermore, a corresponding computer program product and a corresponding mobile device for carrying out transactions are disclosed.

Abstract: An interconnect offload component arranged to operate in an offloading mode, and a memory access component for enabling access to a memory element for functional data transmitted over a debug network of a signal processing device. In the offloading mode the interconnect offload component is arranged to receive functional data from an interconnect client component for communication to a destination component, and forward at least a part of the received functional data to a debug network for communication to the destination component via the debug network. The memory access component is arranged to receive a debug format message transmitted over the debug network, extract functional data from the received debug format message, said functional data originating from an interconnect client component for communication to a memory element, and perform a direct memory access to the memory element comprising the extracted functional data.

Abstract: An amplifier includes a driver stage amplifier transistor and a final stage amplifier transistor, which are integrated in a semiconductor die. The driver stage amplifier transistor has a driver stage input, a driver stage output, and an output impedance, and the driver stage amplifier transistor is configured to operate using a first bias voltage at the driver stage output. The final stage amplifier transistor has a final stage input, a final stage output, and an input impedance. The final stage input is electrically coupled to the driver stage output. The final stage amplifier transistor is configured to operate using a second bias voltage at the final stage output, and the second bias voltage is at least twice as large as the first bias voltage.

Abstract: A clock generation circuit includes a switched capacitor circuit for providing a discrete amount of charge to a resonator for sustaining energization of the resonator at specific portions of the clock cycle.

Abstract: Automatic control of media presentation parameters is provided by using one or more of real-time audio playback measurement data from microphones and audience facial and body expression interpretation from video and infrared cameras, in conjunction with artificial intelligence for interpretation and evaluation of facial and body expression and predetermined perceptual audio models. Media presentation parameters can include, for example, speaker volume, audio equalization, feedback elimination, play/pause, and other audio content-related aspects of presentation. In some embodiments, additional environmental parameters can be modified to enhance audience experience, such as, for example, temperature, lighting, and the like, in response to audience facial and body expression.

Abstract: A semiconductor device includes a substrate, an IC die mounted on the substrate, packaging encapsulant on the substrate, a cavity in the packaging encapsulant, a conductive lid attached to the packaging encapsulant over the IC die, an electrical ground path in the substrate, and a first conductive structure in the cavity. The first conductive structure includes a first end electrically coupled to the conductive lid and a second end electrically coupled to the electrical ground path.

Abstract: An apparatus includes a first trench formed in a semiconductor layer. The first trench has a first width and a first depth. A second trench is formed in the semiconductor layer. The second trench has a second width and a second depth. The first width is wider than the second width. A buried dielectric layer is disposed between a bottom semiconductor surface of the semiconductor layer and a substrate. The buried dielectric layer contacts a first bottom surface of the first trench. A liner dielectric is formed on the first bottom surface and a first sidewall of the first trench. A first layer is formed on the liner dielectric. A second layer is formed on the first layer and extends to the substrate through an opening formed on the first bottom surface.

Abstract: A computer processor is provided which hides jump instructions, in particular condition jump instructions, from side-channels. The processor comprises a forward jump detector for detecting a forward jump instruction having a jump target location which lies ahead and a jump inhibitor for inhibiting an execution of the forward jump instruction. The computer processor is configured for executing at least one intermediate computer instruction located between the inhibited forward jump instruction and the jump target location. The processor further comprises a storage destination modifier for modifying the storage destination determined by the at least one intermediate computer instruction to suppress the effects of execution of intermediate instructions. Since the intermediate instruction is executed regardless of the forward jump instruction, the jump is hidden in a side-channel. Secret information, such as cryptographic keys, on which the forward jump may depend, is also hidden.

Abstract: A semiconductor device includes a transistor die having top and bottom die surfaces, an electrically conductive structure, and input and output pads formed at the top die surface. An isolation structure is interposed between the input and output pads of the transistor die. The isolation structure extends above the top die surface, is coupled to the conductive structure, and is connected to a common return path of the transistor die. The isolation structure may be formed from one or more bondwires and is configured to reduce mutual coupling between input and output interconnects of the semiconductor device.

Abstract: A semiconductor device package is provided that incorporates an antenna structure within the package through use of three-dimensional additive manufacturing processes. Embodiments can provide semiconductor device packages that are thinner than traditional device packages by depositing specific metal and dielectric layers within the package in desired positions with precision that cannot be provided by other manufacturing techniques. Further, embodiments can provide antenna geometries and orientations that cannot be provided by other manufacturing techniques.

Abstract: Integrated circuitry, such as a microcontroller, for controlling an electric motor includes circuitry for measuring a bi-directional current flowing within a coil of the electric motor. The current is sensed by an externally implemented current sensing element, such as a shunt resistor, to produce a differential voltage that is delivered to input pins of the microcontroller, which are protected by electrostatic discharge protection circuits. Current sources implemented within the microcontroller are coupled to the input pins, and work in concert with external resistors to shift the differential voltage so that it is maintained within an appropriate voltage operating range so that an accurate measurement of the bi-directional current can be made by the microcontroller.