Patents Assigned to NXP
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Patent number: 11165353Abstract: A power converter including: a dual output resonant converter including a first output, a second output, a common mode control input, and a differential mode control input, wherein a voltage/current at the first output and a voltage/current at the second output are controlled in response to a common mode control signal received at the common mode control input and a differential mode control signal received at the differential mode control input; a dual output controller including a first error signal input, a second error signal input, a common mode control output, and a differential mode control output, wherein the dual output controller is configured to generate the common mode control signal and the differential mode control signal in response to a first error signal received at the first error signal input and a second error signal received at the second error signal input, wherein the first error signal is a function of the voltage/current at the first output and the second error signal is a function ofType: GrantFiled: September 25, 2020Date of Patent: November 2, 2021Assignee: NXP B.V.Inventor: Hans Halberstadt
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Patent number: 11164648Abstract: A circuit includes a glitch measurement circuit and a glitch profile circuit. The glitch measurement circuit includes a first comparator to compare a glitch in a power supply voltage to a first threshold voltage, a first counter to generate a first count indicative of a time duration the first comparator indicates that the glitch trips the first threshold voltage, a second comparator to compare the glitch in the power supply voltage to a second threshold voltage different than the first threshold voltage, and a second counter to generate a second count indicative of a time duration the second comparator indicates that the glitch trips the second threshold voltage. The glitch profile circuitry utilizes the first count and the second count to generate a multi-voltage profile of the glitch, wherein the multi-voltage profile includes indications of the time durations indicated by the first count and the second count.Type: GrantFiled: June 18, 2019Date of Patent: November 2, 2021Assignee: NXP USA, Inc.Inventors: Nihaar N. Mahatme, Srikanth Jagannathan
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Patent number: 11165610Abstract: Various embodiments relate to a de-emphasis (DE) controller in a wireline transmitter, including: a digital decoder configured to receive a DE control value and configured to produce a bias control value, an N1 control value, and an N2 control value; a bias controller configured to vary the bias current for a de-emphasis circuit based upon the bias control value; an N1 controller configured to activate a number of N1 unit cells in a delayed line driver based upon the N1 control value; and an N2 controller configured to activate a number of N2 unit cells in a non-delayed line driver based upon the N2 control value, wherein the N1 control value plus the N2 control value varies for different DE control values, and wherein the bias control value is based upon the N1 control value plus the N2 control value.Type: GrantFiled: March 8, 2021Date of Patent: November 2, 2021Assignee: NXP USA, Inc.Inventor: Siamak Delshadpour
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Patent number: 11164062Abstract: In accordance with a first aspect of the present disclosure, a radio frequency identification (RFID) transponder is provided, comprising a modulator and a controller, wherein: the modulator is configured to generate a modulated signal to be transmitted to an external RFID reader; the controller is configured to regulate an input voltage for the modulator, resulting in a regulated input voltage, and to feed said regulated input voltage to the modulator. In accordance with a second aspect of the present disclosure, a corresponding method of operating a radio frequency identification (RFID) transponder is provided.Type: GrantFiled: October 8, 2020Date of Patent: November 2, 2021Assignee: NXP B.V.Inventors: Thomas Pichler, Ivan Jesus Rebollo Pimentel, Stefan Maier, Egas Carvalho Henes Neto, Harcharan Singh Madaan, Slawomir Rafal Malinowski
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Patent number: 11163346Abstract: An electronic device including a power source providing a source voltage, a capacitor, a primary regulator circuit, an always-on load that is active during a low power mode, and a recycle control circuit. The primary regulator circuit receives the source voltage and has an output that maintains a charge on the capacitor during an active mode. The primary regulator circuit does not contribute to a charge on the capacitor during the low power mode. The recycle control circuit includes a select circuit and a select control circuit. The select circuit selects, based on a control signal, between the voltage of the capacitor and at least one supply voltage including or otherwise developed using the source voltage to provide power to the always-on load during the low power mode. The select control circuit provides the control signal to control power provided to the always-on load during the low power mode.Type: GrantFiled: August 31, 2018Date of Patent: November 2, 2021Assignee: NXP B.V.Inventors: Ajay Kapoor, Kristof Blutman, Juan Diego Echeverri Escobar, Jose de Jesus Pineda de Gyvez, Jurgen Geerlings, Hamed Fatemi
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Patent number: 11165614Abstract: One example discloses an OFDM wireless communications device, including: a memory configured to support processing of OFDM tones; a controller, coupled to the memory, and configured to set the wireless communication device to a first mode and a second mode; wherein the first mode is configured to transmit or receive a first wireless communication signal having a first set of OFDM tones contained within an OFDM channel bandwidth; wherein the second mode is configured to transmit or receive a second wireless communication signal having a second set of OFDM tones contained within the OFDM channel bandwidth; and wherein the memory used for processing the first set of OFDM tones is same as the memory used for processing the second set of OFDM tones.Type: GrantFiled: November 16, 2020Date of Patent: November 2, 2021Assignee: NXP USA, Inc.Inventors: Sudhir Srinivasa, Yui Lin, Hongyuan Zhang, Mao Yu, Timothy J. Donovan
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Patent number: 11165482Abstract: A method and apparatus (200A) are provided for multiplexing data and uplink control bitstreams on a 5G-NR uplink by generating a multiplexing configuration structure with one or more processors (201) and supplying the data and uplink control bitstreams to a multiplexing engine (214) which includes an index calculation logic circuit (212) and multiplex selector circuit (213), where the index calculation logic circuit is configured with the multiplexing configuration structure (CONFIG) to execute an iterative data-control multiplexing algorithm which generates ordered selection indices in sequential order (MUX_SEL), and where the multiplex selector circuit receives and selects m-bit sequences from the data bitstream and one or more uplink control bitstreams for output into a multiplexed output stream according to the ordered selection indices generated by the index calculation unit, where m is an integer greater than or equal to 1.Type: GrantFiled: August 20, 2020Date of Patent: November 2, 2021Assignee: NXP USA, Inc.Inventors: Jayakrishnan Cheriyath Mundarath, Oded Yishay, Ahmed Hossny Anis Elsamadouny
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Patent number: 11166352Abstract: A system is configured to perform an operation that results in increasing a thermal energy of a load. The system includes a radio frequency signal source configured to supply a radio frequency signal, an electrode coupled to the radio frequency signal source, and a variable impedance network that includes at least one variable passive component. The variable impedance network is coupled between the radio frequency signal source and the electrode. The system includes a controller configured to determine an operation duration based upon a configuration of the variable impedance network, and to cause the radio frequency signal source to supply the radio frequency signal for the operation duration.Type: GrantFiled: December 19, 2018Date of Patent: November 2, 2021Assignee: NXP USA, Inc.Inventors: James Eric Scott, Daniel Joseph Viza, Lionel Mongin, David Paul Lester
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Patent number: 11165426Abstract: A level shifter comprising: a translation circuit having two input lines and two output lines and configured to receive a differential signal in a low-voltage domain on the two input lines and provide a second differential signal, being a copy of the first differential signal, in a high-voltage domain on the two output lines; and a combiner circuit configured to convert the second differential signal into a single-ended signal at a high-voltage shifter output; wherein the combiner circuit comprises a two-input Muller C-element circuit wherein one input is inverted. Corresponding methods are also disclosed.Type: GrantFiled: September 1, 2020Date of Patent: November 2, 2021Assignee: NXP USA, Inc.Inventors: Mojtaba Ashourloo, John Pigott
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Patent number: 11164826Abstract: A packaged integrated circuit (IC) device includes a first IC die, a first layer of adhesive on a first major surface of the first IC die, and an isolation layer over the first layer of adhesive. The isolation layer has a first major surface and a second major surface, and the second major surface of the isolation layer is between the first layer of adhesive and the first major surface. The packaged IC device also includes a first inductor coil on the first major surface of the isolation layer, a second layer of adhesive on the isolation layer, and a second IC die on the second layer of adhesive.Type: GrantFiled: August 30, 2019Date of Patent: November 2, 2021Assignee: NXP USA, Inc.Inventors: Burton Jesse Carpenter, Fred T. Brauchler
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Patent number: 11165364Abstract: A synchronous rectifier converts an AC input into a DC output. The synchronous rectifier has four switches controlled by four switch control modules. Each switch is connected between a different AC component and either the DC output or ground. Each switch control module has digitally assisted “switch on” circuitry that detects “on” bounces in the corresponding AC component to control when to turn on the corresponding switch and digitally assisted “switch off” circuitry that detects “off” bounces in the AC component to control when to turn off the corresponding switch. The “switch on” circuitry has a digitally assisted comparator to detect threshold crossings in the AC component, and the “switch off” circuitry has a digitally assisted programmable delay cell to turn off the switch for a predetermined duration following each detected threshold crossing.Type: GrantFiled: February 25, 2019Date of Patent: November 2, 2021Assignee: NXP B.V.Inventors: Fuchun Zhan, Tinghua Yun, Jian Qing, Chao Chen, Li Zhang, Feng Cong
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Patent number: 11165446Abstract: A Viterbi traceback processing method, system, and apparatus are provided wherein a first Viterbi traceback processing operation (MUX 514) is performed on a first survivor path metric (TMV1) by selecting, in response to a back track state (INDEX 0), a first output data bit (Ti1) for the first survivor path metric, wherein a plurality of Viterbi traceback processing operations (MUX 512, 513) are performed on respective portions of an additional survivor path metric (TMV2A, TMV2B) by selecting, in response to a shifted back track state (INDEX 1), candidate data bits (Tn1, Tn2) for the additional survivor path metric, wherein a multiplexer (MUX 518) controlled by the first output data bit selects between the candidate data bits to generate an additional output data bit (Ti2) for the additional survivor path metric such that the Viterbi traceback processing operations are performed in parallel to produce the output data bits.Type: GrantFiled: November 5, 2020Date of Patent: November 2, 2021Assignee: NXP B.V.Inventor: Stefan Quitzk
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Patent number: 11160145Abstract: A radio-frequency (RF) heating system may include a removable drawer, which may be inserted under a fixed shelf of the RF heating system to form an enclosed cavity. The drawer may include conductive channels or side rails that may interface with the shelf of the defrosting system in order to electrically couple the drawer to the RF heating system. The drawer may include an electrode that is electrically coupled to ground or to a RF signal source when the drawer is inserted beneath the shelf. The shelf may include selectable electrodes of varying sizes. The RF heating system may use identification circuitry to recognize the type of drawer that has been inserted beneath the shelf. RF energy may be applied to the electrode of the drawer or the shelf to heat a load in the enclosed cavity.Type: GrantFiled: September 29, 2017Date of Patent: October 26, 2021Assignee: NXP USA, Inc.Inventors: David Paul Lester, Daniel Joseph Viza
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Patent number: 11150308Abstract: The disclosure provides a battery management device, method, and a chip. The device includes: an analog-digital converter connected with a first power supply access terminal, a second power supply access terminal and an impedance measuring element: wherein the analog-digital converter is configured to achieve analog-digital conversion between an accessed power supply and the impedance measuring element; the impedance measuring element is further connected with a comparator and a driving element; the impedance measuring element is configured to test an impedance of the accessed power supply; the comparator is configured to compensate delay generated by the driving element and an excitation signal generator; and the driving element is configured to drive the battery management device to work; and the excitation signal generator is connected with the comparator, the driving element, the first power supply access terminal and the second power supply access terminal.Type: GrantFiled: June 17, 2019Date of Patent: October 19, 2021Assignee: DATANG NXP SEMICONDUCTORS CO., LTD.Inventors: Johnny Li, Hai Li
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Patent number: 11153418Abstract: Aspects of the disclosure are directed to methods and apparatuses for wireless vehicular communications involving the transmission of messages using two or more protocols. As may be implemented in accordance with one or more embodiments characterized herein, wireless station-to-station communications are carried out in which a plurality of stations share a wireless communications channel. Information is wirelessly collected respectively from transmissions associated with a legacy communication protocol and another type of communication protocol. A current communication environment of the station is dynamically discerned and characterizes a dynamic relationship of the collected information using the legacy communication protocol relative to the collected information using the other communication protocol.Type: GrantFiled: October 31, 2019Date of Patent: October 19, 2021Assignee: NXP B.V.Inventors: Vincent Pierre Martinez, Alessio Filippi, Michael Andrew Fischer
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Patent number: 11144677Abstract: A fully digital integrated circuit apparatus (200) and method (300) are provided for generating a test mode enable signal with a digital non-resettable state retention storage circuit (210) connected to store an authentication control pattern for authorizing test mode access to a secure circuit, a digital safety interlock gate circuit (220) connected to store a safety interlock gate setting that may be accessed independently from a test mode enable signal, and combinatorial logic circuitry (205) for generating the test mode enable signal only when the interlock safety gate setting is set to a first value and the digital non-resettable state retention storage circuit stores the authentication control code.Type: GrantFiled: August 8, 2019Date of Patent: October 12, 2021Assignee: NXP USA, Inc.Inventors: Stefan Doll, Thomas Henry Luedeke, Nikila Krishnamoorthy, Hubert Glenn Carson, Jr., Anurag Jindal, Hilario Manuel Garza, Kamel Musa Khalaf, Joel Ray Knight, Adrian Lee Carleton
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Patent number: 11146433Abstract: A method for high data rate transmission using minimum energy coding with Ultra Wide Band modulation includes encoding each of a plurality of sourcewords into a respective codeword. Each respective codeword includes a single logic-high bit. A codeword duty cycle is less than a low duty cycle threshold, wherein the codeword duty cycle is based on a bit length of the codeword. Each respective codeword is modulated with an On-Off-Keying (OOK) modulation to form a respective modulated codeword, wherein a transmission of each modulated codeword occurs only for the single logic-high bit in each respective codeword.Type: GrantFiled: March 11, 2020Date of Patent: October 12, 2021Assignee: NXP B.V.Inventor: Jan-Peter Schat
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Patent number: 11145382Abstract: A leakage measuring circuit includes a bias input node control circuit and provides a signal indicative of a leakage current through the bias input node. The bias input node control circuit includes a first input to receive an indication of a reference voltage, a second input to receive an indication of a voltage of the bias input node, and an output to bias the bias input node at the reference voltage based on a relationship between the first and second input. A well voltage bias circuit provides a well bias voltage and includes a well bias control circuit including a first input to receive the signal indicative of the leakage current, a second input to receive a signal indicative of a reference leakage current value, and an output for controlling the well bias voltage based on a relationship between the first and second input of the well bias control circuit.Type: GrantFiled: May 11, 2020Date of Patent: October 12, 2021Assignee: NXP USA, Inc.Inventors: Karthik Ramanan, Jon Scott Choy, Jacob T. Williams
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Patent number: 11145609Abstract: An embodiment of a Doherty amplifier includes a module substrate, first and second surface-mount devices coupled to a top surface of the module substrate, and an impedance inverter line assembly. The first and second surface-mount devices include first and second amplifier dies, respectively. The impedance inverter line assembly is electrically connected between outputs of the first and second amplifier dies. The impedance inverter line assembly includes an impedance inverter line coupled to the module substrate, a first lead of the first surface-mount device coupled between the first amplifier die output and a proximal end of the impedance inverter line, and a second lead of the second surface-mount device coupled between the second amplifier die output and a distal end of the impedance inverter line. According to a further embodiment, the impedance inverter line assembly has a 90 degree electrical length at a fundamental operational frequency of the Doherty amplifier.Type: GrantFiled: December 5, 2019Date of Patent: October 12, 2021Assignee: NXP USA, Inc.Inventors: Joseph Gerard Schultz, Jeffrey Kevin Jones, Elie A. Maalouf, Yu-Ting David Wu, Nick Yang
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Patent number: 11142212Abstract: A method, system and device are disclosed for determining safety conflicts in redundant subsystems of autonomous vehicles. Each redundant subsystem calculates a world model or path plan, including locations, dimensions, and orientations of moving and stationary objects, as well as projected travel paths for moving objects in the future. The travel paths and projected future world models are subsequently compared using a geometric overlay operation. If at future time moments the projected world models match within predefined margins, the comparison results in a match. In case of a mismatch at a given future moment between projected world models, a determination is made as to whether the autonomous vehicle and all road users in this future moment are safe from collision or driving off the drivable space or road based on a geometric overlay operation.Type: GrantFiled: June 6, 2019Date of Patent: October 12, 2021Assignee: NXP B.V.Inventors: Andrei Sergeevich Terechko, Ali Osman Örs