Abstract: Arrayed imaging systems include an array of detectors formed with a common base and a first array of layered optical elements, each one of the layered optical elements being optically connected with a detector in the array of detectors.

Abstract: An example image sensor includes first, second, and third micro-lenses. The first micro-lens is in a first color pixel and has a first curvature and a first height. The second micro-lens is in a second color pixel and has a second curvature and a second height. The third micro-lens is in a third color pixel and has a third curvature and a third height. The first curvature is the same as both the second curvature and the third curvature and the first height is greater than the second height and the second height is greater than the third height, such that light absorption depths for the first, second, and third color pixels are the same.

Abstract: A pixel cell includes a storage transistor disposed in a semiconductor substrate. The storage transistor includes a storage gate disposed over the semiconductor substrate, and a storage gate implant that is annealed and has a gradient profile in the semiconductor substrate under the storage transistor gate to store image charge accumulated by a photodiode disposed in the semiconductor substrate. A transfer transistor is disposed in the semiconductor substrate and is coupled between the photodiode and an input of the storage transistor to selectively transfer the image charge from the photodiode to the storage transistor. The transfer transistor includes a transfer gate disposed over the semiconductor substrate. An output transistor is coupled to an output of the storage transistor to selectively transfer the image charge from the storage transistor to a read out node. The output transistor includes an output gate disposed over the semiconductor substrate.

Abstract: A method of reading pixel data from a pixel array includes exposing each one of a plurality of regions of pixels a respective exposure time. Pixel data is read from the plurality of regions of pixels. The pixel data is interpolated from a first one of the plurality of regions of pixels to determine the pixel data of the regions of pixels other than the first one of the plurality of regions of pixels to generate a first image having the first exposure time. The pixel data is interpolated from the second one of the plurality of regions of pixels to determine the pixel data of the regions of pixels other than the second one of the plurality of regions to generate a second image having the second exposure time. The images are combined to produce a high dynamic range image.

Abstract: A pixel cell includes a photodiode coupled to photogenerate image charge in response to incident light. A deep trench isolation structure is disposed proximate to the photodiode to provide a capacitive coupling to the photodiode through the deep trench isolation structure. An amplifier transistor is coupled to the deep trench isolation structure to generate amplified image data in response to the image charge read out from the photodiode through the capacitive coupling provided by the deep trench isolation structure. A row select transistor is coupled to an output of the amplifier transistor to selectively output the amplified image data to a column bitline coupled to the row select transistor.

Abstract: An image sensor includes a photosensing element for receiving infrared (IR) radiation and detecting the IR radiation and generating an electrical signal indicative of the IR radiation. A redistribution layer (RDL) is disposed under the photosensing element, the RDL comprising pattern of conductors for receiving the electrical signal. An IR reflection layer, an IR absorption layer or an isolation layer is disposed between the photosensing element and the RDL. The IR reflection layer, IR absorption layer or isolation layer provides a barrier to IR radiation such that the IR radiation does not impinge upon the RDL. As a result, a ghost image of the RDL is not generated, resulting in reduced noise and improved sensitivity and performance of the image sensor.

Abstract: A method of reading out a pixel includes resetting a photodetector of the pixel. Light incident on the photodetector is then integrated for a single exposure of a single image capture. A floating diffusion node of the pixel is then reset. The floating diffusion is set to low conversion gain and a low conversion gain reset signal is sampled from the floating diffusion node. The floating diffusion is set to high conversion gain and a high conversion gain reset signal is sampled from the floating diffusion node. Charge carriers are transferred from the photodetector to the floating diffusion node and a high conversion image signal is then sampled from the floating diffusion node. The floating diffusion is set to low conversion gain. Charge carriers are transferred again from the photodetector to the floating diffusion node and a low conversion image signal is sampled from the floating diffusion node.

Abstract: An intermediate integrated circuit die of a stacked integrated circuit system includes an intermediate semiconductor substrate including first polarity dopants is thinned from a second side. A first well including first polarity dopants is disposed in the intermediate semiconductor proximate to a first side. A second well including second polarity dopants is disposed in the intermediate semiconductor substrate proximate to the first side. A deep well having second polarity dopants is disposed in the intermediate semiconductor substrate beneath the first and second wells. An additional implant of first polarity dopants is implanted into the intermediate semiconductor substrate between the deep well and the second side of the intermediate semiconductor substrate to narrow a depletion region overlapped by the additional implant of first polarity dopants. The depletion region is between the deep well and the second side of the intermediate semiconductor substrate.

Abstract: A method of implementing extended range successive approximation analog-to-digital converter (ADC) starts with a readout circuitry acquiring an image data from a row in a color pixel array. ADC circuitry in the readout circuitry then generates an ADC pedestal for the row. Successive Approximation Register (SAR) included in ADC circuitry then stores ADC pedestal. SAR includes a plurality of bits and an additional bit that is a duplicate of one of the plurality of bits. ADC circuitry samples the image data from the row against ADC pedestal stored in SAR to obtain a sampled input data. ADC circuitry then converts the sampled input data from analog to digital to obtain an ADC output value. Other embodiments are described.

Abstract: An apparatus includes an image sensor partitioned into N image sensor regions. The image sensor is attached to a circuit board. A lens array having including N lenses is disposed proximate to the image sensor. Each one of the N lenses is arranged to focus a single image onto a respective one of the N image sensor regions. A spacer structure is stacked between to the lens array and the circuit board to separate the lens array from the image sensor, wherein the spacer structure surrounds a perimeter around all of the N image sensor regions and N lenses such that none of the spacer structure is disposed between any of the N lenses and N image sensor regions of the image sensor.

Abstract: An image sensor, readout circuitry for an image sensor, and a method of operating readout circuitry are disclosed. Readout circuitry includes an analog-to-digital-converter (“ADC”) including input stage circuitry with a first selectable input and a second selectable input. The ADC is coupled to sequentially receive a first reset signal, a second reset signal, a high gain image signal, and a low gain image signal, in that order. The input stage circuitry is configured to select the first selectable input when receiving the first reset signal and the low gain image signal and select the second selectable input when receiving the second reset signal and the high gain image signal.

Abstract: A low-profile hybrid lens system, for imaging a scene onto an image plane, includes (a) a wafer-level lens with (i) a planar substrate having opposing first and second surfaces, (ii) a first lens element of a first material and disposed on the first surface, and (iii) a second lens element of a second material and disposed on the second surface; (b) a first cast lens; and (c) a second cast lens; wherein the wafer-level lens, the first cast lens, and the second cast lens are optically coupled in series. A method for manufacturing a low-profile hybrid lens system includes mounting a wafer-level lens, a first cast lens, and a second cast lens in a fixture to optically couple, in series, the wafer-level lens and the first and second cast lenses.

Abstract: A ramp generator includes a supply voltage sampling circuit coupled to sample a black signal supply voltage during a black signal readout, and an image signal supply voltage of the pixel cell during an image signal readout of a pixel cell. A first integrator circuit receives a buffered reference voltage, and an output of the supply voltage sampling circuit. First and second switches are coupled between the first integrator circuit and a first capacitor to transfer a signal representative of a difference between the image signal supply voltage and the black signal supply voltage to the first capacitor. A second integrator circuit is coupled to the first capacitor to generate an output ramp signal coupled to be received by an analog to digital converter. A starting value of the output ramp signal is adjusted in response to the difference between the image signal and the black signal supply voltage.

Abstract: A reduced random telegraph signal (RTS)-noise CMOS image sensor includes a pixel and a correlated double sampling (CDS) circuit electrically connected to the pixel. The CDS circuit is characterized by a CDS period that includes a reference sample period and an image data sample period. The image sensor also includes a bitline, a bitline connection switch between the pixel and a readout circuit connected to the pixel, and a bitline switch controller. The bitline transmits a transfer gate signal as a bitline signal having a non-zero value during a first time period entirely between the reference sample period and the image data sample period. The bitline switch controller is electrically connected to and configured to control the bitline connection switch such that the bitline connection switch is closed during the entire CDS period except for a single continuous open period that includes the first time period.

Abstract: A method of fabricating an image sensor includes forming a pixel array in an imaging region of a semiconductor substrate and forming a trench in a peripheral region of the semiconductor substrate after forming the pixel array. The peripheral region is on a perimeter of the imaging region. The trench is filled with an insulating material. An interconnect layer is formed after filling the trench with insulating material. A first wafer is bonded to a second wafer. The first wafer includes the interconnect layer and the semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the insulating material. A via cavity is formed through the insulating material. The via cavity extends down to a second interconnect layer of the second wafer. The via cavity is filled with a conductive material to form a via. The insulating material insulates the conductive material from the semiconductor substrate.

Abstract: A method of forming microlenses for an image sensor having at least one large-area pixel and at least one small-area pixel is disclosed. The method includes forming a uniform layer of microlens material on a light incident side of the image sensor over the large-area pixel and over the small-area pixel. The method also includes forming the layer of microlens material into a first block disposed over the large-area pixel and into a second block disposed over the small-area pixel. A void is also formed in the second block to reduce a volume of microlens material included in the second block. The first and second blocks are then reflowed to form a respective first microlens and second microlens. The first microlens has substantially the same effective focal length as the second microlens.

Abstract: An infrared cut filter may be used with an image sensor to remove infrared light components from image light received from a first side of the infrared cut filter prior to the image light reaching the image sensor to be disposed on a second side of the infrared cut filter. The infrared cut filter includes at least one red absorbing layer and an infrared reflector. The at least one red absorbing layer partially absorbs red light components within the image light. The infrared reflector reflects the infrared light components. The infrared reflector is disposed between the red absorbing layer and the first side of the infrared cut filter while the at least one red absorbing layer is disposed between the infrared reflector and the second side of the infrared cut filter.

Abstract: A wafer-level lens system includes one or more wafer-level lenses, each of the one or more wafer-level lenses having a substrate with opposing first and second surfaces, a first lens element of a first material and disposed on the first surface, and a second lens element of a second material and disposed on the second surface, wherein, for at least one of the one or more wafer-level lenses, the first material is different from the second material. Another wafer-level lens system includes three wafer-level lenses optically coupled in series with each other, each of the three wafer-level lenses having a substrate with opposing first and second surfaces, a first lens element disposed on the first surface and having an aspheric surface facing away from the first surface, and a second lens element disposed on the second surface and having an aspheric surface facing away from the second surface.

Abstract: An apparatus including a pixel array including a plurality of pixels and a filter array positioned over the pixel array, the color filter array comprising a plurality of tiled minimal repeating units, each minimal repeating unit including a plurality of enmeshed filter sets, each filter set including a different set of colors than any other filter set in the filter array. Other embodiments are disclosed and claimed.

Abstract: Implementations of a color filter array comprising a plurality of tiled minimal repeating units. Each minimal repeating unit includes at least a first set of filters comprising three or more color filters, the first set including at least one color filter with a first spectral photoresponse, at least one color filter with a second spectral photoresponse, and at least one color filter with a third spectral photoresponse; and a second set of filters comprising one or more broadband filters positioned among the color filters of the first set, wherein each of the one or more broadband filters has a fourth spectral photoresponse with a broader spectrum than any of the first, second, and third spectral photoresponses, and wherein the individual filters of the second set have a smaller area than any of the individual filters in the first set. Other implementations are disclosed and claimed.