Patents Assigned to PMC-Sierra
  • Patent number: 7733149
    Abstract: A programmable delay element, variable-length delay chain, and ring oscillator are disclosed. The programmable delay element performs phase interpolation of input signals in response to a control signal and can be used in combination with other delay elements to create a highly-modular, variable-length delay chain or ring oscillator. The ring oscillator can be used as part of a digitally-controlled oscillator (DCO) in a digital clock synthesizer to adjust the frequency and phase of a clock signal by fractional unit delay steps. Optionally, the programmable delay element utilizes current-mode logic (CML) and the control signal is a thermometer coded digital signal. Within the variable-length delay chain, some programmable delay elements can be configured to scale the delay-step of other programmable delay elements so that a plurality of step sizes can be implemented with identical delay elements.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: June 8, 2010
    Assignee: PMC-Sierra, Inc.
    Inventors: Jean-Francois Delage, Hormoz Djahanshahi, Guillaume Fortin
  • Patent number: 7724781
    Abstract: A receive virtual concatenation processor (processor) is adapted to receive time-slot interleaved data carried over SONET/SDH frames. The processor first generates per time-slot data and subsequently generates per channel data. The processor supports virtual concatenation, contiguous concatenation as well as mixed concatenation in which some channels are contiguously concatenated and others are virtually concatenated. The processor supports virtual concatenation at both STS-1 and STS-3c granularities and with arbitrary differential delay among constituent time-slots. The processor supports contiguous concatenation with any multiple of STS-3c granularity. The processor is highly scalable to support multiple channels and different frame sizes such as STS-12, STS-48, STS-192, etc.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: May 25, 2010
    Assignee: PMC-Sierra, Inc.
    Inventors: Zhao Wu, Heng Liao
  • Patent number: 7719806
    Abstract: A negative electrostatic discharge (ESD) protection network or circuit is described. The circuit can provide protection against a negative-going ESD transient. One embodiment, along with standard positive ESD protection networks, can discharge ESD currents in both polarities and is able to tolerate a positive/negative voltage that is higher than the maximum voltage allowed for the given fabrication process. It can be used to protect an I/O pin that can be exposed to a relatively wide signal swing range.
    Type: Grant
    Filed: February 7, 2007
    Date of Patent: May 18, 2010
    Assignee: PMC-Sierra, Inc.
    Inventors: Graeme B. Boyd, Xun Cheng, Bijit Patel
  • Publication number: 20100118753
    Abstract: A system and method for power saving in IEEE 802-style and ITU-T G.984-style networks overcomes the limitations of conventional techniques using information from user and network devices for initiating power savings by the user or network device, enabling power savings on links such as optical networks. This innovative technique provides a system and method for communications between user and network devices, facilitating either the user or network device initiating a sleep mode for the user device. The implementation of a sleep mode in a device allows powering down of the device's transmitter and receiver for a specified length of time, during which the transmitter and receiver (also referred to as the physical interface of the device) consume diminished power.
    Type: Application
    Filed: January 25, 2010
    Publication date: May 13, 2010
    Applicant: PMC Sierra Ltd.
    Inventors: Jeff MANDIN, Lior Khermosh
  • Patent number: 7714643
    Abstract: Apparatus and methods tune analog filters that are parts of systems. When an analog filter is inserted into a system, the analog filter can be difficult to tune because of the difficulty in observing the analog filter's characteristics without being interfered by other circuits in the system. In one embodiment, analog filters are bypassed, and a response is determined. To this response, a time-invariant digital filter is applied to generate a reference response, such as an ideal response. The analog filters are then enabled and adjusted so that the difference between the response of the system and the reference response is minimized. This technique can be applied to arbitrary-order analog filters and can be used even when other circuits affect the observed filter response.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: May 11, 2010
    Assignee: PMC-Sierra, Inc.
    Inventors: Nanyan Wang, Soon Sun Shin
  • Publication number: 20100106959
    Abstract: A data encryption-decryption method for enhancing the confidentiality of data transmitted between two, first and second communication network entities including the steps of: at the first network entity, performing a quadruple-churning operation on a byte N to obtain an encrypted byte N, the quadruple-churning operation including: performing a first churning operation to obtain a first churned output; bit-wise XORing the first churned output with two values to obtain a first XOR result; bit-swapping the first XOR result; performing a second churning and XORing stages to obtain a second XOR result; performing a third churning and XORing stages to obtain a third XOR result; bit swapping the third XOR result; and performing a fourth churning operation on the third bit-swapped XOR result to obtain encrypted byte N; and transmitting the encrypted byte N to the second network entity.
    Type: Application
    Filed: November 24, 2009
    Publication date: April 29, 2010
    Applicant: PMC Sierra Ltd.
    Inventors: Onn Haran, Lior Khermosh
  • Patent number: 7688843
    Abstract: A method for registration of multiple entities belonging to a specific optical networks unit (ONU). In one embodiment, the multiple entity registration method comprises checking by an optical line terminal (OLT) if a registration request message received from the specific ONU belongs to a certain grant, and based on the check result, registering an entity as either a first or as an additional entity of the specific ONU. In another embodiment, the method comprises checking by an OLT of a reserved value of a flags field inside a registration request message, and based on the check result, registering an entity as either a first or as an additional entity of the specific ONU. The knowledge by an OLT that multiple entities belong to a specific ONU is used for grant optimization and packet data flow optimization.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: March 30, 2010
    Assignee: PMC-Sierra Israel Ltd.
    Inventors: Onn Haran, Ariel Maislos, Lior Khermosh
  • Patent number: 7679448
    Abstract: A biasing circuit and method for minimizing distortion in a MOS transistor. A first CW source provides a first CW signal at the input of a replica transistor to obtain an output signal at the output of the replica transistor. The output signal is mixed with another CW signal having a frequency equal to N times that of the first CW signal, N being an integer greater than one, to obtain a mixed signal having a DC component with an intensity proportional to the Nth-order distortion present in the output signal. A bias voltage to minimize this distortion is then applied to the input of the original transistor on which the replica transistor is based, the bias voltage determined in accordance with the intensity of the DC component.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: March 16, 2010
    Assignee: PMC-Sierra, Inc.
    Inventors: Matthew W. McAdam, Francis Beaudoin
  • Patent number: 7668925
    Abstract: A method and apparatus are provided for routing in an SAS expander for logical zoning. Common SAS topology defined by the ANSI T10 specification only relates to physical topology with multiple end devices, as well as to expander devices and the broadcast handling mechanisms in such physical topologies. The present invention introduces the concept of virtual topologies that can be non-overlapping or overlapping subsets of the physical topology and the routing mechanism that handles the routing issues with the virtual topologies.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: February 23, 2010
    Assignee: PMC-Sierra, Inc.
    Inventors: Heng Liao, Larrie Simon Carr
  • Patent number: 7668210
    Abstract: A method and apparatus are provided for reducing current demand variations in large fanout trees. The fanout tree is split into at least 2 sub-groups, each preferably with substantially equal parasitic capacitance. Data is then scrambled according to a scrambling sequence function to provide scrambled data having a constant number of bits that are toggled with respect to time, such as when observed in pairs of sub-groups. Functionally, an apparatus according to an embodiment of the present invention includes 3 blocks: a scrambler, egress logic, and a de-scrambler. The egress logic is simply a block of storage that can reorder the bytes received from the scrambler. The de-scrambler de-scrambles the retransmitted data based on the scrambling sequence function. Embodiments of the present invention can be applied to any system where data must fanout from a single source to many destinations, such as switches.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: February 23, 2010
    Assignee: PMC-Sierra, Inc.
    Inventors: Winston Ki-Cheong Mok, Scott A. Muma, Nicholas W. Rolheiser
  • Patent number: 7664028
    Abstract: A system and/or method for metering and marking packets of data incoming into a communication system having in some embodiments primary and secondary meter selectors, primary and secondary metering processors and a pipeline and wrapper interface controller. Further methods involve measuring an incoming microflow against one or two specified temporal profiles using a two-level metering hierarchy.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: February 16, 2010
    Assignee: PMC-Sierra Ltd.
    Inventors: Sylvain Gingras, Scott Reynolds
  • Publication number: 20100027997
    Abstract: In a passive optical network, dynamic bandwidth allocation and queue management methods and algorithms, designed to avoid fragmentation loss, guarantee that a length of a grant issued by an OLT will match precisely the count of bytes to be transmitted by an ONU. The methods include determining an ONU uplink transmission egress order based on a three-stage test, and various embodiments of methods for ONU report threshold setting.
    Type: Application
    Filed: July 30, 2009
    Publication date: February 4, 2010
    Applicant: PMC Sierra Ltd.
    Inventors: Onn HARAN, Ariel MAISLOS, Barak LIFSHITZ
  • Patent number: 7656791
    Abstract: Disclosed techniques include a method and apparatus that allow traffic to be switched between a working copy and a protected copy hitlessly. The control method simplifies implementation by advantageously distinguishing points within the apparatus wherein the working and protect streams should be virtually identical and aligned and points where the streams need only be identical but are tolerant of skew.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: February 2, 2010
    Assignee: PMC-Sierra, Inc.
    Inventors: Winston Ki-Cheong Mok, Pascal Routhier
  • Patent number: 7656945
    Abstract: A low-complexity digital linear equalizer whose operation and adaptation makes stabilized digital timing recovery practical. The technique is fundamental for the operation of communications receivers employing digital timing recovery, e.g., in a modem. A technique for automatically adjusting the parameters of a digital linear equalizer to compensate for low-pass impairments while maintaining a relatively constant timing characteristic is described.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: February 2, 2010
    Assignee: PMC-Sierra, Inc.
    Inventors: William D. Warner, Paul V. Yee
  • Patent number: 7656227
    Abstract: Methods and apparatus control the gain of an RF amplifier. In an example, the RF amplifier is biased for low distortion. The bias is not changed to adjust gain. Rather, the amplifier's gain is controlled by selectively activating or deactivating RF amplifier cells of the RF amplifier. This individual RF amplifier cells to be biased for good linearity and relatively good spectral performance, while permitting gain control.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: February 2, 2010
    Assignee: PMC-Sierra, Inc.
    Inventors: Francis Beaudoin, Matthew McAdam
  • Patent number: 7646870
    Abstract: A data encryption-decryption method includes the steps of receiving a data byte N and performing a triple-churning operation on byte N to obtain an encrypted byte N. Preferably, the triple-churning operation includes performing a first churning operation to obtain a first churned output, bit-wise XORing the first churned output with two values to obtain a first XOR result, performing a second churning operation on the first XOR result to obtain a second churned output, bit-wise XORing the second churned output with two values to obtain a second XOR result, and performing a third churning operation on the second XOR result to obtain encrypted byte N.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: January 12, 2010
    Assignee: PMC-Sierra Israel Ltd.
    Inventor: Onn Haran
  • Patent number: 7646063
    Abstract: Transistor structures for relatively even current balancing within a device and methods for fabricating the same are disclosed. These devices can be used in relatively compact MOSFET Electrostatic Discharge (ESD) protection structures, such as in snapback devices. One embodiment utilizes a salisided exclusion layer for segmentation of the source and/or drain diffusion areas, while the others utilize poly for segmentation of the source and/or drain area. Also, diffusion is used generically herein and, for example, includes implants. These techniques provide relatively good ESD tolerance while consuming a relatively small amount of area, and provide significant area and parasitic capacitance reduction over the state of the art without sacrificing ESD performance. These techniques are also applicable to current balancing within relatively high current devices, such as drivers.
    Type: Grant
    Filed: June 12, 2006
    Date of Patent: January 12, 2010
    Assignee: PMC-Sierra, Inc.
    Inventors: Graeme B. Boyd, William M. Lye, Xun Cheng
  • Patent number: 7639693
    Abstract: A method or system or apparatus provides improved data handling. In one aspect, destination scheduling is performed by scheduling polling rather than scheduling data emissions. In particular aspects, a scheduler assigns a weight and sequence number to each destination and tracks a port segment count and schedules polling of ports using these parameters.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: December 29, 2009
    Assignee: PMC - Sierra Ltd.
    Inventors: Neil Jason Lewis, Lawrence Chee
  • Publication number: 20090309638
    Abstract: A programmable delay element, variable-length delay chain, and ring oscillator are disclosed. The programmable delay element performs phase interpolation of input signals in response to a control signal and can be used in combination with other delay elements to create a highly-modular, variable-length delay chain or ring oscillator. The ring oscillator can be used as part of a digitally-controlled oscillator (DCO) in a digital clock synthesizer to adjust the frequency and phase of a clock signal by fractional unit delay steps. Optionally, the programmable delay element utilizes current-mode logic (CML) and the control signal is a thermometer coded digital signal. Within the variable-length delay chain, some programmable delay elements can be configured to scale the delay-step of other programmable delay elements so that a plurality of step sizes can be implemented with identical delay elements.
    Type: Application
    Filed: June 11, 2008
    Publication date: December 17, 2009
    Applicant: PMC-Sierra, Inc.
    Inventors: Jean-Francois Delage, Hormoz Djahanshahi, Guillaume Fortin
  • Patent number: 7633968
    Abstract: In a passive optical network, dynamic bandwidth allocation and queue management methods and algorithms, designed to avoid fragmentation loss, guarantee that a length of a grant issued by an OLT will match precisely the count of bytes to be transmitted by an ONU. The methods include determining an ONU uplink transmission egress order based on a three-stage test, and various embodiments of methods for ONU report threshold setting.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: December 15, 2009
    Assignee: PMC-Sierra Israel Ltd.
    Inventors: Onn Haran, Arifl Maislos, Barak Lifshitz