Patents Assigned to Realtek Semiconductor
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Patent number: 12142412Abstract: An inductor device includes a first coil and a second coil. The first coil includes a first connection member and a plurality of first circles. At least two first circles of the first circles are located at a first area, and half of the first circle of the first circles is located at a second area. The second coil includes a second connection member and a plurality of second circles. At least two second circles of the second circles are located at the second area, and half of the second circle of the second circles is located at the first area. The first connection member is coupled to the at least two first circles and the half of the first circle. The second connection member is coupled to the at least two second circles and the half of the second circle.Type: GrantFiled: September 17, 2020Date of Patent: November 12, 2024Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventors: Cheng-Wei Luo, Chieh-Pin Chang, Kai-Yi Huang, Ta-Hsun Yeh
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Publication number: 20240373355Abstract: A method of operating a station multi-link device (STA MLD). The STA MLD includes N radio chains, M antennas and a processor. N and M are positive integers, M?N. The processor is coupled to the N radio chains. The method includes the processor setting the STA MLD to a multi-link multi-radio (MLMR) mode, the processor setting each radio chain as performing data transmissions via the M antennas, and the processor setting a power save mode of at least one radio chain to a doze state. The method further includes the processor allocating the M antennas to the N radio chains according to an application scenario, and the processor updating the N power save modes of the N radio chains according to the application scenario.Type: ApplicationFiled: April 17, 2024Publication date: November 7, 2024Applicant: Realtek Semiconductor Corp.Inventor: Hsin-Ta Huang
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Publication number: 20240370362Abstract: A data processing device includes a memory device, a central processing unit (CPU), and a data processing circuit. The memory device includes a first memory area and a second memory area, wherein the first memory area is arranged to store a first type of data, and the second memory area is arranged to store a second type of data. The CPU is coupled to the memory device, and is arranged to access the memory device, wherein the CPU accesses the first memory area and the second memory area of the memory device. The data processing circuit is coupled to the memory device, and is arranged to access the memory device, wherein the data processing circuit only accesses the first memory area of the memory device.Type: ApplicationFiled: April 16, 2024Publication date: November 7, 2024Applicant: Realtek Semiconductor Corp.Inventor: Yi-Lin Yang
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Patent number: 12134032Abstract: A player and a play method are capable of displaying image and/or playing music according to a ranging result. The player has a wireless communication function for establishing a wireless connection with a portable device. The player is configured to obtain a received signal strength index (RSSI) of the portable device according to a wireless signal from the portable device, then calculate an estimation distance between the player and the portable device according to the RSSI to obtain the ranging result, and then determine at least one play parameter such as the brightness or the volume of the player according to the ranging result.Type: GrantFiled: March 3, 2022Date of Patent: November 5, 2024Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventor: Xin Xu
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Patent number: 12136919Abstract: The present disclosure discloses a pre-driver circuit and a driving device. The pre-driver circuit includes a first transistor, a second transistor, and a resistive component. The first transistor has a first terminal coupled to a first voltage, a second terminal for outputting a pre-driving signal, and a control terminal for receiving a first control signal. The second transistor has a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to a second voltage, and a control terminal for receiving the first control signal. The resistive component has a first terminal coupled to the first terminal of the second transistor, and a second terminal coupled to the second terminal of the second transistor. One of the first transistor and the second transistor is a P-type transistor, and the other is an N-type transistor.Type: GrantFiled: September 28, 2022Date of Patent: November 5, 2024Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventors: Yi Ting Liu, Zhixian Gao
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Publication number: 20240364706Abstract: A communication device includes a transceiver and a control circuit. The control circuit determines whether to transmit a second MKPDU in advance according to a member identifier of a peer device carried by a received first MKPDU and one or more lists maintained by the communication device. When the member identifier of the peer device is not recorded in the one or more lists, the control circuit determines to transmit the second MKPDU in advance. When the control circuit determines to transmit the second MKPDU in advance, the control circuit generates the second MKPDU, encodes the second MKPDU to generate a frame, and transmits a signal carrying the frame through the transceiver, wherein a time interval between the transmission of the signal and a previous transmission performed by the transceiver is less than a predetermined transmission period.Type: ApplicationFiled: March 12, 2024Publication date: October 31, 2024Applicant: Realtek Semiconductor Corp.Inventors: Yu-Fei Chou, Yang-Lin Cheng, Ming-Dao Chen, Jang-Ming Li
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Publication number: 20240363089Abstract: The present invention provides a control method of a display device, wherein the control method includes the steps of: connecting to an electronic device by using a first communication module, and receiving video signals from the electronic device to display on a display panel; and connecting to the electronic device by using a wireless communication module; and receiving a first control signal from an input device through a second communication module, generating a second control signal according to the first control signal, and transmitting the second control signal to the electronic device through the wireless communication module to control an operation of the electronic device.Type: ApplicationFiled: September 6, 2023Publication date: October 31, 2024Applicant: Realtek Semiconductor Corp.Inventors: Chen-Wei Liu, Yun-Ting Tsai
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Publication number: 20240364312Abstract: A termination circuit of a receiver is provided. The termination circuit includes an input resistor, a capacitor, a first resistor, a second resistor, a third resistor and a bias signal generator. The input resistor is coupled between an input terminal of the termination circuit and a first reference voltage. The capacitor is coupled between a first node of the termination circuit and an output terminal of the termination circuit. The first resistor is coupled between the first node and a second node of the termination circuit. The second resistor is coupled between the second node and the output terminal. The third resistor is coupled between the second node and a control terminal of the termination circuit. In addition, the bias signal generator is coupled to the control terminal, and generates a control signal positively correlated with a second reference voltage to the control terminal.Type: ApplicationFiled: April 22, 2024Publication date: October 31, 2024Applicant: Realtek Semiconductor Corp.Inventors: Jun Yang, JIAN LIU
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Publication number: 20240365209Abstract: A multi-link device includes a link information collecting module, a decision module, a control module, and a transceiver module. The link information collecting module collects wireless environment information and packet transmission information for each channel in the M channels, generates a set of feature scores of each channel, and outputs M sets of feature scores of the M channels. The decision module generates a latency score according to data transmission requirements of a data transmission, if the latency score exceeds a latency threshold, determines whether there are 2 channels satisfying a latency criterion according to the M sets of feature scores of the M channels, and outputs a decision report according to whether there are 2 channels satisfying the latency criterion. The control module configures the transceiver module according to the decision module. The transceiver module performs the data transmission.Type: ApplicationFiled: January 10, 2024Publication date: October 31, 2024Applicant: Realtek Semiconductor Corp.Inventors: Chun-Kai Tseng, Ya-Xin Dai
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Patent number: 12131488Abstract: A method used for object tracking includes: using a specific object model to generate a first vector of a first ratio object and a second vector of a second ratio object of an image in an object detection bounding box of a specific frame; generating an identity label of an object within the bounding box according to the first vector, the second vector, and M first ratio reference vectors and M second ratio reference vectors stored in an object vector database.Type: GrantFiled: March 3, 2022Date of Patent: October 29, 2024Assignee: Realtek Semiconductor Corp.Inventors: Chih-Wei Wu, Chien-Hao Chen, Chao-Hsun Yang, Shih-Tse Chen
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Patent number: 12132045Abstract: A semiconductor capacitor array layout generates parasitic capacitance toward an edge of the layout to reduce a capacitance difference between an outer capacitor unit and an inner capacitor unit. The semiconductor capacitor array layout includes a primary capacitor structure and an outer capacitor structure. Each of the primary capacitor structure and the outer capacitor structure includes a first crisscross structure and a second crisscross structure that are staggered. Each of the first crisscross structure and the second crisscross structure includes longitudinal conductive strips and lateral conductive strips, wherein the longitudinal conductive strips are disposed in a first integrated circuit (IC) layer and the lateral conductive strips are disposed in a second IC layer. The second crisscross structure of the primary capacitor structure and the first crisscross structure of the outer capacitor structure jointly generate the parasitic capacitance.Type: GrantFiled: June 1, 2023Date of Patent: October 29, 2024Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventor: Shih-Hsiung Huang
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Publication number: 20240357679Abstract: A wireless communication method capable of supporting the multi-link operation mode includes establishing a data connection between a wireless access device and a wireless terminal device through a first link and a second link, identifying the first link and the second link, acquiring link status information of the first link and the second link, and allocating uplink transmission data, downlink transmission data, or a data link layer management flow to the first link and the second link by the wireless access device according to the link status information of the first link and the second link. The first link and the second link have different frequencies.Type: ApplicationFiled: April 2, 2024Publication date: October 24, 2024Applicant: Realtek Semiconductor Corp.Inventor: Hsiu-Ming Tu
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Patent number: 12124307Abstract: A media streaming device includes a power manager, a stream processor, and a voltage detector. The power manager receives a power signal from the media playback device to supply power to the stream processor. The stream processor provides media stream to the media playback device for playback. The voltage detector is electrically coupled to the stream processor and captures at least a part of the power supply current to the stream processor. The stream processor is configured to determine whether the power supply voltage remains stable. When the supply voltage remains stable, the stream processor operates in a first mode to provide media stream. When the power supply voltage is unstable, the stream processor operates in a second mode to provide media stream, and the power consumption of the stream processor in the second mode is lower than the power consumption in the first mode.Type: GrantFiled: August 23, 2022Date of Patent: October 22, 2024Assignee: Realtek Semiconductor CorporationInventors: Chao-Min Lai, Chia-Chi Yeh, Chieh-Lung Hsieh, Chih-Feng Lin
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Patent number: 12127040Abstract: The present invention discloses a communication method having data transmission sorting mechanism. Whether an object under process is a mobile terminated object is determined. When the object under process is the mobile terminated object, a processing priority is set to be the highest priority, a receiving process is performed and response content is generated when required. When the object under process is a mobile originated object, a transmission process is performed, the processing priority is set according to a processing priority setting of a related transmission entity and the mobile originated object is added to a transmission list. When an object transmission is not able to be performed, the response content is added to a response list. When the object transmission is able to be performed, the response content in the response list is transmitted first and the mobile originated object in the transmission list is transmitted subsequently.Type: GrantFiled: May 16, 2022Date of Patent: October 22, 2024Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventors: Chin Cheng, Yi-Xin Huang, Xiao-Lu Ma
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Patent number: 12126353Abstract: The present invention discloses an analog-to-digital conversion circuit having quick tracking mechanism is provided. A positive and a negative capacitor arrays receive a positive and a negative input voltages and output a positive and a negative output voltages. A first and a second comparators performs comparison thereon respectively according to and not according to a reference voltage to generate a first and a second comparison results. A control circuit does not perform level-shifting when a difference between the positive and the negative output voltages is not within a predetermined range. The control circuit assigns the positive and the negative capacitor arrays a voltage up-tracking direction and a voltage down-tracking direction respectively to switch a capacitor enabling combination with digital codes according to the second comparison result, and outputs the digital codes as a digital output signal when the positive and the negative output voltages equal.Type: GrantFiled: September 15, 2022Date of Patent: October 22, 2024Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventor: Wei-Cian Hong
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Patent number: 12126342Abstract: A method of phase detection includes receiving a reference clock and an input clock having a first input signal and a second input; sampling the first input signal and the second input signal into a first sample and a second sample; converting the first sample and the second sample into a first current and a second current; using a regulated current mirror to convert the first current into the third current; using a first current steering network to steer the second current into either a fourth current or a fifth current in accordance with a pulse signal; using a second current steering network to steer the third current into either a sixth current or a seventh current; connecting a lowpass filter to the output node to establish an output voltage and a lowpass-filtered voltage; and forcing the standby voltage to be equal to the lowpass-filtered voltage using a unity-gain buffer.Type: GrantFiled: June 13, 2023Date of Patent: October 22, 2024Assignee: REALTEK SEMICONDUCTOR CORP.Inventor: Chia-Liang (Leon) Lin
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Patent number: 12125306Abstract: A method of performing person re-identification includes: obtaining a person feature vector according to an extracted image containing a person; obtaining state information of the person according to a state of the person in the extracted image; comparing the person feature vector with a plurality of registered person feature vectors in a database; when the person feature vector successfully matches a first registered person feature vector of the plurality of registered person feature vectors, identifying the person as a first identity corresponding to the first registered person feature vector; and selectively utilizing the person feature vector to update one of the first registered person feature vector and at least one second registered person feature vector that correspond to the first identity according to the state information.Type: GrantFiled: March 3, 2022Date of Patent: October 22, 2024Assignee: Realtek Semiconductor Corp.Inventors: Chien-Hao Chen, Chao-Hsun Yang, Chih-Wei Wu, Shih-Tse Chen
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Publication number: 20240345724Abstract: A data receiving method, applied to a first electronic device and a second electronic device, comprising: (a) generating a plurality of counting values via a counter circuit; (b) receiving alignment data stored in the second electronic device by the first electronic device; (c) sampling the alignment data by a sampler circuit in the first electronic device to generate a plurality of sampling values; (d) deciding a sampling point and a sampling period of the sampler circuit according to the sampling values and the counting values; and (e) sampling other data transmitted by the second electronic device by the sampler circuit according to the sampling point and the sampling period.Type: ApplicationFiled: April 2, 2024Publication date: October 17, 2024Applicant: Realtek Semiconductor Corp.Inventors: Lien-Hsiang Sung, Wun-Lin Chang
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Patent number: 12120311Abstract: The present invention provides an encoder including a quantization circuit, an encoding circuit, an energy parameter calculation circuit and a quantization parameter determination circuit. The quantization circuit is configured to perform quantization operations on a plurality of CTUs in image data in sequence to generate quantized data respectively corresponding to the plurality of CTUs. The encoding circuit is configured to perform encoding operations on the quantized data of the plurality of CTUs in sequence to generate encoded data. The energy parameter calculation circuit is configured to receive the image data, and calculate a plurality of energy parameters respectively corresponding to the plurality of CTUs in the image data. The quantization parameter determination circuit is configured to determine a plurality of quantization parameters of the plurality of CTUs according to at least a portion of the plurality of energy parameters, for the quantization circuit to perform the quantization operations.Type: GrantFiled: February 8, 2023Date of Patent: October 15, 2024Assignee: Realtek Semiconductor Corp.Inventors: Weimin Zeng, Chi-Wang Chai, Wei Li, Wujun Chen, Wei Pu
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Patent number: 12119802Abstract: A radio frequency transceiver device includes an antenna unit, a first matching circuit, a receiver circuit, a second matching circuit, a transmitter circuit, and an auxiliary circuit. The receiver circuit includes a mixer unit. The auxiliary circuit includes a first transformer coil and a second transformer coil. The first matching circuit and the receiver circuit are configured to form a first signal reception channel to receive, process, and transmit the first radio frequency signal to the mixer unit when the first radio frequency signal is a high gain radio frequency signal. The second matching circuit and the auxiliary circuit are configured to form a second signal reception channel to receive, process, and transmit the first radio frequency signal to the mixer unit when the first radio frequency signal is a middle-low gain radio frequency signal. Another radio frequency signal transceiver device further includes a third matching circuit.Type: GrantFiled: June 2, 2022Date of Patent: October 15, 2024Assignee: REALTEK SEMICONDUCTOR CORP.Inventors: Chia-Yi Lee, Kuan-Yu Shih, Chia-Jun Chang