Abstract: A wireless communication device for concurrently receiving multiple types of signals and associated methods are provided. The wireless communication device includes at least one low noise amplifier (LNA), a first conversion circuit, a second conversion circuit, a first filter and a second filter. The at least one LNA amplifies an initial signal received by an antenna to generate at least one input signal, wherein the first conversion circuit and the second conversion circuit perform conversion operations according to the at least one input signal to generate a first converted signal and a second converted signal, respectively. More particularly, the first filter performs a filtering operation corresponding to a first-type signal upon the first converted signal, and the second filter performs a filtering operation corresponding to a second-type signal upon the second converted signal.

Abstract: Abstract of Disclosure An uplink scheduling method, for a computer communication network includes determining a ratio of a quantity of transport control protocol (TCP) data and a quantity of an acknowledgement (ACK) of the TCP according to information of a media access control (MAC) layer, system parameters of the MAC layer and transmission data of the computer communication network by a deep learning structure.

Abstract: An ambient light cancellation circuit functions as a Kth-order filter to filter out an ambient light signal of the detection signal, wherein the K is not fewer than two. The circuit includes a capacitive transimpedance amplifying circuit including an amplifier, a capacitor circuit, and a switch circuit. The capacitor circuit includes one or more capacitive paths coupled in parallel. The switch circuit couples the amplifier with the capacitor circuit in a non-cross manner or a cross manner. The non-cross manner is applied N times to let the capacitor circuit sample the detection signal N times while the detection signal includes a controllable-light signal and the ambient light signal; and the cross manner is applied M times to let the capacitor circuit sample the inversion of the detection signal M times while the detection signal includes the ambient light signal without the controllable-light signal, wherein (N+M) equals (K+1).

Abstract: An LED driver includes an operational amplifier (OP), N current driving circuits, and a resistor circuit. The OP compares a reference voltage with a feedback voltage to generate a control voltage. Each current driving circuit is coupled with an LED, and includes: an NMOS transistor including a drain, a source, and a gate, and being turned on according to the control voltage in an enablement mode and turned off according to the voltage of a ground terminal in a disablement mode, wherein the drain is coupled with the LED and the voltage at the source is the feedback voltage; and a switch circuit coupling the OP with the gate in the enablement mode, and coupling the ground terminal with the gate in the disablement mode. The resistor circuit is coupled between the source and the ground terminal and controls the current passing through the N current driving circuits.

Abstract: An inductor device includes a first wire, a second wire, a third wire, a fourth wire and an 8-shaped inductor structure. The first wire is disposed in a first area. The second wire is disposed in a second area. The third wire is disposed in the first area and at least partially overlapped with the first wire in a vertical direction. The third wire includes at least two third sub-wires, and the at least two third sub-wires are arranged with an interval between each other. The fourth wire is at least partially overlapped with the second wire in the vertical direction. The fourth wire includes at least two fourth sub-wires, and the at least two fourth sub-wires are arranged with an interval between each other. The eight-shaped inductor structure is disposed on an outer side of the third wire and the fourth wire.

Abstract: An image processing method includes: receiving an input image; performing a low-frequency image regulating operation to regulate the local intensity of the image of pixel unit(s) according to low-frequency information of the image of pixel unit(s) of the input image; performing a high-frequency image regulating operation to improve the details of the image of pixel unit(s) according to high-frequency information of the image of pixel unit (s) of the input image; and, generating an output image according to the input image, the low-frequency image regulating operation, and the high-frequency image regulating operation.

Abstract: A wireless transceiver having an in-phase quadrature-phase (IQ) calibration function includes a transmitter, a receiver, a signal generator, and a switch circuit. The switch circuit includes a first and a second switch circuits. The first switch circuit is turned on in a receiver-end calibration process, and outputs a predetermined signal from the signal generator to the transmitter. The second switch circuit is turned on in the receiver calibration process and outputs a derivative signal of the predetermined signal from the transmitter to the receiver to let the receiver performs a receiver-end IQ calibration accordingly. The first switch circuit is turned off and the second switch circuit is turned on in a transmitter-end calibration process; the second switch circuit outputs a radio-frequency signal from the transmitter to the receiver to let the receiver generates a calibration reference accordingly; and the transmitter performs a transmitter-end IQ calibration according to the calibration reference.

Abstract: The present invention discloses an image enlarging method having super resolution enlarging mechanism that includes the steps outlined below. An enlarging module of a neural network system receives an input image to generate an enlarged image. A front end convolutional path included in a neural network module of the neural network system receives the input image to perform convolution to generate a front end operation output result. Branching convolutional paths included in the neural network module respectively receive the front end operation output result to perform convolution to generate groups of output image residues. A mixing module of the neural network system weights the output image residues according to weighing settings related to image regions of the input image and mixes the weighted output image residues to generate a group of final output image residue such that an enhancement module enhances the enlarged image to generate an output enlarged image.

Abstract: A thermoelectric cooling chip including a substrate; a buffer layer on a surface of the substrate; a first etching stop layer on the buffer layer; a dielectric layer on the first etching stop layer; a first conductivity type semiconductor layer in the dielectric layer; a first wire layer in the dielectric layer and directly contacts the sidewall of the first conductivity type semiconductor layer; a second etching stop layer on the first conductivity type semiconductor layer; a second wire layer in the dielectric layer and the second etching stop layer and directly contacts the sidewall of the first conductivity type semiconductor layer; a second conductivity type semiconductor layer on the first conductivity type semiconductor layer; and a third wire layer on the second wire layer, and directly contacts the sidewall of the second conductive type semiconductor layer.

Abstract: A signal processing device includes a proprietary test mode symbol generating circuit, a decision error detection circuit, and a debug control circuit. The proprietary test mode symbol generating circuit generates prediction symbols as a reference signal according to decision symbols output by a slicer of a receiving signal processing circuit and a predetermined rule. The decision error detection circuit operating in a proprietary test mode continues receiving the decision symbols and the prediction symbols, and generates detection results. The debug control circuit includes a memory device, and continues recording contents of one or more signals obtained from one or more nodes of the receiving signal processing circuit into the memory device. In addition, the debug control circuit receives the detection results, and stops recording the contents of the one or more signals in response to a state of at least one of the detection results.

Abstract: A method of an integrated circuit chip, includes: calculating a first slope of distance-to-spatial relation under first design condition according to spatial distance difference between two circuit elements within integrated circuit chip and a spatial process variation under first design condition; calculating a second slope of the distance-to-spatial relation under a second design condition according to the spatial distance difference and a spatial process variation under second design condition; calculating a ratio coefficient and an exponential coefficient according to the first slope, the second slope, a global process variation under the first design condition, and a global process variation under the second design condition; calculating a third slope of the distance-to-spatial relation under a third design condition according to the ratio coefficient and the exponential coefficient; and estimating a spatial process variation under the third design condition according to the third slope and the spatial d

Abstract: A data read-write system includes a receiving terminal, a buffer, a memory and a writing module. The receiving terminal is used for receiving data, and the data includes a plurality of data blocks, and each data block is arranged into a two-dimensional matrix. The buffer includes a plurality of buffer blocks. The writing module includes a twisted block deinterleaving unit, a storage unit and an output unit. The twisted block deinterleaving unit reads each data block to obtain a plurality of first block strings. The storage unit distributes and stores the data blocks in each first block string in each buffer block. The output unit is used for outputting each data block in each buffer block to the memory for storage when the occupied capacity of each buffer block reaches an upper limit of a buffer capacity.

Abstract: The present invention discloses a digital-to-analog conversion apparatus having current source measuring mechanism. A digital-to-analog conversion circuit in turn sets one of thermo-controlled current sources as an initial current source to operate according to two specific input codewords included in an input digital signal to generate an output analog signal. The values of the output analog signal corresponding to the two specific input codewords have opposite signs and the same absolute value. An echo transmission circuit processes the output analog signal to generate an echo signal. An echo-canceling circuit processes the input digital signal according to echo-canceling coefficients to generate an echo-canceling signal and receives an error signal to converge the echo-canceling coefficients.

Abstract: A test method for a delay circuit and a test circuitry are provided. The test circuitry incudes the delay circuit that essentially includes multiple serially connected logic gates, a clock pulse generator at an input end of the delay circuit for generating one or more cycles of clock signals, and a counter at an output end of the delay circuit for counting the clock signals passing through the delay circuit. The test circuitry implements a test mode by switching lines to the clock pulse generator and the counter. The test circuitry relies on a comparison result of a counting result made by the counter and a number of the cycles of the clock signals to test any failure of the delay circuit.

Abstract: A method and a circuitry for exposure compensation applied to a high dynamic range video are provided. The circuitry is adapted to an image-acquisition device. In the method, when a video is received, the pixel values for each of the sequential frames can be obtained. Next, an exposure value ratio between two adjacent frames is obtained. A processor exposure value ratio of an image signal processor can be regarded as an initial exposure value ratio. A fixed adjustment ratio is used to control the image signal processor and an image sensor of the image-acquirement device so as to calculate an exposure value ratio for each of the frames. The exposure value ratio is referred to for performing the high dynamic range compensation for the frames so as to output an HDR video.

Abstract: A comparator-based switched-capacitor circuit has a first output terminal and a second output terminal, and includes a switch-capacitor network, a first current source, and a second current source. Each of the first current source and the second current source includes a first transistor, a second transistor, a capacitor, and a buffer circuit. The first transistor has a first source, a first drain, and a first gate. The first drain is coupled to the first output terminal, the first source is coupled to a reference voltage, and the first gate is coupled to the switch-capacitor network. The second transistor has a second source, a second drain, and a second gate. The second source is coupled to the first output terminal. The capacitor is coupled between the second gate and the second source. The buffer circuit is coupled between the second source and the second drain.

Abstract: A transformer device includes a first coil, a second coil, and a third coil. The first coil includes a first ring structure, a second ring structure, a first connecting portion, and a first terminal, in which the first terminal is arranged on the first connecting portion and is located at a central location between the first ring structure and the second ring structure, the first terminal is connected to the first ring structure through the first connecting portion in a first direction, and connected to the second ring structure through the first connecting portion in a second direction, and the first direction is the opposite of the second direction. The second coil is configured to couple the first ring structure. The third coil is configured to couple the second ring structure, in which the second coil and the third coil have the same structure.

Abstract: A Bluetooth communication system is provided, which comprises a Bluetooth host device and a Bluetooth device set. The connections between the Bluetooth host device and the Bluetooth device set complies with the specification of Bluetooth Low Energy Audio technology. The Bluetooth device set comprises at least a first member device and a second member device. The first member device and the second member device may be configured in a first mode wherein uplink audio signal transmission is allowed, and the connections are carried out by isochronous streaming channels respectively. The first member device transmits captured voice data to the Bluetooth host device, while the second member device does not. When an event is triggered, the first member device can notify the second member device through the Bluetooth host device, so that the first member device and the second member device can carry out subsequent voice input handover procedures.

Abstract: The present invention discloses a Bluetooth mesh network system having quick provisioning mechanism that includes an infrared control apparatus and nodes. The infrared control apparatus generates a provisioning activation infrared signal. Each of the nodes receives the provisioning activation infrared signal and generates a group key according to predetermined group number information thereof to perform communication according to the group key based on a Bluetooth mesh network communication protocol.

Abstract: An integrated circuit includes a power-on reset (POR) circuit, a watchdog timer, a first AND gate and a power management control circuit. The POR circuit is used to receive an input voltage to generate a POR signal and generate a clock signal. The watchdog timer is used to generate a timeout signal according to the clock signal when the POR signal has an enabling voltage, the clock signal enabling generation of timeout pulses in the timeout signal at predetermined time intervals. The first AND gate including a first input terminal for receiving the POR signal; a second input terminal for receiving the timeout signal; and an output terminal for outputting a reset signal according to the POR signal and the timeout signal. The power management control circuit is used to reset an output current in response to a reset pulse in the reset signal.