Abstract: A reference voltage generating circuit with extremely low temperature dependence is provided. The reference voltage generating circuit includes a BGR circuit which generates a bandgap reference voltage; a bandgap current generating circuit which generates a bandgap current according to the bandgap reference voltage; a PTAT current generating circuit which generates a current proportional to the absolute temperature; and a linear approximate correction current generating circuit which compares the current generated by the PTAT current generating circuit and the bandgap current to generate a correction current, and the BGR circuit adds, to the bandgap reference voltage, a correction voltage generated based on the correction current.

Abstract: In the manufacturing steps of a super-junction power MOSFET having a drift region having a super junction structure, after the super junction structure is formed, introduction of a body region and the like and heat treatment related thereto are typically performed. However, in the process thereof, a dopant in each of P-type column regions and the like included in the super junction structure is diffused to result in a scattered dopant profile. This causes problems such as degradation of a breakdown voltage when a reverse bias voltage is applied between a drain and a source and an increase in ON resistance. According to the present invention, in a method of manufacturing a silicon-based vertical planar power MOSFET, a body region forming a channel region is formed by selective epitaxial growth.

Abstract: One embodiment of the invention provides a method for determining a back-off window value for accessing a transmission channel. The method comprises receiving, at a first wireless node, a first set of time-varying parameters for at least one second wireless node; and using, by the first wireless node, the received first set of time-varying parameters at least partially and a second set of time-varying parameters of the first wireless node in determining a back-off window value for the first wireless node for accessing the transmission channel.

Abstract: A dimmer is provided that includes an MCU, a first power switch, and a pair of second power switches. The MCU is coupled to and configured to control the first power switch and the pair of second power switches, wherein the MCU is configured to activate the first power switch to conduct current to a load during a first continuous period of time. The MCU is also configured to alternately activate the pair of second power switches to conduct current to the load during a second continuous period of time. The MCU is configured to deactivate the pair of second power switches during the entire first period of time, and the MCU is configured to deactivate the first power switch during the entire first period of time. The first and second continuous periods do not overlap in time.

Abstract: A method of cleaning a semiconductor device that both inhibits dissolution of gate metal material and acquires favorable contact resistance. The gate of the device is multilayered, with stacked layers of metal and silicide beneath an insulation layer and atop a silicon substrate. A shared contact hole formed in the insulation layer exposes the silicide layer and multilayer gate from the insulation layer. The shared contact hole is subjected to sulfuric acid, aqueous hydrogen peroxide and APM cleaning processes, separately, to remove an altered layer that tends to form in the shared contact hole.

Abstract: A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a side wall portion of the protruding portion. A body trench 25 is formed in alignment with an adjacent gate electrode 16. A cobalt silicide film 28 is formed over a surface of the gate electrode 16 and over a surface of the body trench 25. A plug 34 is formed using an SAC technique.

Abstract: A method, apparatus and computer program product are provided to schedule the uplink grant in a manner that efficiently utilizes uplink resources. In the context of a method from the perspective of the user equipment, an indication regarding data to be transmitted is received and a scheduling request is caused to be provided via a control channel. The scheduling request is configured to indicate a size of the data to be transmitted. In response to a grant, data may be caused to be transmitted via allocated uplink resource blocks. In the context of a method from the perspective of a base station, a scheduling request including an indication of the requested size of the uplink grant is received via a control channel. The method may cause the grant to be provided to a user equipment and, in response, may receive data from the user equipment via allocated uplink resource blocks.

Abstract: In power residue calculation in a primality determination, in addition to the conventional randomization of an exponent, a modulus is also randomized. A random number generated by a random number generator is set to a randomizing number, and is input to a modulus generator and an exponent generator. The modulus generator and the exponent generator randomize a prime number candidate P using the randomizing number to generate a randomized modulus R1 and exponent R2. Using the randomized modulus R1 and exponent R2, the power residue calculation for primality determination is executed, and based on the result, the primality of the prime number candidate P is determined. The power consumption during the primality determination of a semiconductor device becomes noncorrelated with a value of a prime number candidate to be determined, and the leakage of a prime number due to side channel attacks can be prevented.

Abstract: A semiconductor device sends and receives electrical signals. The semiconductor device includes a first substrate provided with a first circuit region containing a first circuit; a multi-level interconnect structure provided on the first substrate; a first inductor provided in the multi-level interconnect structure so as to include the first circuit region; and a second inductor provided in the multi-level interconnect structure so as to include the first circuit region, wherein one of the first inductor and the second inductor is connected to the first circuit and the other of the first inductor and the second inductor is connected to a second circuit.

Abstract: There is provided an audio encoding apparatus that can avoid that audio data becomes irreproducible after fast-forward play. A quantization unit quantizes and buffers audio data into a buffer unit. A stream generating unit puts buffered audio data in a frame where there is a header related to the audio data in a stream and/or in one or plural frames preceding that frame. As for a predetermined frame, the stream generating unit puts in a data field of the frame the whole of an audio data piece related to a header included in that frame and puts audio sample data following that audio sample in a remaining part of the data field. As for a frame not a predetermined one, it puts in a data field of the frame an audio data piece related to a header included in that frame and/or audio data pieces following that audio data piece.

Abstract: A method, apparatus and computer program product are provided to provide network access credentials and network access to a remote device via a proxy device. In some example embodiments, a method is provided that comprises receiving a request for network access credentials from a remote device. In some example embodiments, the network access credentials comprise identification information related to at least one SIM. The method of this embodiment may also include determining whether network access credentials are available for the remote device. The method of this embodiment may also include causing the network access credentials to be provided to the remote device in an instance in which network access credentials are available for the remote device.

Abstract: A semiconductor storage device having tunnel magnetoresistive elements in memory cells. The array includes a memory array having a plurality of memory cells; a plurality of read-word-lines and a plurality of write-word-lines; a plurality of read-bit-lines; a plurality of first write-bit-lines and a plurality of second write-bit-lines; a first driver; a read circuit; a second driver; and a write circuit. The memory cell 1 has a mos transistor, one current electrode of which is coupled to the read-bit-line. A tunnel magnetoresistive element is coupled between a control electrode of the mos transistor and the read-word-line. A capacitive element coupled to the tunnel magnetoresistive element MTJ0 forms an RC circuit together with the tunnel magnetoresistive element.

Abstract: A semiconductor integrated circuit includes a plurality of output transistors each controlling the magnitude of an output voltage relative to the magnitude of a load current according to a control value indicated by an impedance control signal applied to a control terminal, a voltage monitor circuit outputting an output voltage monitor value indicating a voltage value of the output voltage, and a control circuit controlling the magnitude of the control value according to the magnitude of an error value between a reference voltage indicating a target value of the output voltage and the output voltage monitor value, and controls based on the control value whether any of such transistors be brought to a conducting state. The control circuit increases a change step of the control value relative to the error value during a predetermined period according to prenotification signals for notifying a change of the load current in advance.

Abstract: A circuit including an inverter is provided for a wiring layer. A semiconductor device is provided with a wiring layer circuit which is formed over an insulating film and includes at least one inverter element. The inverter is provided with a first transistor element and a resistance element which is connected to the first transistor via a connection node. The first transistor element is provided with a gate electrode which is embedded in an interlayer insulating film including the insulating film, a gate insulating film which is formed over the interlayer insulating film and the gate electrode, and a first semiconductor layer which is formed over the gate insulating film between a source electrode and a drain electrode. The resistance element is provided with a second semiconductor layer which functions as a resistance. The first semiconductor layer and the second semiconductor layer are formed in the same layer.

Abstract: Provided is a semiconductor integrated circuit including: an anti-fuse element that electrically connects a first node and a first power supply terminal when data is written and electrically disconnect the first node and the first power supply terminal when data is not written; a first switch circuit that is connected between the first node and a first data line applied with a predetermine first voltage, and enters an off state from an on state according to a first control signal; and a detection part that detects write data of the anti-fuse element according to whether a voltage of the first node is substantially the same as the first voltage or substantially the same as a supply voltage of the first power supply terminal when the first switch circuit enters the off state.

Abstract: First and second wireless transmission protocol uplink channels are available for use by a wireless device in transmitting data to a network. In various examples, the device selects between the first and second wireless transmission protocol uplink channels according to various different criteria. Examples include selecting between the first and second wireless transmission protocol uplink channels according to the type of data to he transmitted and according to the identity of the device, and various combinations of these.

Abstract: A password authentication circuit includes a timer that measures first and second periods of a password authentication period, a control circuit that, in a first period, disables writing of a password received into a password register, in a predetermined period within a second period enables writing of a password received into the password register and outside the predetermined period within the second period disables writing of a password received into the password register; a password comparison unit that compares a password in the password register and a password expected value to perform authentication of the password; and a first period generation unit that controls variably the first period, a password last written into the password register in the predetermined period of the second period being made a target for authentication.

Abstract: First, a porous insulating film 120 is formed using an organic silica raw material containing a hydrocarbon group. The hydrocarbon group contains, for example, an unsaturated carbon compound, but may contain a saturated carbon compound. The skeleton of the organic silica is, for example, cyclic organic silica. Next, the surface of the porous insulating film 120 is subjected to plasma processing by using a processing gas containing an inactive gas and a reducing gas. Subsequently, in the porous insulating film 120, a wiring trench 123 is formed and is embedded with wiring 124.

Abstract: In a method of further enhancing the performance of a narrow active cell IE type trench gate IGBT having the width of active cells narrower than that of inactive cells, it is effective to shrink the cells so that the IE effects are enhanced. However, when the cells are shrunk simply, the switching speed is reduced due to increased gate capacitance. A cell formation area of the IE type trench gate IGBT is basically composed of first linear unit cell areas having linear active cell areas, second linear unit cell areas having linear hole collector areas and linear inactive cell areas disposed therebetween.

Abstract: Indications of desired radio communications downlink characteristics are transmitted via a radio communications uplink from a user equipment to a node of a cellular wireless network, the indications each relating to one or more components of a radio communications link from the node to the user equipment. The indications are transmitted successively at different cycles, and at each different cycle a first parameter is determined, indicating a more preferred number of components and a second parameter is determined, indicating a less preferred number of components. First additional parameters are calculated and transmitted relating to the desired radio communications link quality corresponding to the first parameter and second additional parameters are calculated and transmitted relating to the desired radio communications link quality on the basis of the second parameter. The first and second parameters are each parameters which are variable between different cycles.