Abstract: A semiconductor device which eliminates the need for high fillability through a simple process and a method for manufacturing the same. A high breakdown voltage lateral MOS transistor including a source region and a drain region is completed on a surface of a semiconductor substrate. A trench which surrounds the transistor when seen in a plan view is made in the surface of the semiconductor substrate. An insulating film is formed over the transistor and in the trench so as to cover the transistor and form an air-gap space in the trench. Contact holes which reach the source region and drain region of the transistor respectively are made in an interlayer insulating film.

Abstract: Efficient reduction in power consumption is achieved by combinational implementation of a power cutoff circuit technique using power supply switch control and a DVFS technique for low power consumption. A power supply switch section fed with power supply voltage, a circuit block in which a power cutoff is performed by the power supply switch section, and a level shifter are formed in a DEEP-NWELL region formed over a semiconductor substrate. Another power supply switch section fed with another power supply voltage, a circuit block in which a power cutoff is performed by the power supply switch section, and a level shifter are formed in another DEEP-NWELL region formed over the semiconductor substrate. In this arrangement, there arises no possibility of short-circuiting between different power supplies via each DEEP-NWELL region formed over the semiconductor substrate.

Abstract: A problem associated with n-channel power MOSFETs and the like that the following is caused even by relatively slight fluctuation in various process parameters is solved: source-drain breakdown voltage is reduced by breakdown at an end of a p-type body region in proximity to a portion in the vicinity of an annular intermediate region between an active cell region and a chip peripheral portion, arising from electric field concentration in that area. To solve this problem, the following measure is taken in a power semiconductor device having a superjunction structure in the respective drift regions of a first conductivity type of an active cell region, a chip peripheral region, and an intermediate region located therebetween: the width of at least one of column regions of a second conductivity type comprising the superjunction structure in the intermediate region is made larger than the width of the other regions.

Abstract: Technique of improving a manufacturing yield of a semiconductor device including a non-volatile memory cell in a split-gate structure is provided. A select gate electrode of a CG shunt portion is formed so that a second height d2 from the main surface of the semiconductor substrate of the select gate electrode of the CG shunt portion positioned in the feeding region is lower than a first height d1 of the select gate electrode from the main surface of the semiconductor substrate in a memory cell forming region.

Abstract: A behavioral synthesis method according to the present invention includes generating a scheduled CDFG based on behavioral description information, generating a lifetime for each variable based on the scheduled CDFG, selecting m variables whose lifetimes do not overlap on a time axis, allocating a first register to a first variable having a first bit width and bits of the first bit width within another variable, allocating a second register to bits other than the bits of the first bit width within another variable, and outputting circuit information of a synthesized circuit including the first and second registers.

Abstract: A nitride semiconductor layer formed from a nitride semiconductor is provided on at least one surface side of a semiconductor substrate. Impurity regions (a source region, a drain region, and the like) are provided on one surface side in the nitride semiconductor layer and contain an impurity of a first conductivity type. In addition, amorphous regions (a first amorphous region and a second amorphous region) are a part of the impurity regions and are located in a surface layer of the impurity regions. In addition, metallic layers (a source electrode and a drain electrode) come into contact with the amorphous regions (the first amorphous region and the second amorphous region).

Abstract: A receiver uses a local oscillator to receive data transmitted via a combination of radio frequency signals using carrier aggregation. Each radio frequency signal occupies a respective radio frequency band and the radio frequency hands are arranged in two groups, a first group and a second group, separated in frequency by a first frequency region, each of the groups including one or more radio frequency bands and the first group occupying a wider frequency region than the second group. The radio frequency signals are processed using the local oscillator by setting the local oscillator, during the processing, to a frequency that is offset from the centre of a band defined by outer edges of the frequency regions occupied by the two groups.

Abstract: A semiconductor device has an FET of a trench-gate structure obtained by disposing a conductive layer, which will be a gate, in a trench extended in the main surface of a semiconductor substrate, wherein the upper surface of the trench-gate conductive layer is formed equal to or higher than the main surface of the semiconductor substrate. The conductive layer of the trench gate is formed to have a substantially flat or concave upper surface and the upper surface is formed equal to or higher than the main surface of the semiconductor substrate. After etching of the semiconductor substrate to form the upper surface of the conductive layer of the trench gate, a channel region and a source region are formed by ion implantation so that the semiconductor device is free from occurrence of a source offset.

Abstract: A first semiconductor chip and a second semiconductor chip are overlapped with each other in a direction in which a first multilayer interconnect layer and a second multilayer interconnect layer are opposed to each other. When seen in a plan view, a first inductor and a second inductor are overlapped. The first semiconductor chip and the second semiconductor chip have non-opposed areas which are not opposed to each other. The first multilayer interconnect layer has a first external connection terminal in the non-opposed area, and the second multilayer interconnect layer has a second external connection terminal in the non-opposed area.

Abstract: To prevent, in a resin-sealed type semiconductor package, generation of cracks in a die bonding material used for mounting of a semiconductor chip. A semiconductor chip is mounted over the upper surface of a die pad via a die bonding material, followed by sealing with an insulating resin. The top surface of the die pad to be brought into contact with the insulating resin is surface-roughened, while the bottom surface of the die pad and an outer lead portion are not surface-roughened.

Abstract: A semiconductor device includes a substrate having a main surface and a back surface opposite to the main surface, a first semiconductor chip having an upper surface and a lower surface opposite to the first surface with a side surface provided therebetween, the first semiconductor chip being mounted on the main surface of the substrate, a plurality of bumps provided between the main surface of the substrate and the lower surface of the first semiconductor chip, a second semiconductor chip having an upper surface and a lower surface opposite to the first surface with a side surface provided therebetween, the second semiconductor chip being mounted on the upper surface of the first semiconductor chip such that the side surface of the second semiconductor chip is positioned outward from the side surface of the first semiconductor chip.

Abstract: Data is received that has been transmitted via a combination of radio frequency signals using carrier aggregation, each radio frequency signal occupying a respective radio frequency band, the bands being arranged in two groups separated in frequency by a first frequency region, the first of the two groups occupying a wider frequency region than the second group. Embodiments provide a method and apparatus for downcoverting the radio frequency signals using quadrature mixing to give inphase and quadrature components, and the inphase and quadrature components are filtered using a first bandpass filter bandwidth to give first bandpass filtered inphase and quadrature components and filtered using a second bandpass filter bandwidth, different from the first bandpass filter bandwidth, to give second bandpass filtered inphase and quadrature components.

Abstract: A first semiconductor chip and a second semiconductor chip are overlapped with each other in a direction in which a first multilayer interconnect layer and a second multilayer interconnect layer are opposed to each other. When seen in a plan view, a first inductor and a second inductor are overlapped. The first semiconductor chip and the second semiconductor chip have non-opposed areas which are not opposed to each other. The first multilayer interconnect layer has a first external connection terminal in the non-opposed area, and the second multilayer interconnect layer has a second external connection terminal in the non-opposed area.

Abstract: A method, apparatus and computer program product are provided to efficiently establish communications regardless of the radio resource control (RRC) state of the device that issues the discovery signal. In regards to a method, a cell identification and/or tracking area code is associated with a discovery signal. Thereafter, the method causes a discovery signal to be transmitted to discover another device with which to establish communications. The method also receives a paging signal in response to the discovery signal and causes communications to be established in response to the paging signal. By associating a cell identification and/or a tracking area code with at least part of the discovery signal, the paging signals may be focused in the cell and/or tracking area in which the device that issued the discovery signal is located, even when the device is in an RRC Idle state.

Abstract: Solving dual errors for user equipment UE checking whether a private cell is allowed when handing over between serving and target cells, where the PLMN and/or EPLMNs list of the serving and target cells may differ. The serving cell may send a one-bit indication that there is a change in a handover command or system information SI6 message after which the UE may or may not refrain from reporting new cells until it performs a registration/location area update in the target cell. The target cell may trigger in the UE a registration update then provide the UE with the PLMN of the target cell. The serving cell can provide the PLMN of the target cell in a SI6 message or handover command, which the UE may use in place of or in addition to the PLMN/EPLMN of the serving cell when checking whether a private/closed subscriber group cell is allowed.

Abstract: A user equipment UE reports its mobility state in signaling for establishing, re-establishing, or re-configuring a radio connection between the UE and a network access node. In one embodiment the reported mobility state is selected from among normal; medium and high. In another embodiment the reported mobility state informs of a number of cell changes the UE has performed within a predetermined evaluation period. The UE may also include an indication whether a hysteresis period for entering into a normal mobility state is running for the UE. The network configures the UE in dependence on the reported mobility state, such as setting a parameter for measuring or reporting neighbor cells (e.g., suspend a serving cell quality threshold as a condition for measuring/reporting; limit inter-frequency and/or inter-radio access technology reporting; set a shortest measurement, reporting gap; disable an event trigger; and/or set layer 3 filtering of measurement results for faster reporting).

Abstract: A memory system is constituted of a file storage flash memory storing a control program required for a control portion and a large amount of data, and a random access memory storing a program used by the control portion and functioning as a buffer memory for received data. Thus, a memory system for a portable telephone capable of storing a large amount of received data at high-speed and allowing reading of the stored data at high-speed is provided.

Abstract: There is provided a clock generator for generating a modulation waveform which is high in the effect of suppressing a spectrum and making a circuit scale smaller than a modulation system using the Hershey-kiss waveform. More specifically, a modulation waveform generation unit generates a tangent waveform or a tangent+triangular waveform as an SSCG modulation waveform and provides an oscillator with a signal in which the SSCG modulation waveform is combined with the output of a low pass filter of a PLL loop.

Abstract: A microcomputer provided on a rectangular semiconductor board has memory interface circuits. The memory interface circuits are separately disposed in such positions as to extend along the peripheries of the semiconductor board on both sides from one corner as a reference position. In this case, limitations to size reduction imposed on the semiconductor board can be reduced compared with a semiconductor board having memory interface circuits only on one side. Respective partial circuits on each of the separated memory interface circuits have equal data units associated with data and data strobe signals. Thus, the microcomputer has simplified line design on a mother board and on a module board.

Abstract: A DC-DC converter includes a first switching element and a second switching element; a pulse signal generating circuit which generates a pulse signal used to control on/off periods of the switching elements; a limiting circuit which generates a minimum pulse width signal; a selector configured to select one of the pulse signal and the minimum pulse width signal, and a driver circuit switches the first and second switching element and a reverse current detecting circuit detects a reverse current. The driver circuit controls the first or second switching element, when the reverse current is detected. The selector selects the pulse signal when the reverse current is not detected, and selects the minimum pulse width signal when the reverse current is detected.