Abstract: In a chip pick-up process after dicing in an assembly process during manufacture of a semiconductor integrated circuit device it is an important subject to diminish a pick-up defect caused by the reduction in thickness of each chip which is proceeding in quick tempo. Particularly, bending of the chip peripheral portion caused by a peeling operation is very likely to induce cracking and chipping of the chip. In the present invention, to solve these problems, in case of peeling a chip from a dicing tape (adhesive tape) or the like while vacuum-chucking the chip by a chucking collet, the flow rate of a vacuum chucking system in the chucking collet is monitored to check a bent state of the chip before complete separation of the first chip from the adhesive tape.

Abstract: Improvements are achieved in the characteristics of a semiconductor device including SRAM memory cells. Under an active region in which an access transistor forming an SRAM is disposed, a p-type semiconductor region is disposed via an insulating layer such that the bottom portion and side portions thereof come in contact with an n-type semiconductor region. Thus, the p-type semiconductor region is pn-isolated from the n-type semiconductor region, and the gate electrode of the access transistor is coupled to the p-type semiconductor region. The coupling is achieved by a shared plug which is an indiscrete conductive film extending from over the gate electrode of the access transistor to over the p-type semiconductor region. As a result, when the access transistor is in an ON state, a potential in the p-type semiconductor region serving as a back gate simultaneously increases to allow an increase in an ON current for the transistor.

Abstract: A DRAM coupled to a system LSI, the DRAM receiving a test pattern from the system LSI to store the test pattern, if a power source of the system LSI is turned on, outputting the stored test pattern to the system LSI, receiving a delay set value from the system LSI, the delay set value being based on the test pattern, storing the delay set value after the power source of the system LSI is turned off and outputting the stored delay set value to the system LSI, if the power source of the system LSI is turned on again.

Abstract: Characteristics of a semiconductor device are improved. A semiconductor device of the present invention includes: (a) a MISFET arranged in an active region formed of a semiconductor region surrounded by an element isolation region; and (b) an insulating layer arranged below the active region. Further, the semiconductor device includes: (c) a p-type semiconductor region arranged below the active region so as to interpose the insulating layer; and (d) an n-type semiconductor region whose conductivity type is opposite to the p-type, arranged below the p-type semiconductor region. And, the p-type semiconductor region includes a connection region extending from below the insulating layer, and the p-type semiconductor region and a gate electrode of the MISFET are connected to each other by a shared plug which is an integrally-formed conductive film extending from above the gate electrode to above the connection region.

Abstract: In a display driver, a first backlight control unit using a histogram and a second backlight control unit using an optical sensor can be used in combination. The display driver includes a PWM generating unit setting a control signal value consisting of a product of a luminance rate of X % and a luminance rate of Y % as a luminance rate of a control signal for controlling a backlight with respect to maximum backlight luminance when a luminance rate of a control signal obtained by first backlight control with respect to the maximum backlight luminance is X % and a luminance rate of a control signal obtained by second backlight control with respect to the maximum backlight luminance is Y %.

Abstract: A method, apparatus and computer program product are provided in order to allow for reselection of a TTI resource, such as in an instance in which a mobile terminal has moved to a different portion of the coverage area and/or in an instance in which the TTI resource was initially incorrectly selected, such as based upon an inaccurate measurement. In the context of a method, a first TTI resource is selected in conjunction with an uplink. The method also detects a failure condition associated with the uplink and selects a second TTI resource, different than the first TTI resource, in response to detection of the failure condition.

Abstract: The invention relates to methods, apparatus and computer program products for enabling mobility in a downlink packet access service in a wireless communications network. At a user equipment, packet data is received from a set of one or more serving downlink shared channel cells simultaneously via one or more respective shared downlink channels and a measurement report associated with the downlink packet access service is transmitted to the network. The service is capable of initiating an addition or removal of at least one, or replacement of any, of the serving downlink shared channel cells in the set on the basis of the transmitted measurement report.

Abstract: A method, apparatus and computer program product are configured to provide calibration accuracy in an analog filter. In this regard, a method is provided that includes estimating a cutoff frequency for an analog filter. The method further includes causing a filter tuning word to be modified based on the estimated cutoff frequency for the analog filter. The method also includes determining a residual cutoff frequency mismatch for the analog filter. The method also includes causing an equalizer configuration to be selected for a digital filter based on the determined residual cutoff frequency mismatch.

Abstract: The manufacturing efficiency of semiconductor devices is improved. A plurality of external terminals (leads) electrically coupled with a semiconductor chip, and contact regions of a plurality of terminals (test terminals) are brought into contact with each other, respectively. This establishes an electrical coupling between the semiconductor chip and a test circuit. Thus, an electrical test is performed. Herein, the terminals are to be repeatedly used in the electrical test of a plurality of semiconductor devices. Whereas, the contact region of the terminal includes a core material formed of a first alloy, and a metal film covering the core material. Further, the metal film is formed of a second alloy higher in hardness than the first alloy.

Abstract: To provide a technique capable of improving reliability of a semiconductor device having a nonvolatile memory cell by suppressing the reduction of the drive force. A memory cell is configured by a selection pMIS having a selection gate electrode including a conductive film exhibiting a p-type conductivity and a memory pMIS having a memory gate electrode including a conductive film exhibiting a p-type conductivity, and at the time of write, hot electrons are injected into a charge storage layer from the side of a semiconductor substrate 1 and at the time of erase, hot holes are injected into the charge storage layer from the memory gate electrode.

Abstract: A clock data recovery circuit which has a high degree of jitter tolerance and can alleviate increase in the phase number of a multi-phase clock, power consumption, and a semiconductor chip area is provided. Each circuit of plural edge detection circuits comprises a first edge detection circuit and a second edge detection circuit. The first detection circuit detects that a data edge leads in phase more than ?1 phase from an edge detection phase, the second detection circuit detects that the data edge laggs in phase more than +1 phase from the edge detection phase. In response to the first output signal or the second output signal, the edge detection phase is changed by the amount of ?1 phase or +1 phase. When the data edge is detected in the range of ±1 phase, a next edge detection phase is maintained in the current state.

Abstract: The performance of a semiconductor device including a nonvolatile memory is enhanced. Each of nonvolatile memory cells arranged over a silicon substrate includes: a first n-well; a second n-well formed in a place different from the place thereof; a selection transistor formed in the first n-well; and an electric charge storage portion having a floating gate electrode and a storage portion p-well. The floating gate electrode is so placed that it overlaps with part of the first n-well and the second n-well. The storage portion p-well is placed in the first n-well so that it partly overlaps with the floating gate electrode. In this nonvolatile memory cell, memory information is erased by applying positive voltage to the second n-well to discharge electrons in the floating gate electrode to the second n-well.

Abstract: A semiconductor integrated circuit includes: a first capacitance element and a second capacitance element; a first amplification circuit that amplifies a potential difference of a first voltage signal and a second voltage signal supplied via the first capacitance element and the second capacitance element, respectively, to output a first amplification signal and a second amplification signal; a first resistance element that feeds back the first amplification signal to one input terminal of the first amplification circuit; a second resistance element that feeds back the second amplification signal to another input terminal of the first amplification circuit; a voltage generator that generates a predetermined voltage; and a third resistance element that transmits the predetermined voltage generated by the voltage generator to each input terminal of the first amplification circuit.

Abstract: A method, apparatus and computer program product are therefore provided according to an example embodiment to distribute and utilize location information received from one or more networks to determine handover timing and target cell selection for a mobile terminal. A method also includes determining a predicted future mobile terminal location based on the location information for the mobile terminal. A method also includes determining at least one network entity with a serving area that encompasses the predicted future mobile terminal location. A method also includes causing the at least one network entity to receive handover instructions by causing the predicted future mobile terminal location and information regarding the at least one network entity to be transmitted to a network management node.

Abstract: Indications of desired radio communications downlink characteristics are transmitted via a radio communications uplink from a user equipment to a node of a cellular wireless network, the indications each relating to one or more components of a radio communications link from the node to the user equipment. The indications are transmitted successively at different cycles, and at each different cycle a first parameter is determined, indicating a more preferred number of components and a second parameter is determined, indicating a less preferred number of components. First additional parameters are calculated and transmitted relating to the desired radio communications link quality corresponding to the first parameter and second additional parameters are calculated and transmitted relating to the desired radio communications link quality on the basis of the second parameter. The first and second parameters are each parameters which are variable between different cycles.

Abstract: A wireless device has at least a first modem and a second modem and at least a first SIM and a second SIM. The first modem supports a different level of service than the second modem. A processing system of the wireless device selectively reconfigures the connection of the first modem and the second modem to the SIMs. In a first mapping configuration, the first SIM is connected to the first modem and the second SIM is connected to the second modem. In a second mapping configuration, the second SIM is disconnected from the second modem, and the first SIM is disconnected from the first modem and is connected to the second modem thereby to obtain a different level of service for the first SIM than in the first mapping configuration.

Abstract: The yield of semiconductor devices is improved. In an upper die of a resin molding die including a pair of the upper die and a lower die, by lengthening the radius of the cross section of an inner peripheral surface of a second corner part facing an injection gate of a cavity more than that of the other corner part, a void contained in a resin in resin injection can be pushed out into an air vent without allowing the void to remain in the second corner part of the cavity. Consequently, the occurrence of the void in the cavity can be prevented and then the occurrence of the appearance defect of the semiconductor device can be prevented.

Abstract: A header region evaluation circuit includes a difference signal detection unit that detects a difference signal proportional to a difference in amounts of received light from an optical disc, a high pass filter that switches a plurality of cutoff frequencies according to a passband control signal, removes a low frequency component from the difference signal, and generates a difference signal HPF output, a waveform shaping unit that generates a shaping signal to convert the difference signal HPF output into a pulse, and a physical header detection sequencer that generates a groove detection signal for evaluating whether the physical header region is either one of a groove and an inter-groove and generates a passband control signal for controlling the cutoff frequency to be reduced for a difference signal corresponding to at least a part of the physical header region.

Abstract: A cache memory apparatus according to the present invention includes a cache memory that caches an instruction code corresponding to a fetch address and a cache control circuit that controls the instruction code to be cached in the cache memory. The cache control circuit caches an instruction code corresponding to a subroutine when the fetch address indicates a branch into the subroutine and disables the instruction code to be cached when the number of the instruction codes to be cached exceeds a previously set maximum number.

Abstract: Disclosed is a semiconductor device whose breakdown voltage is made high by controlling local concentration of an electric field. A source region faces a second plane, one of side faces of a groove part, and a part thereof extends in a direction in parallel to a nodal line of first and second planes. A drift region faces a third plane being the other side face of the groove part opposite to the second plane with a part thereof extending in a direction parallel to the nodal line of the first plane and the third plane, and is formed at a lower concentration than the source region. The drain region is provided so as to be placed on the other side of the drift region opposite to the groove part and so as to touch the drift region, and is formed at a higher concentration than the drift region.