Abstract: There is a need to acquire more reliable profile information without relying on only the personal subjective judgment on the profile information. Profile information about a dweller is automatically extracted by evaluating and comprehensively determining each of feature amounts concerning the dweller from sensing data acquired from a sensor or a usage log concerning an equipment instrument in a living space based on a criterion for the feature amounts predetermined for a profile item. The reliability of the self-reported profile information is evaluated by comparing and verifying the automatically extracted profile information with the self-reported profile information supplied by the dweller.

Abstract: A semiconductor apparatus includes a storage circuit, a processing circuit that performs processing using data stored in the storage circuit and writes data into the storage circuit as the processing is performed, a scan test circuit that executes a scan test on the processing circuit when the processing circuit does not perform processing, and an inhibit circuit that inhibits writing of data from the processing circuit to the storage circuit when the scan test on the processing circuit is executed.

Abstract: The present embodiments allow multiphase buck controllers to be able to detect Power-on-Reset (POR) automatically and subsequently reboot the system and reconfigure the system as a single or multi-rail system. Some embodiments use an onboard bus that can communicate between controllers. In these and other embodiments, the system is able to recover automatically from a power failure afflicting any or all of the controllers. Embodiments are applicable to flexible plug-and-play modular digital buck regulation applications.

Abstract: A control circuit connected to a control device configured to control a motor connected to a rotation shaft that is convertible into a turning angle of a turning wheel, the control circuit includes a main circuit configured to calculates a rotation number indicating a rotational state of the rotation shaft based on a detection signal from a rotation angle sensor configured to detect a rotation angle of the motor as a relative angle, a detection result communication unit configured to detect whether or not there is an abnormality in the main circuit and output a detection result to the control device, and a pseudo abnormality generating unit configured to set the detection result to be abnormal based on a pseudo abnormal signal from the control device.

Abstract: On a semiconductor substrate having an SOI region and a bulk silicon region formed on its upper surface, epitaxial layers are formed in source and drain regions of a MOSFET formed in the SOI region, and no epitaxial layer is formed in source and drain regions of a MOSFET formed in the bulk silicon region. By covering the end portions of the epitaxial layers with silicon nitride films, even when diffusion layers are formed by implanting ions from above the epitaxial layers, it is possible to prevent the impurity ions from being implanted down to a lower surface of a silicon layer.

Abstract: An object of the present invention is to provide a power supply voltage stabilizing method that can suppress the performance of switching power supply from being deteriorated even when a battery voltage varies and/or load conditions change. In a power supply voltage stabilizing method of a switching power supply including an output power MOS to which a battery voltage is supplied and a PWM feedback control unit that controls the output power MOS, the PWM feedback control unit includes a voltage feedback controller that controls on the basis of a power supply voltage output from the switching power supply and a current feedback controller that controls on the basis of a current output from the switching power supply. A variation in the battery voltage and/or a change in the load condition of the switching power supply are/is detected, and the bandwidth of the PWM feedback control unit is dynamically changed in accordance with the result of the detection.

Abstract: A semiconductor device includes a first main MOS transistor and a second main MOS transistor of a vertical structure that are inversely coupled to each other in series by sharing a drain electrode and a first sense MOS transistor and a second sense MOS transistor of a vertical structure that are inversely coupled to each other in series by sharing a drain electrode. The first sense MOS transistor is used for detecting the main current of the first main MOS transistor, and the second sense MOS transistor is used for detecting the main current of the second main MOS transistor.

Abstract: Provided is a semiconductor device in which influence resulting from a cell function change can be reduced. The semiconductor device includes a function cell designed using a basic cell including a first wiring layer provided over a main surface of a semiconductor substrate and having a predetermined pattern and a second wiring layer provided over the first wiring layer and having a predetermined pattern. The function cell corresponds to the basic cell which is modified to have a predetermined function by changing the pattern of the second wiring layer at a design stage. The function cell has a first layout and a second layout which are disposed in juxtaposition in one direction in a plane parallel with the main surface. The function cell is provided with the predetermined function by coupling together wires belonging to the respective second wiring layers of the first layout and the second layout.

Abstract: A semiconductor device includes a semiconductor chip having first, second and third pads, first and second external terminals to which a power supply potential or a reference potential is supplied, first and second wires connecting the first and second external terminals and the first and second pads, and a third wire connecting the second external terminal and the third pad. The semiconductor chip further includes a first internal wiring connected to the first and second pads, a second internal wiring connected to the third pad, and a detection circuit. The detection circuit includes: a current source for passing a current through the first and second internal wirings; first and second resistive elements connected between the current source and the first and second internal wirings; and an amplifier circuit for amplifying a relative potential difference generated between the first and second resistive elements and outputting a detection signal.

Abstract: In a sensorless control of a motor, due to the characteristic of a response frequency, an induced voltage, a magnetic pole position estimation gain, a current control gain, and a speed control gain are closely related. An object of the invention is to enable the induced voltage and the frequency characteristic of a magnetic pole position estimation system to be clearly designed and to theoretically and quantitatively design all of the control gains necessary for the sensorless control so as to solve a problem that a method of designing those parameters cannot be established and the parameters have to be adjusted in a try and error manner. A control device has an estimator estimating an estimation induced voltage and a phase error of a motor by applying an induced-voltage observer and a controller controlling the motor on the basis of the estimation induced voltage and the phase error.

Abstract: A semiconductor device includes a first oscillator circuit, a clock monitoring circuit and a timing signal generation circuit for periodically switching the operating mode of the clock monitoring circuit to one of the first to third modes. The clock monitoring circuit includes: a clock counter configured for counting the number of oscillations of the clock signal in the first mode and configured for shifting the pulses of the input signal to the output signal at normal time in the third mode; a comparison circuit for comparing whether the count value per predetermined period by the clock counter is within an expected value in the second mode; and an edge detection circuit for detecting whether the pulses of the input signal are shifted to the output signal of the clock counter in the third mode.

Abstract: A semiconductor device for use in controlling a camera module performs position adjustment of a correction lens for use in optical camera shake correction, based on information representing a present position of the correction lens and position information of an output image of electronic camera shake correction with respect to a photographed image photographed by an imaging element. As a result, an operation margin of the correction lens is kept, while keeping a correction margin for the electronic camera shake correction.

Abstract: A technique is provided that reduces the number of used entries in a CAM required to store a rule. A data conversion device generates entry data which is to be compared with a search key and is stored in an associative memory that can hold three or more values. The data conversion device includes a conversion circuit for extracting a plurality of character strings from an inputted rule in accordance with a regular expression based on the regular expression and converting first and second character strings included in the character strings, respectively, into first and second bit data different from each other, and an encode circuit that compares the first bit data and the second bit data for each bit and generates entry data where each mismatch bit among a plurality of bits included in the first bit data is converted into “Don't Care” value based on a comparison result.

Abstract: Provided are a semiconductor device, a battery system, and a battery control method that are capable of reducing difference in remaining capacity without regard to the load status of a battery pack. The semiconductor device includes a high-voltage resistant circuit and a low-voltage circuit. The high-voltage resistant circuit includes a multiplexer that selects one of multiple series-coupled battery cells in a battery pack and couples the selected battery cell to the battery pack. The low-voltage circuit includes a measurement circuit that individually measures voltages of the battery cells. The multiplexer couples one of the battery cells to a power supply for the low-voltage circuit.

Abstract: Provided are a semiconductor device including a desired snubber part in accordance with use of the semiconductor device and a method of manufacturing the semiconductor device. A snubber region having a snubber part is defined in a gate pad region defined on a side close to a first main surface of a semiconductor substrate. A p-type diffusion layer and an n-type column layer contacted to each other are formed in the snubber region. The p-type diffusion layer and the n-type column layer are formed as a parasitic capacitance of the snubber part while the n-type column layer is electrically coupled to a drain. The p-type diffusion layer, which extends in a Y-axis direction, is a resistance of the snubber part and electrically coupled to a source.

Abstract: A semiconductor wafer provided with a pseudo chip between a product chip and a pattern prohibiting region is prepared. With the edge portion of the semiconductor wafer left, the bottom surface of the inner semiconductor substrate is ground, and then, the semiconductor wafer is cut in a ring shape to remove the edge portion. Here, in the pseudo chip, a protective film covering the conductive pattern is formed on the top surface of the semiconductor substrate and the end surface of the protective film facing the pattern prohibiting region is positioned on the conductive pattern. Further, in plan view, the inner peripheral end of the edge portion is positioned in the pattern prohibiting region, and the pattern prohibiting region between the inner peripheral end of the edge portion and the pseudo chip is cut in a ring shape.

Abstract: A technique which improves the reliability in coupling between a bump electrode of a semiconductor chip and wiring of a mounting substrate, more particularly a technique which guarantees the flatness of a bump electrode even when wiring lies in a top wiring layer under the bump electrode, thereby improving the reliability in coupling between the bump electrode and the wiring formed on a glass substrate. Wiring, comprised of a power line or signal line, and a dummy pattern are formed in a top wiring layer beneath a non-overlap region of a bump electrode. The dummy pattern is located to fill the space between wirings to reduce irregularities caused by the wirings and space in the top wiring layer. A surface protection film formed to cover the top wiring layer is flattened by CMP.

Abstract: Reliability of a semiconductor device is improved. A first pad electrode is formed in an uppermost layer of a multilayer wiring layer, an insulating film of a non-organic material is formed over the first pad electrode, and an organic insulating film is formed over the insulating film. In the organic insulating film, an opening reaching the first pad electrode and a groove reaching the insulating film are formed. Over the organic insulating film, a plurality of re-wirings each having a barrier metal film and a conductive film are formed. In a plan view, the groove is formed in an area between the re-wirings. At the same time, a width of the groove is smaller than a width of a first portion or a width of a second portion of the re-wirings, respectively, neighboring to each other and extending in a first direction.

Abstract: An area of a semiconductor device having a FINFET can be reduced. The drain regions of an n-channel FINFET and a p-channel FINFET are extracted by two second local interconnects from a second Y gird between a gate electrode and a dummy gate adjacent thereto, to a third Y grid adjacent to the second Y gird. These second local interconnects are connected by a first local interconnect extending in the X direction in the third Y grid. According to such a cell layout, although the number of grids is increased by one because of the arrangement of the first local interconnect, the length in the X direction can be reduced. As a result, the cell area of the unit cell can be reduced while a space between the first and second local interconnects is secured.

Abstract: The subject is to improve the detection performance in the error detection of data using an ECC. A data processing device 1 includes an encoder device 2 that includes an encoder unit to generate an ECC by performing operations according to a first ECC generation matrix and an encoder unit 5 to generate an ECC by performing operations according to a second ECC generation matrix obtained by permutating a column of the first ECC generation matrix. The encoder unit 4 generates the first ECC for the first data. The encoder unit 5 generates the second ECC for the second data obtained by permutating a bit of the first data.