Abstract: A semiconductor device A1 includes a substrate 3, a conductive section 5 formed on the substrate 3 and including a conductive material, a lead 1A located on the substrate 3, a semiconductor chip 4A located on the lead 1A, a control chip 4G located on the substrate 3 and electrically connected to the conductive section 5 and the semiconductor chip 4A for controlling an operation of the semiconductor chip 4A, and a resin 7 covering the semiconductor chip 4A, the control chip 4G, at least a part of the substrate 3 and a part of the lead 1A. This configuration contributes to achieving a higher level of integration of the semiconductor device.

Abstract: A semiconductor device includes a semiconductor layer made of a wide bandgap semiconductor and including a gate trench; a gate insulating film formed on the gate trench; and a gate electrode embedded in the gate trench to be opposed to the semiconductor layer through the gate insulating film. The semiconductor layer includes a first conductivity type source region; a second conductivity type body region; a first conductivity type drift region; a second conductivity type first breakdown voltage holding region; a source trench passing through the first conductivity type source region and the second conductivity type body region from the front surface and reaching a drain region; and a second conductivity type second breakdown voltage region selectively formed on an edge portion of the source trench where the sidewall and the bottom wall thereof intersect with each other in a parallel region of the source trench.

Abstract: An electronic component includes a first insulating layer, a resistance layer including a metal thin film that is formed on the first insulating layer, the resistance layer having a first end portion, a second end portion and a central portion between the first end portion and the second end portion, a first electrode having a first contact portion and a second contact portion spaced away from the first contact portion both of which are in contact with the resistance layer at a portion of the first end portion side with respect to the central portion of the resistance layer, a notched portion formed in the first end portion of the resistance layer and between the first contact portion and the second contact portion, and a second electrode having a contact portion in contact with the resistance layer at a portion of the second end portion side with respect to the central portion of the resistance layer.

Abstract: A semiconductor device includes a semiconductor element, a lead frame, a conductive member, a resin composition and a sealing resin. The semiconductor element has an element front surface and an element back surface facing away in a first direction. The semiconductor element is mounted on the lead frame. The conductive member is bonded to the lead frame, electrically connecting the semiconductor element and the lead frame. The resin composition covers a bonded region where the conductive member and lead frame are bonded while exposing part of the element front surface. The sealing resin covers part of the leadframe, the semiconductor element, and the resin composition. The resin composition has a greater bonding strength with the lead frame than a bonding strength between the sealing resin and lead frame and a greater bonding strength with the conductive member than a bonding strength between the sealing resin and conductive member.

Abstract: The semiconductor device includes a semiconductor layer which has a main surface, a switching device which is formed in the semiconductor layer, a first electrode which is arranged on the main surface and electrically connected to the switching device, a second electrode which is arranged on the main surface at an interval from the first electrode and electrically connected to the switching device, a first terminal electrode which has a portion that overlaps the first electrode in plan view and a portion that overlaps the second electrode and is electrically connected to the first electrode, and a second terminal electrode which has a portion that overlaps the second electrode in plan view and is electrically connected to the second electrode.

Abstract: A semiconductor device is provided with a semiconductor element having a plurality of electrodes, a plurality of terminals electrically connected to the plurality of electrodes, and a sealing resin covering the semiconductor element. The sealing resin covers the plurality of terminals such that a bottom surface of the semiconductor element in a thickness direction is exposed. A first terminal, which is one of the plurality of terminals, is disposed in a position that overlaps a first electrode, which is one of the plurality of electrodes, when viewed in the thickness direction. The semiconductor device is provided with a conductive connection member that contacts both the first terminal and the first electrode.

Abstract: A semiconductor device manufacturing method includes a step which prepares a wafer source and a supporting member, a supporting step which supports the wafer source by the supporting member, and a wafer separating step in which the wafer source is cut in a horizontal direction from a thickness direction intermediate portion of the wafer source to separate, from the wafer source, a wafer structure which includes the supporting member and a wafer cut away from the wafer source.

Abstract: An electronic component includes a chip that has a main surface, an insulating layer that is laminated at a thickness exceeding 2200 nm on the main surface and has a first end on the chip side and a second end on an opposite side to the chip, and a resistive film that is arranged inside the insulating layer such as not to be positioned within a thickness range of less than 2200 nm on a basis of the first end and includes an alloy crystal constituted of a metal element and a nonmetal element.

Abstract: It is an object of the present invention to provide a debug system that accesses a semiconductor apparatus from the outside by a simple configuration at less overhead. The present invention relates to a semiconductor apparatus and a debug system. A large scale integration (LSI 11) includes a central processing unit (CPU 20), a debug control portion (21), an internal bus (22), a storage portion (23, 24, 26) connected to the internal bus, and a selector (27). According to a select control signal (CNT) from the CPU, the selector selects either a CPU select state of transmitting a signal from the CPU to the internal bus, or a debugger select state of transmitting a signal from the debug control portion to the internal bus. In principle, the selector is set to the CPU select state.

Abstract: There is provided a semiconductor device including: a conductive support including a first die pad and a second die pad having a potential different from a potential of the first die pad; a first semiconductor element mounted on the first die pad; a second semiconductor element mounted on the second die pad; and a sealing resin that covers the first semiconductor element, the second semiconductor element, and at least a portion of the conductive support.

Abstract: A semiconductor light-emitting device, includes: a semiconductor light-emitting element; a support including a base and a conductive part and configured to support the semiconductor light-emitting element; and a cover configured to overlap the semiconductor light-emitting element as viewed in a first direction, and to transmit light from the semiconductor light-emitting element, wherein the cover includes a base layer having a front surface and a rear surface which transmit the light from the semiconductor light-emitting element and face opposite sides to each other in the first direction, wherein the rear surface faces the semiconductor light-emitting element, wherein the base layer includes a plurality of undulation parts bonded to the support by a bonding material, and wherein the undulation parts are more uneven than the rear surface.

Abstract: A semiconductor device includes a first-conductivity-type semiconductor layer that includes a first main surface on one side and a second main surface on the other side, an IGBT region that includes an FET structure and a second-conductivity-type collector region formed in a surface layer portion of the second main surface, the FET structure including a second-conductivity-type body region formed in a surface layer portion of the first main surface, a first-conductivity-type emitter region formed in a surface layer portion of the body region, and a gate electrode that faces both the body region and the emitter region across a gate insulating layer, a diode region that includes a second-conductivity-type first impurity region formed in the surface layer portion of the first main surface and a first-conductivity-type second impurity region formed in the surface layer portion of the second main surface.

Abstract: A semiconductor device includes a semiconductor layer, a first conductive type first region formed in a surface layer portion of a first principal surface of the semiconductor layer, a cell structure having a second conductive type second region formed in a surface layer portion of the first region, a first conductive type third region formed in the surface layer portion of the first region such that third region is in contact with the second region, and a control electrode opposing the second region via a first insulating film adjacent to the second region, the control electrode forming a current path in the second region, a first electrode layer formed on the first principal surface such that the first electrode layer covers the cell structure, and electrically connected to the third region, a second electrode layer formed on the first principal surface separately from the first electrode layer.

Abstract: A power supply control device includes: a drive switch circuit formed by cascade-connecting a depletion type first transistor and an enhancement type second transistor, and configured to drive a transformer of an insulated switching power supply; a control circuit configured to control the second transistor; and a start-up circuit configured to charge a power supply voltage of the control circuit by using a source voltage of the first transistor.

Abstract: A semiconductor device includes a semiconductor chip that has a main surface, and a field insulating film that partially covers the main surface and has an insulating side wall in which an inclined angle made with the main surface is not less than 20° and not more than 40°.

Abstract: A pressure sensor includes: a substrate; a cavity provided in the substrate; a cap provided on the substrate and configured to seal the cavity; and a pressure conduit passing through the substrate and held in a hollow inside the cavity, wherein the pressure conduit includes a tubular insulating layer and a piezoelectric material layer, which is provided on an inner surface of the insulating layer and has a hollow portion therein, wherein the pressure conduit has one end closed in an inside of the cavity and the other end opened toward an outside of the substrate, and wherein the pressure sensor detects deformation of the pressure conduit due to a pressure difference between the outside of the substrate and the inside of the cavity as a change in voltage of the piezoelectric material layer.

Abstract: A semiconductor light-emitting device includes a lead frame, a semiconductor light-emitting element mounted on the top surface of the bonding region, and a case covering part of the lead frame. The bottom surface of the bonding region is exposed to the outside of the case. The lead frame includes a thin extension extending from the bonding region and having a top surface which is flush with the top surface of the bonding region. The thin extension has a bottom surface which is offset from the bottom surface of the bonding region toward the top surface of the bonding region.

Abstract: A switching device according to the present invention is a switching device for switching a load by on-off control of voltage, and includes an SiC semiconductor layer where a current path is formed by on-control of the voltage, a first electrode arranged to be in contact with the SiC semiconductor layer, and a second electrode arranged to be in contact with the SiC semiconductor layer for conducting with the first electrode due to the formation of the current path, while the first electrode has a variable resistance portion made of a material whose resistance value increases under a prescribed high-temperature condition for limiting current density of overcurrent to not more than a prescribed value when the overcurrent flows to the current path.

Abstract: An image stabilization actuator is used to displace a movable unit in a first direction, and a position in the first direction when an AF-axis position detection signal reaches a peak value is detected. Similarly, the image stabilization actuator is used to displace the movable unit in a second direction, and a position in the second direction when the AF-axis position detection signal reaches a peak value is detected. A reference position based on the position in the first direction and the position in the second direction thus obtained is stored. Correction information indicating a relationship between a displacement amount, from the reference position, of the movable unit displaced by the image stabilization actuator and a correction amount of the position detection signal is stored.

Abstract: A semiconductor device includes a first terminal for a battery, a second terminal for an inverter circuit, and a transistor. The semiconductor device is configured to control a voltage applied to a control terminal of the transistor to allow supply of a current from the first terminal to the second terminal and allow supply of a current from the second terminal to the first terminal. A withstand voltage between the first terminal and the second terminal is greater than or equal to a voltage between the battery and the inverter circuit.