Abstract: In one embodiment, a voltage reference circuit is configured to use two differentially coupled transistors to form a delta Vbe for the voltage reference circuit.

Abstract: A voltage regulator having an overload protection circuit and a method for protecting against an output voltage being less than a predetermined level. The voltage regulator has an overload protection circuit coupled between a feedback network and a regulation section. A power factor correction circuit is connected to the regulation section. An output voltage from the power factor correction circuit is fed back to the feedback network, which transmits a portion of the output voltage to the overload protection circuit. If the output voltage is less than the predetermined voltage level, a transconductance amplifier generates a current that sets an overload flag. Setting the overload flag initiates a delay timer. If the delay exceeds a predetermined amount of time, the overload protection circuit shuts down the voltage regulator.

Abstract: In one embodiment, a semiconductor package structure includes a plurality of upright clips having ends with mounting surfaces for vertically mounting the package to a next level of assembly. A semiconductor chip is interposed between the upright clips together with one or more spacers.

Abstract: In one embodiment, a power supply controller is configured to switch a power switch of a power supply when a voltage across the switch is at a minimum value.

Abstract: In one embodiment, a protection device is used to protect a circuit. The protection device has a maximum rated power dissipation that is less than a maximum rated power dissipation of the circuit that is being protected.

Abstract: In one embodiment, a power supply controller is configured to form a reference signal that has selectable values. The power supply controller is also configured to form a feed-forward signal in response to change in the value of the reference voltage and to use this feed-forward signal control the value of an output current.

Abstract: In one embodiment, a multi-channel power supply controller adjusts the value of an error signal to minimize overshoot and undershoot during load transients.

Abstract: In one embodiment, a transistor is formed to have a first current flow path to selectively conduct current in both directions through the transistor and to have a second current flow path to selectively conduct current in one direction.

Abstract: In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.

Abstract: In one embodiment, a semiconductor device comprises a semiconductor material having a first conductivity type with a body region of a second conductivity type disposed in the semiconductor material. The body region is adjacent a JFET region. A source region of the first conductivity type is disposed in the body region. A gate layer is disposed over the semiconductor material and has a first opening over the JFET region and a second opening over the body region.

Abstract: In one embodiment, a PWM controller is configured to form a drive signal that has an operating frequency that varies around a center by a percentage of the center frequency.

Abstract: In one embodiment, a zero crossing detector couples a plurality of comparators in parallel and operates at least a portion of the comparators at different time periods.

Abstract: In one embodiment, an LED system is controlled to have a substantially unity power factor.

Abstract: In one embodiment, a linear regulator is formed with a variable miller compensation circuit that varies a zero of the linear regulator proportionally to a load current supplied by the regulator.

Abstract: A method and circuit for managing thermal performance of an integrated circuit. Temperature sensing circuits and a plurality of power FETs that are coupled together in parallel are manufactured from a semiconductor substrate. Each temperature sensing circuit monitors the temperature of the portion of the semiconductor substrate near or including a corresponding power FET. When the temperature of the semiconductor substrate near one or more of the power FETs reaches a predetermined value, the corresponding temperature sensing circuit reduces a voltage appearing on the gate of the power FET. The reduced voltage increases the on-resistance of the power FET and channels a portion of its current to others of the plurality of power FETs. The power FET continues operating but with a reduced current flow. When the temperature of the semiconductor substrate falls below the predetermined value, the gate voltage of the power FET is increased to its nominal value.

Abstract: A semiconductor component includes a semiconductor layer (110) having a trench (326). The trench has first and second sides. A portion (713) of the semiconductor layer has a conductivity type and a charge density. The semiconductor component also includes a control electrode (540, 1240) in the trench. The semiconductor component further includes a channel region (120) in the semiconductor layer and adjacent to the trench. The semiconductor component still further includes a region (755) in the semiconductor layer. The region has a conductivity type different from that of the portion of the semiconductor layer. The region also has a charge density balancing the charge density of the portion of the semiconductor layer.

Abstract: In one embodiment, a secondary side power supply controller is configured to enable a secondary side power switch independently of a state of a drive signal used to control a primary side of the power supply.

Abstract: In one embodiment, an in-rush limiter is configured to control an output voltage to increase at a rate that is independent of the load that is powered by the in-rush limiter.

Abstract: In one exemplary embodiment, a multi-chip semiconductor connector is utilized for forming a semiconductor package having a plurality of semiconductor die. The multi-chip semiconductor connector is utilized to mechanically attach the plurality of semiconductor die together and to provide electrical connection to the plurality of semiconductor die.

Abstract: In one embodiment, a power supply controller utilizes a plurality of reference signals that operate at different frequencies to form a switching signal that is suitable to control a power device to regulate an output voltage.