Abstract: In one embodiment, a transistor has a drift region that is formed to have a plurality of zones having different vertical doping profiles across the zones. At least one of the zones has a vertical doping profile that has a first peak near a top surface of the zone and a second peak near a bottom surface. An embodiment may have a lower doping in a region that is between the two peaks.

Abstract: A jet impingement cooling assembly for semiconductor devices includes an inlet chamber configured to receive an inlet fluid flow, and a jet plate having a plurality of jet nozzles formed therein and coupled to the inlet chamber, and positioned to direct a jet fluid portion of the inlet fluid flow from the inlet chamber through the jet nozzles. The jet impingement cooling assembly may further include an outlet chamber positioned to receive the jet fluid portion once the jet fluid portion has passed through the jet nozzles, and at least one bypass nozzle in fluid connection with the inlet chamber and configured to direct a bypass fluid portion of the inlet fluid flow into the outlet chamber with the jet fluid portion to thereby define an outlet fluid flow.

Abstract: It may be desirable to limit the switching frequency of a pulse frequency modulated (PFM) resonant converter, however certain load conditions and/or startup condition require high switching frequencies to regulate an output voltage. The disclosed resonant converter can limit a maximum switching frequency while regulating an output voltage by shifting from PFM to phase-difference modulation based on a load condition. The appropriate modulation can be applied based on a comparison between a charge-control signal and a load-control signal.

Abstract: In an example, a semiconductor structure includes a region of semiconductor material of a first conductivity type and a first side. A doped region of a second conductivity type is within the region of semiconductor material at a first depth. A semiconductor device in a first portion of the region of semiconductor material and includes a first current carrying region of the second conductivity type and a second current carrying region. A PN diode is in a second portion of the region of semiconductor material and includes a cathode region and anode region. The cathode region is coupled to the first current carrying region, the anode region is coupled to the doped region, and the doped region is configured to electrically isolate the semiconductor device from region of semiconductor material below the doped region in response to a forward bias applied to the semiconductor.

Abstract: In a general aspect, a silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) can include a substrate of a first conductivity type, a drift region of the first conductivity type disposed on the substrate, a spreading layer of the first conductivity type disposed in the drift region, a body region of a second conductivity type disposed in the spreading layer, and a source region of the first conductivity type disposed in the body region. The SiC MOSFET can also include a gate structure that includes a gate oxide layer, an aluminum nitride layer disposed on the gate oxide layer, and a gallium nitride layer of the second conductivity disposed on the aluminum nitride layer.

Abstract: Implementations of a packaging system may include a wafer; and a curvature adjustment structure coupled thereto where the curvature adjustment structure may be configured to alter a curvature of a largest planar surface of the wafer.

Abstract: Implementations of semiconductor packages may include: a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include two or more spacers coupled to the first side of the first substrate and a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the two or more spacers.

Abstract: A power module can include a casing mounted to a baseplate that contains a substrate with circuitry. The circuitry can include pins for coupling signals to/from the circuitry. These pins can extend through a cover portion of the casing so that an electronic substrate, such as a printed circuit board (PCB) can be press-fit onto the pins. When press-fit, the electronic substrate is supported and positioned by support pillars that extend from the base plate to above the cover portion of the casing. If the pins and the support pillars have different coefficients of thermal expansion, damage to connection points between the pins and the circuitry may occur. Here, a power module is disclosed that has thermally matched pins and support pillars so that when the system is thermally cycled over a range of temperatures, the connection points are not damaged by forces induced by thermal expansion.

Abstract: Implementations of a semiconductor device may include a semiconductor die including a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface; and one of a permanent die support structure, a temporary die support structure, or any combination thereof coupled to one of the first largest planar surface, the second largest planar surface, the thickness, or any combination thereof where the semiconductor die may be coupled with one of a substrate, a leadframe, an interposer, a package, a bonding surface, or a mounting surface. The thickness may be between 0.1 microns and 125 microns.

Abstract: According to an aspect, an image sensor package includes a substrate, an image sensor die coupled to the substrate, a light transmitting member, and a plurality of pillar members disposed between and contacting the image sensor die and the light transmitting member. A height of the plurality of pillar members defines a gap height between an active region of the image sensor die and the light transmitting member. The image sensor package including a bonding material that couples the light transmitting member to the image sensor. The bonding material contacts a side of a pillar member, of the plurality of pillar members, that extends between a first end contacting the light transmitting member and a second end contacting the image sensor die.

Abstract: A method includes disposing at least one power device between a first direct bonded metal (DBM) substrate and a second DMB substrate and thermally coupling a plurality of pipes to a top side of the first DBM substrate opposite a side of the first DBM substrate with the at least one power device. The plurality of pipes is configured to carry cooling fluids in thermal contact with the first DBM substrate.

Abstract: A power stage configured for assigning each phase a unique address is disclosed. In particular, the disclosed power stage includes temporarily using a dedicated pulse width modulation (PWM) connection between a controller and a phase to assign a unique address to the phase. Then, after the assignment, the PWM connection may be returned to use for regulation, while the phases can communicate over a common communication bus using their assigned addresses. This addressed communication can be used to control a power state of all phases, all phases of a particular rail, or a particular phase. Controlling the power state with addressed commands communicated over a communication bus can help reduce the current consumed by the power stage during light load conditions or sleep states.

Abstract: An image sensor may include a sensor chip that is bonded to an application-specific integrated circuit (ASIC) chip. A bond pad for the image sensor may be formed in the ASIC chip and exposed through a trench in the sensor chip. The image sensor may include a conductive light shield at a periphery of the image sensor to shield optically black pixels. An opaque layer may be formed over the conductive light shield to mitigate reflections off the conductive light shield. An anti-reflective layer may be formed over the pixel array. The anti-reflective layer may have a different thickness over the pixel array than in the trench for the bond pad.

Abstract: A multiphase power stage that includes addressing and communication techniques to read temperatures of the phases for thermal load balancing is disclosed. The disclosure describes driver modules that can be assigned addresses for serial communication on a common communication bus by temporarily communicating the addresses over dedicated pulse width modulation connections between the driver modules and the controller. After assignment, a temperature request message, addressed to a driver module, can trigger the driver module to transmit an analog temperature signal to a common temperature bus coupled between the driver modules and the controller. The temperatures of the driver modules may be collected in order to activate and deactivate driver modules based on their temperatures, which can balance a thermal load on the multiphase power stage.

Abstract: In a general aspect, an apparatus can include a semiconductor layer of a first conductivity type and a lateral bipolar device disposed in the semiconductor layer. The apparatus can further include an isolation trench disposed in the semiconductor layer in a base region of the lateral bipolar device. The isolation trench can be disposed between an emitter implant of the lateral bipolar device and a collector implant of the lateral bipolar device. The emitter implant and the collector implant can be of a second conductivity type, opposite the first conductivity type.

Abstract: In one form, an acoustic distance measuring circuit includes a frequency generator, a transmitter amplifier, an acoustic transducer, and a sensing circuit. The sensing circuit includes an input adapted to be coupled to the acoustic transducer, for receiving an input signal. The sensing circuit provides an in-phase portion and a quadrature portion of the input signal to a filter. The sensing circuit filters the in-phase portion and the quadrature portion and calculates a phase of the input signal in response to the filtered in-phase and quadrature portions. The sensing circuit determines a frequency slope of the input signal in response to calculating the phase and provides the frequency slope of the input signal to an output.

Abstract: A MOSFET device die includes an active area formed on a semiconductor substrate. The active area includes a first active area portion and a second active area portion. At least one mesa is formed in the semiconductor substrate extending in a longitudinal direction through the active area. The at least one mesa includes a channel region extending in a longitudinal direction. The channel region includes low threshold voltage channel portions and high threshold voltage channel portions. The first active area portion includes the channel portions in a first ratio of low threshold voltage channel portions to high threshold voltage channel portions, and the second active area portion includes channel portions in a second ratio of low threshold voltage channel portions to high threshold voltage channel portions. The first ratio is larger than the second ratio.

Abstract: A repeater circuit includes at least a first input, and output, and a repeater. The first input for receiving a single-ended data signal from an embedded universal serial bus (eUSB) host. The output provides a differential data signal in a differential universal serial bus (USB) format. The repeater is coupled between the first input and output for converting the single-ended data signal to a differential data signal, the repeater includes an adaptive delay element operable for both sides of the differential data signal to delay one, but not both, of a rising edge and a falling edge of the differential data signal in order to meet a crossover specification for the USB format.

Abstract: In at least one general aspect, an inductive sensor can include a shaft having an axis of rotation, and a rotor physically coupled to the shaft and including a rotor coil. The rotor and the rotor coil can be aligned along a plane orthogonal to the axis of rotation. The inductive sensor can include a stator including a stator layer, an excitation coil, and an eccentricity receiver coil where the excitation coil and the eccentricity receiver coil are physically coupled to the stator layer.

Abstract: In a general aspect, a package includes an optical sensor die fabricated in a semiconductor wafer. The optical sensor die has an optically active area on a front side of the semiconductor wafer generating a raw image signal. A transparent cover attached to the front side of the semiconductor wafer above the optically active area of the optical sensor die. An image signal processor (ISP) die processing the raw image signal is embedded in a layer of molding material attached to a back side the semiconductor wafer opposite the front side of the semiconductor wafer.