Abstract: In an integrated circuit, a semiconductor body having a surface, spaced semiconductor circuits formed in the body, intercoupling means formed in the body adjacent each of said circuits, and connected to said circuits. A plurality of conductive paths are formed between said intercoupling means and carried by the body. Each intercoupling means includes a plurality of semiconductor regions formed in the semiconductor body, said regions in combination capable of assuming a first low impedance condition and a second high impedance condition to thereby selectively couple each of said circuits to selected conductive paths or decouple each of said circuits from said conductive paths. In a specific embodiment of the invention a massive monolithic integrated circuit is configured using intercoupling means in combination with small scale random access memory semiconductor circuits. A static MOS random access memory having a 2,048 word capacity, with 9 bits/word and an 11 bit address is provided.

Abstract: A bipolar memory cell of reduced size requires only four I.sup.2 L operated transistors and three access lines. Two current injection transistors supply operating current to two inversely operated flip-flop transistors and also function as load devices as well as coupling devices. The three access lines conduct power to the cells as well as the signals for the write and read operations. A write operation is performed by ratioing the currents supplied to a memory cell array such that only a selected cell is written.

Abstract: A binary to multistate line driver and remote receiver includes a line driver comprising first and second injection logic encoder circuits. The circuits have current injectors and are connected to receive respective first and second binary signals to provide analog outputs at a signal output terminal in response to the input signals. The encoder circuits each have current injectors with substantially similar structural characteristics. The line driver further includes a reference channel circuit connected to a reference terminal to provide a reference to the encoded signals. The reference circuit has a current injector with structural characteristics substantially similar to the encoder circuit current injectors.

Abstract: A high density semiconductor structure and method is disclosed including a semiconductor body of one conductivity having a substantially planar surface. A first region of one conductivity is formed in the body and extends to the surface. A layer of opposite conductivity is interposed between the first region and the body said layer having relatively thin and uniform walls which extend to separate the first region from the body. At least one opposite conductivity region is formed entirely within the first region and extends to the surface. An opposite conductivity region is formed in the body and overlaps a portion of the layer. Lead means are provided for contacting each of the respctive regions and the body. The collector-up injection logic structure thus formed requires little or no surface area for the injection source transistor.

Abstract: Integrated injection logic circuits and semiconductor devices employing threshold functions. Multiple-collector input transistors have their collectors connected to the bases of one or more output transistors. The output transistors have different weighted levels of injection current. The switching states of the output transistors are functions of the number of and conduction state of input transistors to which the output transistor are connected and to the weight of the injection current associated with the output transistor.

Abstract: A ramp generator for driving a bar graph display which utilizes a feedback circuit to set its maximum level of the ramp.

Abstract: Unidirectional and bidirectional bipolar logic transmission gates have an input, an output, a gate control, supply and common terminals. The unilateral transmission gate circuit includes first and second switching transistors and associated first and second source tranisistors. The transistors each have collector, base and emitter electrodes, said first source transistor emitter being connected to said supply terminal. The collector of the first switching transistor is connected to the base of the second switching transistor and defines a gate logic node. The base of the first switching transistor is connected to the first input terminal and the collector of the second switching transistor is connected to the output terminal with both switching transistor emitters being connected to the common terminal.

Abstract: A multi-point probe for contacting closely spaced pads of a semiconductor device, having a flexible sheet-like member which carries the probes that make contact with the semiconductor device.

Abstract: Solid state folded leaf spring force transducers are fabricated by batch photolithographic and etching techniques from a monocrystalline material, such as silicon. The folded leaf spring structure includes elongated gaps separating adjacent leaf spring leg portions, such elongated gaps being oriented parallel to a crystallographic axis of the monocrystalline material. In a preferred embodiment the monocrystalline material is of diamond cubic type and the leaf spring gaps extend in mutually orthogonal directions parallel to the <011> and <011> crystallographic axes, respectively. In a preferred method of fabricating the spring structure, the structure is etched from a monocrystalline wafer by means of an anisotropic etchant so as to more precisely define angles and dimensions of the resultant spring structure.

Abstract: An amplifier circuit and structure having high input impedance and having a return path for conducting amplifier DC leakage current. A common diode structure forms the return path and includes two diodes connected in series and connected in opposite conduction directions. The diode having a forward conduction direction which is in the opposite direction of the leakage current is provided with a reverse saturation current which is substantially greater than the leakage current of the amplifier. The amplifier is typically a P channel or N channel field effect transistor (FET) and the double diode structure is typically an NPN or PNP transistor.

Abstract: A universal differential line driver with a single pair of outputs provides by means of a pair of control input lines selectively sourcing, sinking or high impedance conditions on the output pair.

Abstract: A method for fabricating a semiconductor diode array, utilizing an alignment tool to precisely position a plurality of diodes so that they can be bonded into a precision array. The alignment tool and a method for fabricating the tool are also disclosed.

Abstract: An aqueous solution for etching a glass layer on a metal (aluminum) substrate without substantial attack on the metal. The solution comprises buffered hydrofluoric acid, sodium chloride, and either (a) a fluorocarbon surfactant capable of forming a protective thin film upon the aluminum, or (b) a 6-hydroxy alcohol (e.g., mannitol or sorbitol).

Abstract: Integrated circuit having a guard ring Schottky barrier diode therein in which first and second layers of metallization are provided overlying the Schottky barrier diode which are brought into intimate contact with the interconnect surface to establish intimate contact between the surface of the semiconductor body and the metallization.

Abstract: A lead structure formed from a sheet of electrically conducting material having a plurality of spaced integral lead arrays formed therein with each of the arrays comprising a plurality of first leads formed from the sheet material in one region thereof and being integral with the sheet with each of the leads being cantilevered and having inner extremities which are free and positioned in a predetermined pattern. Portions of the first leads adjacent the free ends are convoluted. A semiconductor body having at least portions of an electrical circuit formed therein and with contacts in a predetermined pattern carried by the body and lying in a common plane is secured to each of the arrays with the contact pads being bonded to the inner extemities of the first leads. A first encapsulating means is provided for encapsulating the semiconductor body and the inner extremities of the first leads with the outer extremities of the first leads being free of the first encapsulating means.

Abstract: Defect formations and unwanted in diffusions caused by residual impurity products is prevented in a semiconductor fabrication method which includes the step of forming a composite mask which simultaneously defines base, collector and diffusion isolation openings. After these openings are defined a thin protective layer of silicon dioxide is grown over the exposed area and remains there throughout the remainder of the doping process which includes the steps of selectively covering areas which are not to be doped with photoresist and thereafter ashering the photoresist to remove it in preparation for the next ion implantation step. The thin protective layer of silicon dioxide protects nonselected areas against residual impurity products formed during removal of the photoresist.

Abstract: Semiconductor assembly and method in which very small pill-like packages can be mounted directly on boards and can be directly mounted in assemblies and stacks. The pill-like package encapsulates a semiconductor body having at least a portion of an electrical circuit formed therein with contact pads in a predetermined pattern carried by the body and lying in a common plane with a plurality of first leads bonded to the contact pads and the first leads extending outwardly from the semiconductor body and having outer extremities which lie in a predetermined pattern with encapsulating means encapsulating the semiconductor body and the portions of the first leads in engagement with the contact pads. The pill-like package is very small and has a spider-like conformation. The leads are formed in such a manner so that the packages can be directly mounted upon printed circuit boards without extending the leads through holes. The pill-like packages can be stacked into assemblies in which the leads are interconnected.

Abstract: A logic circuit for converting a triple state input to a binary output having a single line ternary input and a two line binary output. A pair of output transistors provide the two line binary output, and means are provided for driving both of these output transistors, such that three different binary output states result from the ternary input states of low, high and open (or floating), respectively.

Abstract: In a semiconductor structure, a semiconductor body of one conductivity type having a planar surface and a first region of opposite conductivity formed in said body and extending to said surface. Spaced second, third and fourth regions of one conductivity type are formed in said first region and extend to said surface. Fifth and sixth regions of opposite conductivity are respectively formed entirely within said second and third regions and extend to said surface. In addition a seventh region of one conductivity type may be formed spaced from said second, third and fourth regions and an eighth region of opposite conductivity type formed entirely within said seventh region. A method for forming the semiconductor logic structure is also disclosed.

Abstract: Single bipolar transistor memory cell in which information is stored on the collector to substrate capacitance. This capacitance may be enhanced by an additional diffused region. Storage and retrieval of information is accomplished through only two leads connected to the transistor which is operated so that a portion of the base is fully depleted during a portion of the operating memory cycle of the memory cell.