Patents Assigned to Silicon Graphics, Inc.
  • Patent number: 6487082
    Abstract: A printed circuit board apparatus, configurations and methods are presented which provide for close spacing between the HUB and multiple processors as well as a common configuration for two or four processor boards. A printed circuit board is provided with conductive apertures and portions corresponding to an efficient Packaging allowing for the attachment of the processor-chip on one side of the printed circuit board, and the HUB and other supporting electronic components on the other side of the printed circuit board. This configuration allows for the close spacing of the electrical conductors of the HUB and the processors without the limitations imposed by the physical dimensions of the respective hardware. Additionally, a symmetric packaging of the conductive apertures and portions about a centerline of the printed circuit board allows for a simple design modification to allow for a two two-processor board to be manufactured from a similarly configured four-processor board.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: November 26, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Thomas Alex Crapisi, Jeffrey S. Conger, Stephen Cermak, III, Stephen A. Bowen, Rodney Ruesch, David Paul Gruber, Bonnie Kay Dobbs
  • Patent number: 6486723
    Abstract: Circuitry that provides additional delay to early arriving signals such that all data signals arrive at a receiving latch with same path delay. The delay of a forwarded clock reference is also controlled such that the capturing clock edge will be optimally positioned near quadrature (depending on latch setup/hold requirements). The circuitry continuously adapts to data and clock path delay changes and digital filtering of phase measurements reduce errors brought on by jittering data edges. The circuitry utilizes only the minimum amount of delay necessary to achieve objective thereby limiting any unintended jitter. Particularly, this programmable differential delay circuit with fine delay adjustment is designed to allow the skew between ASICS to be minimized. This includes skew between data bits, between data bits and clocks as well as minimizing the overall skew in a channel between ASICS.
    Type: Grant
    Filed: May 9, 2002
    Date of Patent: November 26, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: John F. DeRyckere, Philip Nord Jenkins, Frank Nolan Cornett
  • Patent number: 6483699
    Abstract: An air cooled computer assembly including a printed circuit board assembly or a U sized enclosure. The computer assembly also includes three 120 mm fans positioned at one end of the PCB assembly providing air flow across the PCB assembly. The printed circuit board assembly has a top side and a bottom side, including heat producing components on the top side and bottom side. A portion of the heat producing components are DIMM memory positioned perpendicular to the direction of air flow. The computer assembly also includes an air baffling system positioned proximate to the PCB assembly. The air baffling system divides and balances the air flow between the heat producing components so that each of the components are adequately cooled. The air baffling system includes a flat baffle and pair of curved baffles. The flat baffle is positioned perpendicular to the direction of the air flow and is positioned between and in front of two 40 watt memory. The curved baffles are positioned adjacent to the two memory ASICs.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: November 19, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Richard B. Salmonson, David Paul Gruber, Stephen A. Bowen
  • Patent number: 6483024
    Abstract: A device for reducing electromagnetic interference (EMI) leakage through an opening in a housing. The device accepts a printed circuit board or dummy board. Various openings may be provided in the device. The device includes a faceplate, a gasket having a plurality of fingers, and a supporter. The supporter protects the leading edge of the fingers and augments the forces exerted by the fingers in opposition to the opening in the housing.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: November 19, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Stephen D. Smithson, Steven J. Dean
  • Patent number: 6480194
    Abstract: A computer graphics display method and system for controlling data visualization in at least one external dimension is provided which allows better querying and navigation of data in external dimension space. A data visualization is displayed in a first display window. A summary window provides summary information on data for the data visualization across one or more external dimensions. First and second controllers are displayed for controlling the variation of the data visualization in respective first and second external dimensions. A user queries the data visualization in the first and second external dimensions by selecting a point in the summary window. A user navigates through the data visualization in the first and second external dimensions by defining a path in the summary window. Grid points are also displayed in the summary window to facilitate data queries and navigation based on actual data points.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: November 12, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Gerald P. Sang'udi, Ross A. Bott, Joel D. Tesler, John R. Hawkes, Rebecca W. Xiong, Mario Schkolnick
  • Patent number: 6480548
    Abstract: A method and apparatus for providing efficient and accurate electronic data transmission of information on a data bus in the presence of noise. Data signals are received on a plurality of input lines by a spacial derivative encoder. The spacial derivative encoder encodes the signals and transmits them to a receiver having a spacial derivative decoder. The spacial derivative decoder then decodes the signals. Minimal overhead is required as for n input lines only n+1 lines are needed to transmit each of the encoded signals.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: November 12, 2002
    Assignee: Silicon Graphics, Inc.
    Inventor: Daniel C. Mansur
  • Patent number: 6476813
    Abstract: A computer system (10) can prepare and present on a display (22) a two-dimensional image that includes a perspective view, from a selected eyepoint (71, 152), of an object (23) which is a three-dimensional object of an approximately spherical shape, such as the earth. The system maintains image information for the object at each of several different resolution levels, portions of which are selected and mapped into the perspective view for respective portions of the surface of the object. In order to determine what resolution level to use for a given section of the surface of the object, the system relies on a combination of a logarithm of the square of a distance from the eyepoint to a point on the surface section, and a logarithm of the square of the degree of tilt of the surface section in relation to the eyepoint.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: November 5, 2002
    Assignee: Silicon Graphics, Inc.
    Inventor: Paul Edward Hansen
  • Patent number: 6462740
    Abstract: A system for in-scene cloth modification that allows a user to make modifications to cloth during animation of objects associated with the cloth and have the new geometry updated in the in-scene cloth without having to start the animation from the beginning. Modified panels of the cloth are mapped into the counterpart panels of the simulated cloth by morphing the modified panels from a cloth definition into the space of the old panels in the scene. A relaxation of the cloth allows the new panel to take its natural shape in the animation. The mapping, when cloth is added, also includes finding each new panel vertex a location in the original or old panel.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: October 8, 2002
    Assignee: Silicon Graphics, Inc.
    Inventor: David Stanley Immel
  • Patent number: 6460049
    Abstract: A method, system, and computer program product visualizes the structure of an evidence classifier. An evidence inducer generates an evidence classifier based on a training set of labeled records. A mapping module generates visualization data files. An evidence visualization tool uses the visualization data files to display an evidence pane and/or a label probability pane. A first evidence pane display view shows a normalized conditional probability of each label value, for each attribute value. The first evidence pane display view can be a plurality of rows of pie charts. Each pie slice in a pie chart has a size which is a function of the normalized conditional probability of each label value for the respective attribute value. For each pie chart, the mapping module maps a height that is a function of the number of records in the training set associated with the evidence classifier.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: October 1, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Barry G. Becker, Ron Kohavi, Daniel A. Sommerfield, Joel D. Tesler
  • Patent number: 6457146
    Abstract: A node controller (12) includes a local block unit (28) that receives and processes request and reply packets. A request module (30) in the local block unit (28) receives a request packet and determines whether the request packet has an error. If there is no error, the request module (30) forwards local invalidation requests to a invalidation module (32) for processing and forwards programmed input/output read and write requests to a processor module (34) for processing. If an error is detected, the request module (30) forwards the request packet to a registers module (40). The registers module (40) stores the header and data contents of the request packet in header registers (70, 72) and a data register (80). An error bit is corresponding to the identified type of error is set in an error register (50). The request module (40) generates an interrupt signal (52) in response to setting the error bit in the error register (50).
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: September 24, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: John S. Keen, Azmeer Salleh
  • Patent number: 6453408
    Abstract: A method for controlling memory page migration in a parallel processor computer (10) is provided that comprises requesting access to a memory page (14) by a requester processor (206). The method then determines whether the requester processor (206) is a local processor or a remote processor. The method then increments a local access counter (52) and identifies the local access counter (52) as an incremented counter in response to determining that the requester processor (206) is a local processor. If the requester processor (206) is determined to be a remote processor, the method increments a remote access counter (54) and identifies the remote access counter (54) as the incremented counter. The method next sets a threshold processing indicator to a positive value if the incremented counter exceeds a value threshold (58) or if a difference between the local access counter (52) and the remote access counter (54) exceeds a difference threshold (62).
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: September 17, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: James A. Stuart Fiske, David Edward McCracken, Leonard Mark Widra
  • Patent number: 6452805
    Abstract: A rack including a rail for supporting a computer module and a grounding element electrically coupled to the rack and positioned to electrically contact a computer module inserted in the rack such that the grounding element provides a path to ground. The grounding element can be an arcuate bracket attached to the rail to make contact with a side of the computer module. The grounding element can be a conductor extending from the rack and positioned to make contact with a side of the computer module. The rack can include a wider section which provides a cabling channel and a member on the rack for mechanically coupling the rack to an adjacent rack. The rack can include at least one passage for allowing a cable to pass through the rack to an adjacent rack and a cable organizer for maintaining placement of at least one cable routed through the passage.
    Type: Grant
    Filed: September 29, 1999
    Date of Patent: September 17, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Perry D. Franz, Jeffrey Mark Glanzman, David R. Collins, Steve J. Dean, Timothy S. McCann
  • Patent number: 6448955
    Abstract: A multiple light source flat panel liquid crystal display (LCD) system having enhanced backlight brightness and specially selected light sources. According to the present invention, brightness in the LCD is enhanced by polarization recycling using a pre-polarizing film to pre-polarize light, and a special reflector for recycling light reflected by the pre-polarizing film. In one embodiment, the pre-polarizing film comprises a layer of DBEF brightness enhancement film, and the rear reflector is made of a PTFF material. In another embodiment, the rear reflector is covered with a film comprising barium sulfate. The multiple light sources are selected such that, at any color temperature within a predetermined range, the brightness of the LCD is not reduced below a given threshold minimum (e.g., 70 percent of the maximum brightness).
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: September 10, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Daniel E. Evanicky, Sun Lu
  • Patent number: 6441666
    Abstract: A system and method of generating a clock signal as a function of a system clock. A plurality of overlapping phases are generated and two or more of the overlapping phases are combined to form the clock signal.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: August 27, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Vernon W. Swanson, Mark Ronald Sikkink
  • Patent number: 6438309
    Abstract: A cable organizer having amounting mechanism suitable for mounting the cable organizer on a structure, at least one compartment for retaining at least one cable and a snap mechanism for use in installing the cable within the compartment.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: August 20, 2002
    Assignee: Silicon Graphics, Inc.
    Inventor: Perry D. Franz
  • Patent number: 6434007
    Abstract: A heat sink assembly for securing a heat sink to a chip on a circuit board using a clip to secure the heat sink to the chip. The assembly includes a pair of support beams, a clip attached to the pair of support beams, and a heat sink. Optionally, the assembly also includes a plurality of bias members biased between the heat sink and the circuit board and a pair of positioning pins positioned between the heat sink and the circuit board. The clip is biased between the heat sink and the pair of support beams. The clip has a plate having a first end and a second end with the first end having an aperture for fastening the first end to a first support beam and the second end having a hook for fastening the second end to a second support beam. Optionally, the clip is made of spring steel and provides a downward biasing force of between about 3 psi and about 25 psi and preferably about 10 psi.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: August 13, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Richard B. Salmonson, David Paul Gruber
  • Patent number: D463796
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: October 1, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Philip J. Houdek, II, Perry D. Franz, Scott A. Olson, Lawrence A. Kalina, Stephen D. Smithson, Steven J. Dean
  • Patent number: D464054
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: October 8, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Philip J. Houdek, Alla Shapiro
  • Patent number: D464056
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: October 8, 2002
    Assignee: Silicon Graphics, Inc.
    Inventor: Charles W. Skandalis
  • Patent number: D464973
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: October 29, 2002
    Assignee: Silicon Graphics, Inc.
    Inventors: Philip J Houdek, Roger W. Ramseier, Stephen D. Smithson, Patrick J. Kurtz, Steven J. Dean