Abstract: An electronic system and method that maintains time dependencies and ordering constraints in an electronic system. A timing controller utilizes a representative bit to track timing dependencies associated with information and ensures the information is communicated and processed in an order that preserves the timing dependencies as the information is converted from parallel to parallel or parallel to serial operations. The present invention tracks the order in which information is loaded in a electronic hardware component and ensures that the information loaded into the electronic hardware component at a particular time is processed without interruption by information loaded at a different time.

Abstract: A method of efficiently removing backfacing primitives from the graphics pipeline such that rendering efficiency is increased. In one embodiment of the present invention, a bounding cone of normal vectors of a primitive is first determined during pre-processing. During the rendering process, before the primitive is drawn, the bounding cone is compared with a half-space defined by a viewing vector. Primitives whose bounding cones do not intersect with the half-space will be removed from further processing. In this way, rendering efficiency is increased. In another embodiment, a normal bit-vector is used to represent normal directions of a primitive, and a visibility bit-vector is used to represent visible normal directions. In that embodiment, primitives are culled efficiently by comparing the normal bit-vector with the visibility bit-vector.

Abstract: A flat panel display having a programmable gamma without incidental loss in gray scale resolution. In one embodiment, the flat panel display is a liquid crystal display (LCD). The invention includes applying and adjusting a set of gamma controlling voltages to the DC reference circuit (a.k.a. ladder voltages) of an LCD module producing a change in the gamma response (or profile) of the LCD module without incidental loss of gray scale resolution. An adjustable ladder circuit (ALC) is thereby realized. Separate ALCs can be provided for red, green and blue primaries. By adjusting, in a predetermined fashion, the reference voltages applied to the row and column drivers of an LCD display, the gamma response of the LCD can be changed to a different value. Because the input digital signals are not affected, the same color resolution and dynamic range are maintained. The DC reference circuit can be a multi-node voltage divider.

Abstract: A system that applies computer generated paint stamps to a target polygon and to neighboring texture polygons in such a way that each texture polygon affected by a stamp that is too big for the target polygon and that is not connected to the target polygon in texture space receives an appropriately positioned and oriented stamp. The system determines the relative position and orientation of the stamp with respect to a texture polygon adjacent to the target polygon and applies the stamp centered at that relative position and orientation, so that the stamp overlaps the adjacent polygon.

Abstract: An x86 based computer system that implements an advanced firmware based boot process without a conventional x86 BIOS. The computer system includes an x86 processor coupled to a volatile memory and a non-volatile memory via a bus, wherein the non-volatile memory includes an advanced firmware. The advanced firmware is executed by the processor to implement a boot sequence. During the boot sequence, the computer system initializes device drivers using the advanced firmware and interfaces with advanced firmware compliant program with the device drivers of the computer system. The computer system also initializes a virtual compatibility machine for supporting legacy software programs. The virtual compatibility machine includes a plurality of compatibility models.

Abstract: Determining a switching factor is useful for optimizing integrated circuit (IC) design. One aspect of the invention is a method for determining the switching factor. The method includes applying a voltage to each interconnect of a pair of interconnects, each voltage having a waveform and a slew time. The method includes dividing the voltage waveform into time regions, and analyzing a behavior of a capacitor in each of the time regions by determining the value of an effective capacitance as seen from one of the interconnects. The method includes determining a total effective capacitance by time averaging the effective capacitance values and determining the switching factor from the total effective capacitance. The switching factor is a function of a ratio between the slew times, wherein a time-averaged effective value of the switching factor corresponds total effective capacitance.

Abstract: A batch job scheduler facility schedules batch jobs in a general purpose multiprocessor system having resources, such as processors and memory, and running interactive and batch jobs. The resources are allocated to the batch jobs. Completion times are calculated and guaranteed for the batch jobs based on the resources allocated to the batch jobs. The completion times are calculated and guaranteed without static partitioning, resulting in improved utilization of system resources. Batch-critical batch jobs are defined which require all their allocated resources to complete by their guaranteed completion time. The batch jobs are scheduled so that batch jobs and interactive jobs compete for the same resources. Batch-critical jobs are permitted to obtain all their allocated resources.

Abstract: A system that allows a user to interactively paint volumetric particles using a brush stroke. The particles are emitted from an area around the stroke path as the stroke is being made. As each stroke input event occurs, the system emits new particles from the new stroke segment and adds a segment to the particles that have already been emitted. This allows the user to interact with the particles as they are being “grown” and change a direction of a stroke thereby affecting the final image. As the particles are growing they can be affected by forces and displacements which change the position of the volumetric particle segments. The user can set or designate the stroke itself as a force which allows the user to control the flow of the generated particles.

Abstract: An integrated circuit apparatus includes main logic for performing digital logic operations. The main logic is further comprised of a plurality of logic modules, each having at least one logic block associated with the logic module. Many times several logic blocks are associated with the logic modules. The main logic further also includes a number of input pins for receiving data and a number of output pins for outputting data from the main logic. Also included on the integrated circuit apparatus is testing logic for performing dynamic tests of the main logic. The testing logic further includes a first type of built-in testing logic for testing a first number of the logic modules of the main logic and a second type of built-in test logic for testing a second number of logic blocks. The second number of logic blocks connected to the second type of built-in scan logic are generally untestable using the first type of built-in logic.

Abstract: A conditioning and filling system includes a first processing section for degassing and dehydrating a working fluid, a second processing section for filtering the working fluid, and a monitoring section for sensing a condition of the working fluid, the monitoring section controlling a flow of the working fluid depending on the condition of the working fluid.

Abstract: The present invention provides a method and system for presenting three-dimensional computer graphics images using multiple graphics processing units. The dimensions of the scene to be rendered are bounded by a rectangular volume decomposed into rectangular subvolumes. Vertices of graphics primitives are compared with subvolume boundaries to determine to which subvolume a graphics primitive should be assigned. A GPU is assigned to each subvolume to render the graphics data that lies within it. A viewing position point is determined and communicated to each GPU. Rendered graphics data from each GPU are ordered based upon the viewing position Outputs of the individual GPUs are combined by blending within an image combiners. Outputs of image combiners can be presented for viewing or further combined in a subsequent stage image combiner.

Abstract: A low cost high performance three dimensional (3D) graphics system can model a world in three dimensions and project the model onto a two dimensional viewing plane selected based on a changeable viewpoint. The viewpoint can be changed on an interactive, real time basis by operating user input controls such as game controllers. The system rapidly produces a corresponding changing image (which can include animated cartoon characters or other animation for example) on the screen of a color television set. The richly featured high performance low cost system gives consumers the chance to interact in real time inside magnificent virtual 3D worlds to provide a high degree of image realism, excitement and flexibility. An optimum feature set/architecture (including a custom designed graphics/audio coprocessor) provides high quality fast moving 3D images and digital stereo sound for video game play and other graphics applications.

Abstract: A node controller (12) in a computer system (10) includes a processor interface unit (24), a memory directory interface unit (22), and a local block unit (28). In response to a memory location in a memory (17) associated with the memory directory interface unit (22) being altered, the processor interface unit (24) generates an invalidation request for transfer to the memory directory interface unit (22). The memory directory interface unit (22) provides the invalidation request and identities of processors (16) affected by the invalidation request to the local block unit (28). The local block unit (28) determines which ones of the identified processors (16) are present in the computer system (10) and generates an invalidation message for each present processor (16) for transfer thereto. Each of the present processors (16) process their invalidation message and generate an acknowledgment message for transfer to the processor interface unit (24) that generated the invalidation request.

Abstract: A cable connector backshell assembly for high frequency applications requiring reduced electromagnetic emissions. Aspects include providing sufficient physical spacing and electrical isolation between the signal conductors and the housing to meet EMI standards for HIPPI-6400 connector assemblies. One embodiment includes spring preloading of the electrical connecter. One embodiment includes a longitudinally floating connector.

Abstract: A memory management and control system that is selectable at the application level by an application programmer is provided. The memory management and control system is based on the use of policy modules. Policy modules are used to specify and control different aspects of memory operations in NUMA computer systems, including how memory is managed for processes running in NUMA computer systems. Preferably, each policy module comprises a plurality of methods that are used to control a variety of memory operations. Such memory operations typically include initial memory placement, memory page size, a migration policy, a replication policy and a paging policy. One method typically contained in policy modules is an initial placement policy. Placement policies may be based on two abstractions of physical memory nodes. These two abstractions are referred to herein as “Memory Locality Domains” (MLDS) and “Memory Locality Domain Sets” (MLDSETs).

Abstract: A method an system provide that image processing operations and graphics processing are both performed by a graphics rendering system. The texture memory and a texture filter of the graphics rendering system are used to perform look-up table operations as well as multiply and accumulate operations typically associated with image processing.

Abstract: A low cost high performance three dimensional (3D) graphics system can model a world in three dimensions and project the model onto a two dimensional viewing plane selected based on a changeable viewpoint. The viewpoint can be changed on an interactive, real time basis by operating user input controls such as game controllers. The system rapidly produces a corresponding changing image (which can include animated cartoon characters or other animation for example) on the screen of a color television set. The richly featured high performance low cost system gives consumers the chance to interact in real time inside magnificent virtual 3D worlds to provide a high degree of image realism, excitement and flexibility. An optimum feature set/architecture (including a custom designed graphics/audio coprocessor) provides high quality fast moving 3D images and digital stereo sound for video game play and other graphics applications.

Abstract: A system and method for correcting discrepancies in the apparent location of audio sources in a computer representation of a three-dimensional environment is provided. The system and method compensate for distortions created by disparities between the virtual camera field of view and the observer's field of view. The system and method further provide for appropriate adjustments to audio sources outside of the observer's field of view.

Abstract: A method and apparatus for synchronizing the execution of a sequence of graphics pipelines is provided. For a representative embodiment a sequence of graphics pipelines are connected in a daisy-chain sequence. Each pipeline operation can be controlled to operated in one of two modes. The first is a local mode where the pipeline outputs its own digital video data. The second is a pass-through mode where the pipeline outputs digital video data received from preceding graphics pipelines. The pipelines are configured to allow an application executing on a host process to select the next pipeline that will enter local mode operation. The pipeline that is selected to enter local mode operation asserts a local ready signal when it is ready to begin outputting its digital video information. Each of the pipelines monitors the state of a global ready signal. When the global ready signal becomes asserted it means that the pipeline that is selected to enter local mode operation is ready.

Abstract: A system and method for rendering a graphic object that recursively subdivides a frame buffer into rectangular regions in an order determined by a space-filling curve. Each rectangular region is tested to determine if the region includes at least part of the object to be rendered. If it contains at least part of the object to be rendered, then the region is subdivided. In accordance with the present invention, the same tests are performed on the subdivided regions. This proceeds until the size of a subdivided rectangular region reaches a predetermined limit, whereupon the pixels in the subdivided region are rendered on a pixel-by-pixel basis.