Abstract: A configurable synchronizer (10) for DDR-SDRAM (12) is provided that includes a strobe select module (40) operable to receive a memory select signal (106) and to pass strobe signals (20, 30) from one or more DDR-SDRAMs (16, 18) to a number of synchronizer circuits (44) corresponding to data signals (17) passed in parallel by each DDR-SDRAM as indicated by the memory select signal (106). A rising edge latch (174) receives a rising edge data signal (170) and latches the rising edge data signal (170) through the rising edge latch (174) on a rising edge of the strobe signal (152). A falling edge latch (176) receives a falling edge data signal (172) and latches the falling edge data signal (172) through the falling edge latch (176) on a falling edge of the strobe signal (152).

Abstract: A method of correlating a group of related processes residing on separate computers of a computer network so that they can be treated as a single entity. A single, large program is split up into separate processes and simultaneously run on several different computers. These related, but separate, processes are assigned a unique identifier. When a new process is created, it is assigned the same identifier as that of the process from which it was created, even though the child process might reside on a different computer. If a process determines that it should not belong to its current group, that process can create its own group by requesting that it be assigned a new identifier. Based on the identifiers, it is possible to implement programs that treat related processes as a single entity.

Abstract: The present invention provides a method and a device for generating texture coordinates for a selected pixel within a triangle for a texture wrapping operation. The selected pixel is defined within the triangle by a plurality of barycentric coordinates. The method includes receiving a set of texture coordinates for each of the vertices of the triangle and receiving a plurality of barycentric coordinates associated with the selected pixel. The method further includes determining a plurality of barycentric coefficients for the selected pixel from the texture coordinates of the vertices of the triangle. The barycentric coefficients are optimized to obtain a specified degree of precision, which is adapted to distinguish between neighboring texture coordinates. In addition, the method includes computing the texture coordinates based on the barycentric coefficients and the barycentric coordinates, wherein the texture coordinates are substantially distinct from neighboring texture coordinates.

Abstract: A media coprocessor for performing 3-D graphics, video, and audio functions. The media coprocessor is comprised of a single IC semiconductor chip which is coupled with a host processor chip, one or more memory chips, and an I/O controller chip. The media coprocessor includes a digital bitstream processor, a digital signal processor, and a display processor. An update interval, synchronized to a video frame, is defined. This update interval is divided into a number of partitions. Audio data is processed during one of the partitions. Video data is processed during another partition. And 3-D graphics is processed in another partition. Thereby, the processing is performed in a sequential, time-division multiplex scheme whereby the single media coprocessor chip processes all three partitions in a single video frame.

Abstract: A method of computer generation of a curve through points includes accepting positions of the points, accepting a geometric continuity condition for at least one of the points, constructing the curve through the points, the curve obeying the geometric continuity condition, and storing the constructed curve in a memory.

Abstract: The present invention is a method for performing computer graphic simulation of a fluid in motion. The method takes input data and calculates the velocity of the fluid at a plurality of points at successive time intervals. The velocity values are sent to an animator module which produces a geometrical description of the scene. This geometrical description is then sent to a renderer module, which calculates an image using the geometrical description. The animation is then displayed on an output device. In an embodiment of the invention, scalar quantities such as temperature and density are calculated as well and sent to the renderer module, where they are used in calculating the image. The process of calculating velocity and scalar fields comprises solution of the Navier-Stokes equations, is easy to implement, and allows a user to interact in real-time with three-dimensional fluids on a graphics workstation.

Abstract: A method of a computer graphics system recirculates texture cache misses into a graphics pipeline without stalling the graphics pipeline, increasing the processing speed of the computer graphics system. The method reads data from a texture cache memory by a read request placed in the graphics pipeline sequence, then reads the data from the texture cache memory if the data is stored in the texture cache memory and places the data in the pipeline sequence. If the data is not stored in the texture cache memory, the method recirculates the read request in the pipeline sequence by indicating in the pipeline sequence that the data is not stored in the texture cache memory, placing the read request at a subsequent, determined place in the pipeline sequence, reading the data into the texture cache memory from a main memory, and executing the read request from the subsequent, determined place and after the data has been read into the texture cache memory.

Abstract: A method, system, and computer program product provides data visualization which optimizes visualization of and navigation through hierarchies. A partial hierarchy is generated and displayed. The partial hierarchy consists of a number levels at least equal to a predetermined depth and less than a total number of levels included in a corresponding complete hierarchy. Parent nodes in the bottom level of the partial hierarchy have segments of connection lines extending toward child nodes not included in the partial hierarchy. A user is permitted to mark selected nodes or locations in a displayed partial hierarchy. Partial hierarchies are generated and stored in a cache or generated on-the-fly. Each partial hierarchy ends at a progressively deeper level. An interpolator interpolates a partial hierarchy layout by interpolating corresponding nodes in two partial hierarchies. A hierarchy manager manages partial hierarchies in response to requests from a viewer to move a camera to camera positions.

Abstract: The integers involved in the computation are embedded into a modular system whose index (i.e., its modulus) is an integer M that is bigger than all of these integers involved. In other words, these integers are treated not as belonging to ordinary integers anymore, but as “modular integers” belonging to the modular system indexed by M. Having completed the embedding, CRT provides the bridge which connects the single modular system indexed by M (ZM) with a collection of k modular systems indexed by m1,m2, . . . , mk respectively (Zm1, Zm2, . . . , Zmk), where M factorizes as m1*m2*m3* . . . *mk, and where each mi is slightly smaller than single precision. Then, after numbers are manipulated within modular arithmetic, the answer is reconstructed via the algorithm of CRT, also known as CRA. Finally, the present invention introduces the process of dinking that overcomes the major weakness of implementing division with modular arithmetic.

Abstract: A ring computer network system having a communication controller for controller the receipt and sending of packets or messages at each client computer. The interface associated with each client computer includes a send message buffer and a receive message buffer. The send message buffer has a send message buffer counter which increments upwardly in response to messages being received from the client computer for sending on the ring network. The communication controller sends messages from the send buffer until the send message buffer counter reaches the address or a value associated with the last received message. Similarly, the receive message buffer includes a receive message buffer counter which increments as each message is received to a receive message buffer counter value. The receive message buffer is emptied until the receive message buffer counter value is reached. The receive buffer can also have a foreground portion and a background portion.

Abstract: A method and system for performing floating point operations in unnormalized format using a floating point accumulator. The present invention provides a set of floating point instructions and a floating point accumulator which stores the results of the operations in unnormalized format. Since the present invention operates on and stores floating point numbers in unnormalized format, the normalization step in the implementation of the floating point operations, which is typically required in the prior art, is readily eliminated. The present invention thus provides significant improvements in both time and space efficiency over prior art implementations of floating point operations. In digital signal processing applications, where floating point operations are used extensively for sums of products calculations, the performance improvements afforded by the present invention are further magnified by the elimination of normalization in each of numerous iterations of multiply and add instructions.

Abstract: A system and method thereof for inserting a circuit board into and removing it from a computer system. The system includes a casing sized and shaped to enclose the circuit board. The casing has an opening for accessing an internal connector interface of the circuit board. The computer system is adapted to allow insertion and removal of the casing containing the circuit board. In one embodiment, the computer system includes an enclosure with an external opening. The casing containing the circuit board is inserted into the enclosure through the external opening so that the connector interface couples with a receptor in the computer system. Thus, the circuit board can be readily installed and removed without, for example, having to power off and open up the computer system.

Abstract: A method and apparatus for multipass rendering of graphics primitives is provided. The apparatus of the present invention includes a graphics pipeline organized as a sequence of tasks. A set of state information blocks are provided for each pipeline tasks. A host processors stores a set of graphics attributes for each task in the state information blocks. The host processor then sends a first token through the graphics pipeline. The first token causes each task to select the state information block that is associated with that task and the first rendering pass. The host processor then sends a group of graphics primitives through the graphics pipeline. Each tasks performs a graphics transformation on the graphics primitives using the graphics attributes stored in the state information block selected for that task. The host processor then sends a second token through the graphics pipeline.

Abstract: A method of computer curve and surface modeling includes storing in a computer memory a cloud of points associated with an object and least-square fitting one or more curves or surfaces to the cloud of points. The resulting curves or surfaces representative of the object are easier to describe mathematically and require less computer resources to process.

Abstract: A method, system, and computer program product for allocating physical memory in a distributed shared memory (DSM) network is provided. Global geometry data is stored that defines a global geometry of nodes in the DSM network. The global geometry data includes node-node distance data and node-resource affinity data. The node-node distance data defines network distances between the nodes for the global geometry of the DSM network. The node-resource affinity data defines resources associated with the nodes in the global geometry of the DSM network. A physical memory allocator searches for a set of nodes in the DSM network that fulfills a memory configuration request based on the global geometry data. The memory configuration request can have parameters that define at least one of a requested geometry, memory amount, and resource affinity.

Abstract: A high resolution distortion correction system is provided for an arbitrary projection system. First, a field of view is subdivided into multiple viewports. The multiple subdivided viewports provide a first approximation of the distortion. Polygons that are projected onto a particular subdivided viewport are rendered in a frame buffer and stored in texture memory as an intermediate texture image. The intermediate texture images are subsequently applied to a rendered distortion mesh to generate an output image.