Abstract: In a semiconductor device having a processor for processing digital data and RAM for storing the digital data, an apparatus for accessing the state of the digital data stored in the RAM during system operation for testing purposes. A stall controller is used to stall the processor at a specified point of execution during system operation. The state of the processor at that particular point is shifted out of the registers by using a scan chain and temporarily stored into a buffer. A memory controller then instructs the RAM to write the data of interest into a specific set of test registers. The scan chain is routed through these test registers so that it can serially shift out the data written from the RAM. Thereby, the RAM contents can be accessed with minimal overhead by using the scan chain. Once the data has been shifted out from test registers, the current state of the processor that was stored into the buffer is fed back to the processor.

Abstract: A method and apparatus for displaying a three-dimensional navigable display space containing an aggregation of graphical objects and an overview of the aggregation of display objects. An altered perspective is provided by compressing the horizontal dimension of the displayed objects so that a user can see a representative overview of the entire aggregation of display objects that have been selected for display together on a display screen. The compressed component is expanded so that the objects appear wider as a navigator approaches the displayed objects. A spotlight shines down on objects responsive to a data query. The spotlight serves as a navigation aid to the navigator so that highlighted items are visible from a distance and can be easily located.

Abstract: An electronic logic and computer implemented apparatus and method for accessing graphic geometric data within a computer display system utilizing an SIMD environment. The present invention spreads the vertex data structure of geometric primitives across multiple memories allowing much higher bandwidth access into the data structure for greater performance. The present invention eliminates branches from the processing of triangle and quadrilateral primitives allowing full utilization of SIMD processors. The present invention utilizes an indirection circuit and software to control the order of coupling of these memory units to the inputs of specialized graphic processors. Therefore, the indirection mechanism allows a geometric data structure to be spread across multiple memories in a multi-memory/multi-bus environment with indirection across these multiple busses and memories.

Abstract: A circuit topology for implementing combinational logic functions with large fan-in, high speed, and low power consumption using a combination of dynamic and static gates. The circuit topology includes a dynamic gate and a Pseudo-NMOS gate coupled to the dynamic gate.

Abstract: A hierarchical fat hypercube topology provides an infrastructure for implementing a multi-processor system at a plurality of levels. A first level is comprised of a plurality of n-dimensional hypercubes. This plurality of n-dimensional hypercubes is interconnected at a second level utilizing an m-dimensional metacube. The number of dimensions at each level and the number of bristles at each level can be customized depending on the requirements of the application. Additionally, routers can be implemented such that the system can be expanded to meet increasing system requirements. This is particularly useful at the second level of the hierarchical topology.

Abstract: A graphical user interface with clickaround tools for enhanced user interaction with an application program utilizing "two-handed" techniques. The "tool-handed" technique provides two displayed cursors controlled by two distinct pointing input devices. Actuation of a secondary input device, corresponding a secondary cursor, provides a tool palette or menu near a displayed primary cursor. This technique allows a user to select and activate tools to perform substantive operations on displayed objects of the application program. The interface allows the user to invoke tools in a fluent and seamless fashion, thus maintaining the user's focus on the substantive operations and not the procedural motions of tool access.

Abstract: A readily attachable and detachable heat sink assembly apparatus and method. In one embodiment of the present invention, a backing plate has alignment pins extending therefrom. The backing plate is adapted to be located next to the back surface of a printed circuit board, and have the alignment pins extend through the holes in the printed circuit board. A heat sink unit is adapted to thermally contact a heat generating device located on a front surface of the printed circuit board. The heat sink unit also has holes formed therethrough which are adapted to allow the alignment pins of the backing plate extend through the heat sink unit. A clasp plate is adapted to be located on top of the heat sink unit and has slits which are configured to grasp the ends of the alignment pins. A fastener coupled to the clasp plate fastener is adapted to release the heat sink unit from the heat generating device or tightly attach the heat sink unit to the heat generating device.

Abstract: A multiprocessing system that uses read resources to track cache coherent split transactions on its main system bus. Pending reads are tracked by being associated with read resources. When a read request is issued, it occupies the first available read resource. A pending read request will occupy a read resource until a corresponding read response appears on the bus. If all read resources are filled, future read requestors must wail until a read resource becomes available.

Abstract: A thermally conductive heat sink unit. In the present invention, a thermally conductive heat sink has a first surface. A plurality of arc-shaped cooling fins are formed in the first surface. The arc-shaped cooling fins extend radially outward from a central region of the first surface. A second surface of the thermally conductive heat sink is adapted to thermally contact a heat generating device. By contacting the heat generating device, heat generated by the device is dissipated through the arc-shaped cooling fins of the first surface. In one embodiment of the present invention, a recessed region is formed into the first surface of the thermally conductive heat sink. The recessed region is formed above the central region and the region peripherally surrounding the central region such that the recessed region extends into a portion of the arc-shaped cooling fins. In such an embodiment, a fan is embedded within the recessed region of the thermally conductive heat sink.

Abstract: A hierarchical display list system and efficient processing method for same. The system provides a display list having discontiguous display list segments and an information retrieval system for same (e.g. DMA controller in one embodiment). Each display list segment (DLS) contains a call to a next to be processed DLS or a return. The call includes a push (which indicates the address of the return DLS) and also a jump control data (which indicates the address of the next to be processed DLS. The push and jump and also contain the length of the respective DLS's involved. DLSs can also contain return control data which include a POP and a jump. Nesting (e.g. the display list control path) is maintained by a display list stack. The discontiguous DLSs are separately stored in memory of the host processor.

Abstract: A system and method for piggybacking read responses on a shared memory, multiprocessor bus having a plurality of nodes coupled to the bus. The system determines whether a pending read request from a first node targets data required by a subsequent read request from a second node. The system then piggybacks a read response corresponding to the pending read request by permitting the first and second nodes to share the required data without transmitting the subsequent read request on the bus or otherwise generating any additional bus traffic. The system also supports piggybacking of multiple simultaneous read transactions to different addresses.

Abstract: A drive sled assembly apparatus and method for readily installing and removing media drives. In one embodiment of the present invention, a drive sled is adapted to attach to a media drive. The sled consists of left and right rails that attach to the drive, and a lever that snaps on the front of the two rails. The attachment between the rails and the drive contain rubber grommets to dampen vibration and shock effects on the drive. The two rails and lever can be used to carry the drive using the lever as a handle. The rails are adapted to enable the drive and sled to slide into left and right guides attached to the computer chassis. In so doing, the drive can be installed or removed from the computer without opening the computer cover or having to unscrew the media drive from the computer chassis. In addition, one embodiment adapts the right rail to accommodate a light pipe.

Abstract: A computer-implemented method and apparatus allowing a user to select a data transformation for converting input data to output data without having to perform complicated programming. An interactive graphic display provider menu display options which enable a user to generate input and output graphic display templates by selecting data items such as scalars, arrays, lattices, and sets from a data palette. The user then identifies a selected data transformation by making assignments between data items in the input template and the output template. A user interface manager passes information regarding the assignments to a processor which generates a data transform program based on the assignment information. A data chopping module then executes the data transform program to convert input data.

Abstract: A method of generating a pixel in a computer system. The computer system includes a processor and a memory. The memory includes a first polygon and a texture map. The method comprises the steps of: accessing a first point on a first polygon. A step of determining a first line segment having less than a predetermined error and determining whether a next line segment causes less than the predetermined error. The next line segment is longer than the first line segment in one direction. If the next line segment causes less than the predetermined error, then determine whether a new next line segment causes less than the predetermined error. Otherwise, access a texel in the texture map at a position corresponding to the first point and the first line segment, and generate the pixel from the texel.

Abstract: A system and computer-based method providing a dynamic information clipping service. An end-user creates a template of topics of interest via a graphical user interface and the template is transmitted to a central site for processing. At the central site, information relating to a particular base of knowledge is collected, parsed and indexed. The parsed and indexed information is stored in an information repository. The template is processed by parsing and collecting command-strings relating to the topics of interest found within the parsed template. The information repository is searched using the collected command-strings to generate query results, which are then sorted. A Hypertext Mark-up Language (HTML) page is created using the sorted query results. The page is then made available to the end-user for viewing, wherein the page represents a custom network-based newspaper.

Abstract: Methods for forming computer models of curves, networks, or surfaces from user defined specifications of the shape to be modeled. Each specification includes a set of geometric constraints, such as positions, tangents curvatures, and torsions, and may also include discontinuity specifications. In the preferred embodiment, curves are computed so as to locally minimize a scale invariant functional of the geometry of the curve, such as a magnitude of variation in curvature of the curve (MVC) or a magnitude of curvature of the curve (MEC), while satisfying a user defined specification. An improvement on the MVC functional is to add a magnitude of variation in torsion of the curve. An improvement on the MEC functional is to add a magnitude of torsion of the curve.

Abstract: A memory controller in a computer system is described. The memory controller maintains a directory comprising a plurality of entries. Each entry is associated with a memory block. The memory controller maintains an entry of the directory in a modified fine bit vector format when a memory block associated with the entry is cached in one or more nodes all of which are within a single partition of the computer system. The entry when maintained in the modified fine bit vector format comprises a partition field storing information identifying the single partition, and a modified fine bit vector field storing information identifying nodes in the single partition where the memory block is cached. The memory controller maintains the entry in a modified coarse bit vector format when the memory block is cached in multiple nodes distributed among P partitions of the computer system, where P is greater than one.

Abstract: A method for preventing deadlock due to the need for data exclusivity when performing forced atomic instructions in a multi-level cache in a multi-processor system. The system determines whether an aligned multi-byte word in which the data of a forced atomic instruction, such as an integer store operation, is exclusive in a first level cache. If so, the forced atomic instruction is allowed to enter a second level cache pipeline. If not, the forced atomic instruction is prevented from entering the second level cache pipeline and a cache miss and fill operation is initiated to cause the aligned word to be exclusive in the first level cache.

Abstract: The present invention relates to the generation of display identification (ID) information in a computer display system. The display ID generator includes a memory which stores display ID information. A control logic device couples the information from the memory to a first FIFO. A state machine accesses the information held in the first FIFO and determines the duration information. Next, the state machine couples the information to a second FIFO. Last, the information in the second FIFO is coupled to a third memory and a sequential counter. After initial loading of information in second memory and sequential counter, the sequential counter determines when second memory and itself will be loaded with the next set of information. Once the sequential counter reaches zero, it generates a signal enabling itself and the second memory to load the next set of information.

Abstract: A precise TLB error detection and shutdown circuit that detects for two or more matching tag entries in a TLB by providing an array of n units of error detection circuit unit <i>, wherein each error detection unit <i> comprises a first input B<i> coupled to an associated bit <i> of an input n-bit tag compare indicator. A second input A<i> is coupled to an output bit of an immediately preceding error detection unit <i-1>. A third input C<i> is coupled to a output bit of a immediately preceding error detection unit <i-1>. Each error detection unit <i> generates a first output bit X<i>, the output indicator X<i> indicating a result of detecting two or more matching tag entries, and a second output indicator Y<i>, the output indicator Y<i> indicating a result of detecting one or more matching tag entries.