Abstract: A method for manufacturing a structure comprises a) providing a donor substrate comprising front and rear faces; b) providing a support substrate; c) forming an intermediate layer on the front face of the donor substrate or on the support substrate; d) assembling the donor and support substrates with the intermediate layer therebetween; e) thinning the rear face of the donor substrate to form a useful layer of a useful thickness having a first face disposed on the intermediate layer and a second free face; and wherein the donor substrate comprises a buried stop layer and a fine active layer having a first thickness less than the useful thickness, between the front face of the donor substrate and the stop layer; and after step e), removing, in first regions of the structure, a thick active layer delimited by the second free face of the useful layer and the stop layer.

Abstract: A structure for radiofrequency applications includes: a support substrate of high-resistivity silicon comprising a lower part and an upper part having undergone a p-type doping to a depth D; a mesoporous trapping layer of silicon formed in the doped upper part of the support substrate. The depth D is less than 1 micron and the trapping layer has a porosity rate of between 20% and 60%.

Abstract: A method for fabricating a strained semiconductor-on-insulator substrate includes bonding a donor substrate to a receiving substrate, with a dielectric layer at the interface, and transferring a monocrystalline semiconductor layer from the donor substrate to the receiving substrate. A portion is cut from a stack formed from the transferred monocrystalline semiconductor layer from the dielectric layer and from the strained semiconductor material layer. The cutting results in the relaxation of the strain in the strained semiconductor material, and in the application of at least a part of the strain to the transferred monocrystalline semiconductor layer. The method also involves the formation, on the strained semiconductor material layer of the receiving substrate, of a dielectric bonding layer or of a bonding layer consisting of the same relaxed, or at least partially relaxed, monocrystalline material as the monocrystalline semiconductor layer of the donor substrate.

Abstract: A substrate for microelectronic radiofrequency devices includes a carrier substrate made of a first semiconductor material having a resistivity higher than 500 ohms·cm; a plurality of trenches in the carrier substrate, which trenches are filled with a second material, and defining on a first side of the carrier substrate a plurality of first zones made of a first material and at least one second zone made of a second material. The second material has a resistivity higher than 10 kohms·cm, and the first zones have a maximum dimension smaller than 10 microns and are insulated from one another by the second zone.

Abstract: A process for the manufacture of a semiconductor element includes a stage of rapid heat treatment of a substrate comprising a charge-trapping layer, which is capable of damaging an RF characteristic of the substrate. The rapid heat treatment stage is followed by a healing heat treatment of the substrate between 700° C. and 1,100° C., for a period of time of at least 15 seconds.

Abstract: The invention concerns an assembly method comprising the following steps: a) providing a first substrate comprising a first face made from crystalline indium phosphide, b) providing a second substrate comprising a second crystalline face different from the indium phosphide, c) forming an intermediate layer of crystalline indium phosphide on the second face of the second substrate, d) forming an assembly, via a direct bonding step, by bringing the first face of the first substrate into contact with the intermediate layer, the direct bonding step being carried out in an atmosphere having a pressure greater than 10?4 Pa, and preferably higher than 10?3 Pa, e) subjecting the assembly formed in step d) to heat treatment.

Abstract: Methods of forming a semiconductor structure include forming a device layer on an initial substrate, attaching a first surface of the device layer to a temporary substrate and forming a high resistivity layer on a second surface of the device layer by removing a portion of the initial substrate. Methods further include attaching a final substrate to the high resistivity layer and removing the temporary substrate. Semiconductor structures are fabricated by such methods that include a final substrate, a high resistivity layer disposed over the final substrate and a device layer disposed over the high resistivity layer.

Abstract: This disclosure relates to a method of fabrication of a surface acoustic wave device comprising the step (a) of providing a piezoelectric structure, the step (b) of providing a dielectric structure, wherein the step (b) comprises a step (b1) of metalizing the dielectric structure, and the method further comprising the step (c) of bonding the metalized dielectric structure to the piezoelectric structure.

Abstract: A structure for radiofrequency applications includes: a semiconducting supporting substrate, and a trapping layer arranged on the supporting substrate. The trapping layer includes a higher defect density than a predetermined defect density. The predetermined defect density is the defect density beyond which the electric resistivity of the trapping layer is no lower than 10,000 ohm·cm over a temperature range extending from ?20° C. to 120° C.

Abstract: A method for manufacturing a substrate includes the following steps: (a) providing a support substrate with a first coefficient of thermal expansion, having on one of its faces a first plurality of trenches parallel to each other in a first direction, and a second plurality of trenches parallel to each other in a second direction; (b) transferring a useful layer from a donor substrate to the support substrate, the useful layer having a second coefficient of thermal expansion; wherein an intermediate layer is inserted between the front face of the support substrate and the useful layer, the intermediate layer having a coefficient of thermal expansion between the first and second coefficients of thermal expansion.

Abstract: The disclosure relates to a method for separating a layer from a composite structure, the structure comprising a composite stack formed from at least a support substrate, which is partially transparent at a determined wavelength, the layer to be separated and a separation layer interposed between the support substrate and the layer to be separated, the method comprising irradiation of the separation layer through the support substrate by means of incident light ray at the determined wavelength in order to induce weakening or separation by exfoliation of the separation layer, the light ray being inclined so as to form an angle of incidence ? such that ?>?min, where ?min=sin?1((n1/n0)sin(tan?1(s/2h))), n1 and n0, respectively, being the refractive index of the support substrate and the refractive index of the external medium in contact with the support substrate, from which the ray comes, S being the width of the ray and h being the thickness of the support substrate.

Abstract: A support for a semiconductor structure includes a charge-trapping layer on a base substrate. The charge-trapping layer consists of a polycrystalline main layer and, interposed in the main layer or between the main layer and the base substrate, at least one intermediate polycrystalline layer composed of a silicon and carbon alloy or carbon. The intermediate layer has a resistivity greater than 1000 ohm·cm.

Abstract: The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.

Abstract: The disclosure relates to a semiconductor structure comprising: a first semiconductor layer, a first program transistor, and a first select transistor implementing a first antifuse cell, wherein the first semiconductor layer acts as the body of the first program transistor and as the body of the first select transistor, wherein a gate of the first program transistor and a gate of the first select transistor are on different sides of the first semiconductor layer.

Abstract: The present disclosure relates to a process for the manufacture of a high resistivity semiconductor substrate, comprising the following stages: providing a first substrate with an in-depth weakened layer; providing a second substrate with a layer of an oxide at the surface; attaching the first substrate to the second substrate so as to form a compound substrate comprising a layer of buried oxide; and cleaving the compound substrate at the level of the weakened layer. The process additionally comprises at least one stage of stabilization, in particular, a stabilization heat treatment, of the second substrate with the layer of oxide before the stage of cleaving at the level of the weakened layer.

Abstract: A process for smoothing a silicon-on-insulator structure comprising the exposure of a surface of the structure to an inert or reducing gas flow and to a high temperature during a heat treatment includes performing a first heat treatment step at a first temperature and under a first gas flow defined by a first flow rate, and performing a second heat treatment step at a second temperature lower than the first temperature and under a second gas flow defined by a second flow rate lower than the first flow rate.

Abstract: The invention concerns an assembly method comprising the following steps: a) providing a first substrate comprising a first face made from crystalline indium phosphide, b) providing a second substrate comprising a second crystalline face different from the indium phosphide, c) forming an intermediate layer of crystalline indium phosphide on the second face of the second substrate, d) forming an assembly, via a direct bonding step, by bringing the first face of the first substrate into contact with the intermediate layer, the direct bonding step being carried out in an atmosphere having a pressure greater than 10?4 Pa, and preferably higher than 10?3 Pa, e) subjecting the assembly formed in step d) to heat treatment.

Abstract: The present invention relates to a look-up table architecture and to an FPGA comprising the same. The look-up table architecture comprises a registers group comprising a plurality of registers configured to issue register signals, and a programmable logic comprising a plurality of pass gates configured to be controlled at least by the register signals, the registers group and the programmable logic forming a look-up table, wherein the pass gates are placed in a single direction.

Abstract: A process for separating at least two substrates comprising at least two separation interfaces along one of the interfaces includes, before inserting a blade between the substrate, damaging at least one portion of a peripheral region of a chosen one of the interfaces, then inserting the blade and partially parting the substrates, and applying a fluid in a space between the parted substrates while the blade remains inserted therebetween, and decreasing a rupture energy of the chosen interface by stress corrosion involving breaking of siloxane bonds present at the interface.

Abstract: Photoactive devices include an active region disposed between first and second electrodes and configured to absorb radiation and generate a voltage between the electrodes. The active region includes an active layer comprising a semiconductor material exhibiting a relatively low bandgap. The active layer has a front surface through which radiation enters the active layer and a relatively rougher back surface on an opposing side of the active layer. Methods of fabricating photoactive devices include the formation of such an active region and electrodes.